TIOVX User Guide

Detailed Description

Internal APIs for platform operations.

Data Structures

struct  tivx_shm_obj_count_t
 Struct containing object descriptor allocation counts. Allows for a log to be kept of the object descriptors used throughout runtime. More...
 

Defines

#define TIVX_PLATFORM_SHM_ENTRY_SIZE_ALIGN   (8U)
 Macro to check the alignment of the size of the shared memory entry.
 
#define TIVX_PLATFORM_LOCK_LOG_RT_HW_SPIN_LOCK_ID   (253u)
 HW spinlock ID to use for locking run-time event logger.
 
#define TIVX_PLATFORM_LOCK_OBJ_DESC_TABLE_HW_SPIN_LOCK_ID   (254u)
 HW spinlock ID to use for locking object descriptor table.
 
#define TIVX_PLATFORM_LOCK_DATA_REF_QUEUE_HW_SPIN_LOCK_ID   (255u)
 HW spinlock ID to use for locking data ref queue.
 
#define TIVX_TARGET_R5F_MAX   (27U)
 Max number of targets on a given R5F.
 
#define TIVX_TARGET_INFO
 Mapping of Target names with Target Ids Used to initialize internal structure.
 
#define ASSERT_CONCAT_(a, b)   a##b
 Macros for build time check.
 
#define TIVX_PLATFORM_MAX_OBJ_DESC_SHM_INST   (4096u)
 Maximum number obj descriptors that are present in shared memory.
 

Enumerations

enum  tivx_platform_lock_type_e {
  TIVX_PLATFORM_LOCK_OBJ_DESC_TABLE = 0,
  TIVX_PLATFORM_LOCK_CONTEXT,
  TIVX_PLATFORM_LOCK_DATA_REF_QUEUE,
  TIVX_PLATFORM_LOCK_LOG_RT_INDEX,
  TIVX_PLATFORM_LOCK_LOG_RT,
  TIVX_PLATFORM_LOCK_MAX
}
 Types of system level locks. More...
 
enum  tivx_target_id_e {
  TIVX_TARGET_ID_DSP_C7_1 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_DSP_C7_1, 0u),
  TIVX_TARGET_ID_DSP_C7_1_PRI_2 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_DSP_C7_1, 1u),
  TIVX_TARGET_ID_DSP_C7_1_PRI_3 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_DSP_C7_1, 2u),
  TIVX_TARGET_ID_DSP_C7_1_PRI_4 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_DSP_C7_1, 3u),
  TIVX_TARGET_ID_DSP_C7_1_PRI_5 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_DSP_C7_1, 4u),
  TIVX_TARGET_ID_DSP_C7_1_PRI_6 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_DSP_C7_1, 5u),
  TIVX_TARGET_ID_DSP_C7_1_PRI_7 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_DSP_C7_1, 6u),
  TIVX_TARGET_ID_DSP_C7_1_PRI_8 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_DSP_C7_1, 7u),
  TIVX_TARGET_ID_DSP_C7_2 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_DSP_C7_2, 0u),
  TIVX_TARGET_ID_DSP_C7_2_PRI_2 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_DSP_C7_2, 1u),
  TIVX_TARGET_ID_DSP_C7_2_PRI_3 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_DSP_C7_2, 2u),
  TIVX_TARGET_ID_DSP_C7_2_PRI_4 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_DSP_C7_2, 3u),
  TIVX_TARGET_ID_DSP_C7_2_PRI_5 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_DSP_C7_2, 4u),
  TIVX_TARGET_ID_DSP_C7_2_PRI_6 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_DSP_C7_2, 5u),
  TIVX_TARGET_ID_DSP_C7_2_PRI_7 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_DSP_C7_2, 6u),
  TIVX_TARGET_ID_DSP_C7_2_PRI_8 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_DSP_C7_2, 7u),
  TIVX_TARGET_ID_DSP_C7_3 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_DSP_C7_3, 0u),
  TIVX_TARGET_ID_DSP_C7_3_PRI_2 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_DSP_C7_3, 1u),
  TIVX_TARGET_ID_DSP_C7_3_PRI_3 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_DSP_C7_3, 2u),
  TIVX_TARGET_ID_DSP_C7_3_PRI_4 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_DSP_C7_3, 3u),
  TIVX_TARGET_ID_DSP_C7_3_PRI_5 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_DSP_C7_3, 4u),
  TIVX_TARGET_ID_DSP_C7_3_PRI_6 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_DSP_C7_3, 5u),
  TIVX_TARGET_ID_DSP_C7_3_PRI_7 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_DSP_C7_3, 6u),
  TIVX_TARGET_ID_DSP_C7_3_PRI_8 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_DSP_C7_3, 7u),
  TIVX_TARGET_ID_MPU_0 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MPU_0, 0u),
  TIVX_TARGET_ID_MPU_1 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MPU_0, 1u),
  TIVX_TARGET_ID_MPU_2 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MPU_0, 2u),
  TIVX_TARGET_ID_MPU_3 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MPU_0, 3u),
  TIVX_TARGET_ID_MCU2_0 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 0u),
  TIVX_TARGET_ID_VPAC_NF = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 1u),
  TIVX_TARGET_ID_VPAC_LDC1 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 2u),
  TIVX_TARGET_ID_VPAC_MSC1 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 3u),
  TIVX_TARGET_ID_VPAC_MSC2 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 4u),
  TIVX_TARGET_ID_VPAC_VISS1 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 5u),
  TIVX_TARGET_ID_CAPTURE1 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 6u),
  TIVX_TARGET_ID_CAPTURE2 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 7u),
  TIVX_TARGET_ID_DISPLAY1 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 8u),
  TIVX_TARGET_ID_DISPLAY2 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 9u),
  TIVX_TARGET_ID_CSITX = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 10u),
  TIVX_TARGET_ID_CAPTURE3 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 11u),
  TIVX_TARGET_ID_CAPTURE4 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 12u),
  TIVX_TARGET_ID_CAPTURE5 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 13u),
  TIVX_TARGET_ID_CAPTURE6 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 14u),
  TIVX_TARGET_ID_CAPTURE7 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 15u),
  TIVX_TARGET_ID_CAPTURE8 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 16u),
  TIVX_TARGET_ID_CAPTURE9 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 17u),
  TIVX_TARGET_ID_CAPTURE10 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 18u),
  TIVX_TARGET_ID_CAPTURE11 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 19u),
  TIVX_TARGET_ID_CAPTURE12 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 20u),
  TIVX_TARGET_ID_DISPLAY_M2M1 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 21u),
  TIVX_TARGET_ID_DISPLAY_M2M2 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 22u),
  TIVX_TARGET_ID_DISPLAY_M2M3 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 23u),
  TIVX_TARGET_ID_DISPLAY_M2M4 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 24u),
  TIVX_TARGET_ID_CSITX2 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 25u),
  TIVX_TARGET_ID_VPAC_FC = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_0, 26u),
  TIVX_TARGET_ID_MCU2_1 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_1, 0u),
  TIVX_TARGET_ID_DMPAC_SDE = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_1, 1u),
  TIVX_TARGET_ID_DMPAC_DOF = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU2_1, 2u),
  TIVX_TARGET_ID_MCU3_0 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU3_0, 0u),
  TIVX_TARGET_ID_MCU3_1 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU3_1, 0u),
  TIVX_TARGET_ID_MCU4_0 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU4_0, 0u),
  TIVX_TARGET_ID_VPAC2_NF = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU4_0, 1u),
  TIVX_TARGET_ID_VPAC2_LDC1 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU4_0, 2u),
  TIVX_TARGET_ID_VPAC2_MSC1 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU4_0, 3u),
  TIVX_TARGET_ID_VPAC2_MSC2 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU4_0, 4u),
  TIVX_TARGET_ID_VPAC2_VISS1 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU4_0, 5u),
  TIVX_TARGET_ID_VPAC2_FC = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU4_0, 6u),
  TIVX_TARGET_ID_MCU4_1 = TIVX_MAKE_TARGET_ID(TIVX_CPU_ID_MCU4_1, 0u)
}
 Target ID for supported targets. More...
 

Functions

vx_status ownMemBufferMap (void *host_ptr, uint32_t size, vx_enum mem_type, vx_enum maptype)
 Internal-only buffer map function used to selectively apply cache maintenance operations based on the underlying OS implementation.
 
vx_status ownMemBufferUnmap (void *host_ptr, uint32_t size, vx_enum mem_type, vx_enum maptype)
 Internal-only buffer unmap function used to selectively apply cache maintenance operations based on the underlying OS implementation.
 
int32_t tivxPlatformGetShmSize (uint32_t *shm_size)
 Get size of TIOVX object descriptor memory carveout. More...
 
void ownTableIncrementValue (vx_enum resource_name)
 Increment count of given resource. More...
 
void ownTableDecrementValue (vx_enum resource_name)
 Decrement count of given resource. More...
 
vx_enum ownPlatformGetTargetId (const char *target_name)
 Convert a target name to a specific target ID. More...
 
void ownPlatformGetTargetName (vx_enum target_id, char *target_name)
 Convert a specific target ID to a target name. More...
 
void ownPlatformGetObjDescTableInfo (tivx_obj_desc_table_info_t *table_info)
 Return shared memory info which holds the object descriptors. More...
 
void ownPlatformGetLogRtShmInfo (void **shm_base, uint32_t *shm_size)
 Return shared memory info which holds the run-time logger buffer. More...
 
void ownPlatformSystemLock (vx_enum lock_id)
 Take a system level lock. More...
 
void ownPlatformSystemUnlock (vx_enum lock_id)
 Release system level lock.
 
vx_status ownPlatformInit (void)
 Init Platform module.
 
void ownPlatformDeInit (void)
 DeInit Platform module.
 
void ownPlatformPrintf (const char *format)
 Print given string.
 
void ownPlatformCreateTargets (void)
 Function to set the target configuration. More...
 
void ownPlatformDeleteTargets (void)
 Function to destroy created targets.
 
void ownPlatformActivate (void)
 Utility function to enable Platform specific things Currently Used for EVE algorithm to enable EDMA.
 
void ownPlatformDeactivate (void)
 Utility function to disable Platform specific things Currently Used for EVE algorithm to disable EDMA.
 
void ownPlatformTaskInit (void)
 Utility function to call OS-specific task init functions.
 
void ownPlatformGetTargetPerfStats (uint32_t app_cpu_id, uint32_t target_values[TIVX_TARGET_RESOURCE_COUNT])
 Function to query targets for their TIOVX resource statistics.
 
void tivxPlatformCreateTargetId (vx_enum target_id, uint32_t i, const char *name, uint32_t task_pri)
 Create target ID.
 
void tivxPlatformDeleteTargetId (vx_enum target_id)
 Delete target ID.
 
void tivxPlatformSetHostTargetId (tivx_target_id_e host_target_id)
 Set target ID for HOST. More...
 

Enumeration Type Documentation

◆ tivx_platform_lock_type_e

Types of system level locks.

Enumerator
TIVX_PLATFORM_LOCK_OBJ_DESC_TABLE 

Lock the shared object descriptor table during object descriptor slot alloc and dealloc.

TIVX_PLATFORM_LOCK_CONTEXT 

Lock the context during context create and delete.

TIVX_PLATFORM_LOCK_DATA_REF_QUEUE 

Lock the data reference queue during enqueue and dequeue.

TIVX_PLATFORM_LOCK_LOG_RT_INDEX 

Lock the index information of run-time logger.

TIVX_PLATFORM_LOCK_LOG_RT 

Lock the run-time logger.

TIVX_PLATFORM_LOCK_MAX 

Max number of locks.

Definition at line 86 of file tivx_platform.h.

◆ tivx_target_id_e

Target ID for supported targets.

Must be in order of consecutive index numbers per CPU ID. If some targets are moved to a different CPU, the order and indexing should be updated accordingly.

Enumerator
TIVX_TARGET_ID_DSP_C7_1 

target ID for DSP_C7_1

TIVX_TARGET_ID_DSP_C7_1_PRI_2 

target ID for DSP_C7_1_PRI_2

TIVX_TARGET_ID_DSP_C7_1_PRI_3 

target ID for DSP_C7_1_PRI_3

TIVX_TARGET_ID_DSP_C7_1_PRI_4 

target ID for DSP_C7_1_PRI_4

TIVX_TARGET_ID_DSP_C7_1_PRI_5 

target ID for DSP_C7_1_PRI_5

TIVX_TARGET_ID_DSP_C7_1_PRI_6 

target ID for DSP_C7_1_PRI_6

TIVX_TARGET_ID_DSP_C7_1_PRI_7 

target ID for DSP_C7_1_PRI_7

TIVX_TARGET_ID_DSP_C7_1_PRI_8 

target ID for DSP_C7_1_PRI_8

TIVX_TARGET_ID_DSP_C7_2 

target ID for DSP_C7_2

TIVX_TARGET_ID_DSP_C7_2_PRI_2 

target ID for DSP_C7_2_PRI_2

TIVX_TARGET_ID_DSP_C7_2_PRI_3 

target ID for DSP_C7_2_PRI_3

TIVX_TARGET_ID_DSP_C7_2_PRI_4 

target ID for DSP_C7_2_PRI_4

TIVX_TARGET_ID_DSP_C7_2_PRI_5 

target ID for DSP_C7_2_PRI_5

TIVX_TARGET_ID_DSP_C7_2_PRI_6 

target ID for DSP_C7_2_PRI_6

TIVX_TARGET_ID_DSP_C7_2_PRI_7 

target ID for DSP_C7_2_PRI_7

TIVX_TARGET_ID_DSP_C7_2_PRI_8 

target ID for DSP_C7_2_PRI_8

TIVX_TARGET_ID_DSP_C7_3 

target ID for DSP_C7_3

TIVX_TARGET_ID_DSP_C7_3_PRI_2 

target ID for DSP_C7_3_PRI_2

TIVX_TARGET_ID_DSP_C7_3_PRI_3 

target ID for DSP_C7_3_PRI_3

TIVX_TARGET_ID_DSP_C7_3_PRI_4 

target ID for DSP_C7_3_PRI_4

TIVX_TARGET_ID_DSP_C7_3_PRI_5 

target ID for DSP_C7_3_PRI_5

TIVX_TARGET_ID_DSP_C7_3_PRI_6 

target ID for DSP_C7_3_PRI_6

TIVX_TARGET_ID_DSP_C7_3_PRI_7 

target ID for DSP_C7_3_PRI_7

TIVX_TARGET_ID_DSP_C7_3_PRI_8 

target ID for DSP_C7_3_PRI_8

TIVX_TARGET_ID_MPU_0 

target ID for MPU-0

TIVX_TARGET_ID_MPU_1 

target ID for MPU-0

TIVX_TARGET_ID_MPU_2 

target ID for MPU-0

TIVX_TARGET_ID_MPU_3 

target ID for MPU-0

TIVX_TARGET_ID_MCU2_0 

target ID for MCU2-0

TIVX_TARGET_ID_VPAC_NF 

target ID for VPAC1 NF

TIVX_TARGET_ID_VPAC_LDC1 

target ID for VPAC1 LDC1

TIVX_TARGET_ID_VPAC_MSC1 

target ID for VPAC1 MSC1

TIVX_TARGET_ID_VPAC_MSC2 

target ID for VPAC1 MSC2

TIVX_TARGET_ID_VPAC_VISS1 

target ID for VPAC1 VISS1

TIVX_TARGET_ID_CAPTURE1 

target ID for Capture1

TIVX_TARGET_ID_CAPTURE2 

target ID for Capture2

TIVX_TARGET_ID_DISPLAY1 

target ID for Display1

TIVX_TARGET_ID_DISPLAY2 

target ID for Display2

TIVX_TARGET_ID_CSITX 

target ID for CSITX

TIVX_TARGET_ID_CAPTURE3 

target ID for Capture3

TIVX_TARGET_ID_CAPTURE4 

target ID for Capture4

TIVX_TARGET_ID_CAPTURE5 

target ID for Capture5

TIVX_TARGET_ID_CAPTURE6 

target ID for Capture6

TIVX_TARGET_ID_CAPTURE7 

target ID for Capture7

TIVX_TARGET_ID_CAPTURE8 

target ID for Capture8

TIVX_TARGET_ID_CAPTURE9 

target ID for Capture9

TIVX_TARGET_ID_CAPTURE10 

target ID for Capture10

TIVX_TARGET_ID_CAPTURE11 

target ID for Capture11

TIVX_TARGET_ID_CAPTURE12 

target ID for Capture12

TIVX_TARGET_ID_DISPLAY_M2M1 

target ID for Display M2M1

TIVX_TARGET_ID_DISPLAY_M2M2 

target ID for Display M2M2

TIVX_TARGET_ID_DISPLAY_M2M3 

target ID for Display M2M3

TIVX_TARGET_ID_DISPLAY_M2M4 

target ID for Display M2M4

TIVX_TARGET_ID_CSITX2 

target ID for CSITX2

TIVX_TARGET_ID_VPAC_FC 

target ID for FC

TIVX_TARGET_ID_MCU2_1 

target ID for MCU2-1

TIVX_TARGET_ID_DMPAC_SDE 

target ID for SDE

TIVX_TARGET_ID_DMPAC_DOF 

target ID for DOF

TIVX_TARGET_ID_MCU3_0 

target ID for MCU3_0

TIVX_TARGET_ID_MCU3_1 

target ID for MCU3_1

TIVX_TARGET_ID_MCU4_0 

target ID for MCU4_0

TIVX_TARGET_ID_VPAC2_NF 

target ID for VPAC2 NF

TIVX_TARGET_ID_VPAC2_LDC1 

target ID for VPAC2 LDC1

TIVX_TARGET_ID_VPAC2_MSC1 

target ID for VPAC2 MSC1

TIVX_TARGET_ID_VPAC2_MSC2 

target ID for VPAC2 MSC2

TIVX_TARGET_ID_VPAC2_VISS1 

target ID for VPAC2 VISS1

TIVX_TARGET_ID_VPAC2_FC 

target ID for VPAC2 FC

TIVX_TARGET_ID_MCU4_1 

target ID for MCU4_1

Definition at line 89 of file tivx_target_config_j742s2.h.

Function Documentation

◆ tivxPlatformGetShmSize()

int32_t tivxPlatformGetShmSize ( uint32_t *  shm_size)

Get size of TIOVX object descriptor memory carveout.

Parameters
shm_size[in] Address of unsigned int to hold size of shared memory
Returns
0 for success status

◆ ownTableIncrementValue()

void ownTableIncrementValue ( vx_enum  resource_name)

Increment count of given resource.

Parameters
resource_name[in] Enum of resource whose count should be updated

◆ ownTableDecrementValue()

void ownTableDecrementValue ( vx_enum  resource_name)

Decrement count of given resource.

Parameters
resource_name[in] Enum of resource whose count should be updated

◆ ownPlatformGetTargetId()

vx_enum ownPlatformGetTargetId ( const char *  target_name)

Convert a target name to a specific target ID.

Parameters
target_name[in] Target name
Returns
target ID

◆ ownPlatformGetTargetName()

void ownPlatformGetTargetName ( vx_enum  target_id,
char *  target_name 
)

Convert a specific target ID to a target name.

Parameters
target_id[in] Target ID
target_name[out] Target name

◆ ownPlatformGetObjDescTableInfo()

void ownPlatformGetObjDescTableInfo ( tivx_obj_desc_table_info_t table_info)

Return shared memory info which holds the object descriptors.

This is platform APIs since method of specifying shared memory, number of object descriptors is platform dependant

◆ ownPlatformGetLogRtShmInfo()

void ownPlatformGetLogRtShmInfo ( void **  shm_base,
uint32_t *  shm_size 
)

Return shared memory info which holds the run-time logger buffer.

This is platform APIs since method of specifying shared memory, is platform dependant

◆ ownPlatformSystemLock()

void ownPlatformSystemLock ( vx_enum  lock_id)

Take a system level lock.

This locks is taken across all targets to mutual exclusion across targets

WARNING: No OS calls shall be made after calling this function until the ownPlatformSystemUnlock has been called due to the chance that interrupts may be disabled during this duration.

◆ ownPlatformCreateTargets()

void ownPlatformCreateTargets ( void  )

Function to set the target configuration.

It creates target and adds it to the list of targets supported on each core.

◆ tivxPlatformSetHostTargetId()

void tivxPlatformSetHostTargetId ( tivx_target_id_e  host_target_id)

Set target ID for HOST.

Called during tivxHostInit()