39 #ifndef ti_drivers_i2s_I2SCC32XX__include 40 #define ti_drivers_i2s_I2SCC32XX__include 44 #include <ti/drivers/dpl/SemaphoreP.h> 45 #include <ti/drivers/dpl/HwiP.h> 69 #define I2SCC32XX_PIN_02_McAFSX 0x0d01 70 #define I2SCC32XX_PIN_03_McACLK 0x0302 71 #define I2SCC32XX_PIN_15_McAFSX 0x070e 72 #define I2SCC32XX_PIN_17_McAFSX 0x0610 73 #define I2SCC32XX_PIN_21_McAFSX 0x0214 74 #define I2SCC32XX_PIN_45_McAXR0 0x062c 75 #define I2SCC32XX_PIN_45_McAFSX 0x0c2c 76 #define I2SCC32XX_PIN_50_McAXR0 0x0431 77 #define I2SCC32XX_PIN_50_McAXR1 0x0631 78 #define I2SCC32XX_PIN_52_McACLK 0x0233 79 #define I2SCC32XX_PIN_52_McAXR0 0x0433 80 #define I2SCC32XX_PIN_53_McACLK 0x0234 81 #define I2SCC32XX_PIN_53_McAFSX 0x0334 82 #define I2SCC32XX_PIN_60_McAXR1 0x063b 83 #define I2SCC32XX_PIN_62_McACLKX 0x0d3d 84 #define I2SCC32XX_PIN_63_McAFSX 0x073e 85 #define I2SCC32XX_PIN_64_McAXR0 0x073f 86 #define I2SCC32XX_PIN_UNUSED 0xffff 88 #define I2SCC32XX_PIN_50_SD1 I2SCC32XX_PIN_50_McAXR1 89 #define I2SCC32XX_PIN_60_SD1 I2SCC32XX_PIN_60_McAXR1 90 #define I2SCC32XX_PIN_52_SD0 I2SCC32XX_PIN_52_McAXR0 91 #define I2SCC32XX_PIN_64_SD0 I2SCC32XX_PIN_64_McAXR0 92 #define I2SCC32XX_PIN_45_SD0 I2SCC32XX_PIN_45_McAXR0 93 #define I2SCC32XX_PIN_50_SD0 I2SCC32XX_PIN_50_McAXR0 94 #define I2SCC32XX_PIN_03_SCK I2SCC32XX_PIN_03_McACLK 95 #define I2SCC32XX_PIN_52_SCK I2SCC32XX_PIN_52_McACLK 96 #define I2SCC32XX_PIN_53_SCK I2SCC32XX_PIN_53_McACLK 97 #define I2SCC32XX_PIN_62_SCKX I2SCC32XX_PIN_62_McACLKX 98 #define I2SCC32XX_PIN_02_WS I2SCC32XX_PIN_02_McAFSX 99 #define I2SCC32XX_PIN_15_WS I2SCC32XX_PIN_15_McAFSX 100 #define I2SCC32XX_PIN_17_WS I2SCC32XX_PIN_17_McAFSX 101 #define I2SCC32XX_PIN_21_WS I2SCC32XX_PIN_21_McAFSX 102 #define I2SCC32XX_PIN_45_WS I2SCC32XX_PIN_45_McAFSX 103 #define I2SCC32XX_PIN_63_WS I2SCC32XX_PIN_63_McAFSX 104 #define I2SCC32XX_PIN_53_WS I2SCC32XX_PIN_53_McAFSX 174 uint8_t numberOfChannelsUsed;
176 } I2SCC32XX_DataInterface;
195 } I2SCC32XX_Interface;
225 volatile bool isLastReadTransfer;
228 volatile bool isLastWriteTransfer;
237 uint8_t memorySlotLength;
242 uint8_t sampleRotation;
246 uint8_t udmaArbLength;
256 uint32_t samplingFrequency;
259 uint32_t activatedFlag;
261 I2SCC32XX_DataInterface dataInterfaceSD0;
262 I2SCC32XX_DataInterface dataInterfaceSD1;
263 I2SCC32XX_Interface read;
264 I2SCC32XX_Interface write;
uint32_t pinSCKX
Definition: I2SCC32XX.h:148
void(* I2S_Callback)(I2S_Handle handle, int_fast16_t status, I2S_Transaction *transactionPtr)
The definition of a user-callback function used by the I2S driver.
Definition: I2S.h:712
uint32_t rxChannelIndex
Definition: I2SCC32XX.h:154
I2S_DataInterfaceUse
I2S data interface configuration.
Definition: I2S.h:794
uDMA driver implementation for CC32XX.
uint32_t pinSD0
Definition: I2SCC32XX.h:142
uint32_t pinWS
Definition: I2SCC32XX.h:150
I2S_Role
I2S controller / target selection.
Definition: I2S.h:755
UDMACC32XX Global configuration.
Definition: UDMACC32XX.h:126
I2S Hardware attributes.
Definition: I2SCC32XX.h:137
uint32_t pinSD1
Definition: I2SCC32XX.h:139
void(* I2SCC32XX_FifoUpdate)(uintptr_t arg)
The definition of a function used by the I2S driver to refresh the FIFO.
Definition: I2SCC32XX.h:205
Inter-Integrated Circuit Sound (I2S) Bus Driver.
I2S_ChannelConfig
Channels used selection.
Definition: I2S.h:811
Power notify object structure.
Definition: Power.h:442
I2S_SamplingEdge
I2S sampling setting.
Definition: I2S.h:768
uint32_t txChannelIndex
Definition: I2SCC32XX.h:157
void(* I2S_StopInterface)(I2S_Handle handle)
The definition of a function used to stop an I2S interface.
Definition: I2S.h:730
uint32_t intPriority
Definition: I2SCC32XX.h:160
I2S transaction descriptor.
Definition: I2S.h:681
uint32_t pinSCK
Definition: I2SCC32XX.h:145
Linked List interface for use in drivers.