Data Fields
UARTCC32XXDMA_HWAttrsV1 Struct Reference

UARTCC32XXDMA Hardware attributes. More...

#include <UARTCC32XXDMA.h>

Collaboration diagram for UARTCC32XXDMA_HWAttrsV1:
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Data Fields

unsigned int baseAddr
 
unsigned int intNum
 
unsigned int intPriority
 
uint32_t flowControl
 
unsigned long rxChannelIndex
 
unsigned long txChannelIndex
 
uint16_t rxPin
 
uint16_t txPin
 
uint16_t ctsPin
 
uint16_t rtsPin
 
UARTCC32XXDMA_ErrorCallback errorFxn
 

Detailed Description

UARTCC32XXDMA Hardware attributes.

These fields, with the exception of intPriority, are used by driverlib APIs and therefore must be populated by driverlib macro definitions. For CC32XXWare these definitions are found in:

intPriority is the UART peripheral's interrupt priority, as defined by the underlying OS. It is passed unmodified to the underlying OS's interrupt handler creation code, so you need to refer to the OS documentation for usage. For example, for SYS/BIOS applications, refer to the ti.sysbios.family.arm.m3.Hwi documentation for SYS/BIOS usage of interrupt priorities. If the driver uses the ti.dpl interface instead of making OS calls directly, then the HwiP port handles the interrupt priority in an OS specific way. In the case of the SYS/BIOS port, intPriority is passed unmodified to Hwi_create().

A sample structure is shown below:

const UARTCC32XXDMA_HWAttrsV1 uartCC32XXHWAttrs[] = {
{
.baseAddr = UARTA0_BASE,
.intNum = INT_UARTA0,
.intPriority = (~0),
.rxChannelIndex = DMA_CH8_UARTA0_RX,
.txChannelIndex = UDMA_CH9_UARTA0_TX,
.ctsPin = UARTCC32XX_DMA_PIN_UNASSIGNED,
.errorFxn = NULL
},
{
.baseAddr = UARTA1_BASE,
.intNum = INT_UARTA1,
.intPriority = (~0),
.rxChannelIndex = UDMA_CH10_UARTA1_RX,
.txChannelIndex = UDMA_CH11_UARTA1_TX,
.errorFxn = NULL
},
};

Field Documentation

§ baseAddr

unsigned int UARTCC32XXDMA_HWAttrsV1::baseAddr

UART Peripheral's base address

§ intNum

unsigned int UARTCC32XXDMA_HWAttrsV1::intNum

UART Peripheral's interrupt vector

§ intPriority

unsigned int UARTCC32XXDMA_HWAttrsV1::intPriority

UART Peripheral's interrupt priority

§ flowControl

uint32_t UARTCC32XXDMA_HWAttrsV1::flowControl

Hardware flow control setting defined by driverlib

§ rxChannelIndex

unsigned long UARTCC32XXDMA_HWAttrsV1::rxChannelIndex

uDMA controlTable receive channel index

§ txChannelIndex

unsigned long UARTCC32XXDMA_HWAttrsV1::txChannelIndex

uDMA controlTable transmit channel index

§ rxPin

uint16_t UARTCC32XXDMA_HWAttrsV1::rxPin

UART RX pin assignment

§ txPin

uint16_t UARTCC32XXDMA_HWAttrsV1::txPin

UART TX pin assignment

§ ctsPin

uint16_t UARTCC32XXDMA_HWAttrsV1::ctsPin

UART clear to send (CTS) pin assignment

§ rtsPin

uint16_t UARTCC32XXDMA_HWAttrsV1::rtsPin

UART request to send (RTS) pin assignment

§ errorFxn

UARTCC32XXDMA_ErrorCallback UARTCC32XXDMA_HWAttrsV1::errorFxn

Application error function to be called on receive errors. Note: The UARTCC32XXDMA driver currently does not use this function.


The documentation for this struct was generated from the following file:
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