|
|
UART driver implementation for a CC32XX UART controller.
============================================================================
The UART header file should be included in an application as follows:
Refer to UART.h for a complete description of APIs & example of use.
This header file contains pin mode definitions used to specify the UART TX and RX pin assignment in the UARTCC32XX_HWAttrsV1 structure. Please refer to the CC32XX Techincal Reference Manual for details on pin multiplexing.
To enable Flow Control, the RTS and CTS pins must be assigned in the UARTCC32XX_HWAttrsV1.
#include <stdint.h>#include <stdbool.h>#include <ti/drivers/dpl/ClockP.h>#include <ti/drivers/dpl/HwiP.h>#include <ti/drivers/dpl/SemaphoreP.h>#include <ti/drivers/Power.h>#include <ti/drivers/power/PowerCC32XX.h>#include <ti/drivers/UART.h>#include <ti/drivers/utils/RingBuf.h>
Go to the source code of this file.
Data Structures | |
| struct | UARTCC32XX_FxnSet |
| Complement set of read functions to be used by the UART ISR and UARTCC32XX_read(). Internal use only. More... | |
| struct | UARTCC32XX_HWAttrsV1 |
| UARTCC32XX Hardware attributes. More... | |
| struct | UARTCC32XX_Object |
| UARTCC32XX Object. More... | |
Typedefs | |
| typedef struct UARTCC32XX_FxnSet | UARTCC32XX_FxnSet |
| Complement set of read functions to be used by the UART ISR and UARTCC32XX_read(). Internal use only. More... | |
| typedef void(* | UARTCC32XX_ErrorCallback) (UART_Handle handle, uint32_t error) |
| The definition of an optional callback function used by the UART driver to notify the application when a receive error (FIFO overrun, parity error, etc) occurs. More... | |
| typedef struct UARTCC32XX_HWAttrsV1 | UARTCC32XX_HWAttrsV1 |
| UARTCC32XX Hardware attributes. More... | |
| typedef struct UARTCC32XX_Object | UARTCC32XX_Object |
| UARTCC32XX Object. More... | |
| typedef struct UARTCC32XX_Object * | UARTCC32XX_Handle |
Variables | |
| const UART_FxnTable | UARTCC32XX_fxnTable |
| #define UARTCC32XX_PIN_UNASSIGNED 0xFFF |
Indicates a pin is not being used.
If hardware flow control is not being used, the UART CTS and RTS pins should be set to UARTCC32XX_PIN_UNASSIGNED.
| #define UARTCC32XX_PIN_01_UART1_TX 0x700 |
PIN 1 is used for UART1 TX
| #define UARTCC32XX_PIN_02_UART1_RX 0x701 |
PIN 2 is used for UART1 RX
| #define UARTCC32XX_PIN_03_UART0_TX 0x702 |
PIN 3 is used for UART0 TX
| #define UARTCC32XX_PIN_04_UART0_RX 0x703 |
PIN 4 is used for UART0 RX
| #define UARTCC32XX_PIN_07_UART1_TX 0x506 |
PIN 7 is used for UART1 TX
| #define UARTCC32XX_PIN_08_UART1_RX 0x507 |
PIN 8 is used for UART1 RX
| #define UARTCC32XX_PIN_16_UART1_TX 0x20F |
PIN 16 is used for UART1 TX
| #define UARTCC32XX_PIN_17_UART1_RX 0x210 |
PIN 17 is used for UART1 RX
| #define UARTCC32XX_PIN_45_UART0_RX 0x92C |
PIN 45 is used for UART0 RX
| #define UARTCC32XX_PIN_45_UART1_RX 0x22C |
PIN 45 is used for UART1 RX
| #define UARTCC32XX_PIN_53_UART0_TX 0x934 |
PIN 53 is used for UART0 TX
| #define UARTCC32XX_PIN_55_UART0_TX 0x336 |
PIN 55 is used for UART0 TX
| #define UARTCC32XX_PIN_55_UART1_TX 0x636 |
PIN 55 is used for UART1 TX
| #define UARTCC32XX_PIN_57_UART0_RX 0x338 |
PIN 57 is used for UART0 RX
| #define UARTCC32XX_PIN_57_UART1_RX 0x638 |
PIN 57 is used for UART1 RX
| #define UARTCC32XX_PIN_58_UART1_TX 0x639 |
PIN 58 is used for UART1 TX
| #define UARTCC32XX_PIN_59_UART1_RX 0x63A |
PIN 59 is used for UART1 RX
| #define UARTCC32XX_PIN_62_UART0_TX 0xB3D |
PIN 62 is used for UART0 TX
| #define UARTCC32XX_PIN_50_UART0_CTS 0xC31 |
PIN 50 is used for UART0 CTS
| #define UARTCC32XX_PIN_50_UART0_RTS 0x331 |
PIN 50 is used for UART0 RTS
| #define UARTCC32XX_PIN_50_UART1_RTS 0xA31 |
PIN 50 is used for UART1 RTS
| #define UARTCC32XX_PIN_52_UART0_RTS 0x633 |
PIN 52 is used for UART0 RTS
| #define UARTCC32XX_PIN_61_UART0_RTS 0x53C |
PIN 61 is used for UART0 RTS
| #define UARTCC32XX_PIN_61_UART0_CTS 0x63C |
PIN 61 is used for UART0 CTS
| #define UARTCC32XX_PIN_61_UART1_CTS 0x33C |
PIN 61 is used for UART1 CTS
| #define UARTCC32XX_PIN_62_UART0_RTS 0xA3D |
PIN 62 is used for UART0 RTS
| #define UARTCC32XX_PIN_62_UART1_RTS 0x33D |
PIN 62 is used for UART1 RTS
| #define UARTCC32XX_FLOWCTRL_NONE 0 |
No hardware flow control.
| #define UARTCC32XX_FLOWCTRL_HARDWARE 1 |
Hardware flow control.
| typedef struct UARTCC32XX_FxnSet UARTCC32XX_FxnSet |
Complement set of read functions to be used by the UART ISR and UARTCC32XX_read(). Internal use only.
These functions are solely intended for the UARTCC32XX driver, and should not be used by the application. The UARTCC32XX_FxnSet is a pair of complement functions that are design to operate with one another in a task context and in an ISR context. The readTaskFxn is called by UARTCC32XX_read() to drain a circular buffer, whereas the readIsrFxn is used by the UARTCC32XX_hwiIntFxn to fill up the circular buffer.
readTaskFxn: Function called by UART read These variables are set and avilalable for use to the readTaskFxn. object->readBuf = buffer; //Pointer to a user buffer object->readSize = size; //Desired no. of bytes to read object->readCount = size; //Remaining no. of bytes to read
readIsrFxn: The required ISR counterpart to readTaskFxn
| typedef void(* UARTCC32XX_ErrorCallback) (UART_Handle handle, uint32_t error) |
The definition of an optional callback function used by the UART driver to notify the application when a receive error (FIFO overrun, parity error, etc) occurs.
| UART_Handle | UART_Handle |
| error | The current value of the receive status register. Please refer to the device data sheet to interpret this value. |
| typedef struct UARTCC32XX_HWAttrsV1 UARTCC32XX_HWAttrsV1 |
UARTCC32XX Hardware attributes.
The fields, baseAddr, intNum, and flowControl, are used by driverlib APIs and therefore must be populated by driverlib macro definitions. For CC32XXWare these definitions are found in:
intPriority is the UART peripheral's interrupt priority, as defined by the underlying OS. It is passed unmodified to the underlying OS's interrupt handler creation code, so you need to refer to the OS documentation for usage. For example, for SYS/BIOS applications, refer to the ti.sysbios.family.arm.m3.Hwi documentation for SYS/BIOS usage of interrupt priorities. If the driver uses the ti.dpl interface instead of making OS calls directly, then the HwiP port handles the interrupt priority in an OS specific way. In the case of the SYS/BIOS port, intPriority is passed unmodified to Hwi_create().
A sample structure is shown below:
| typedef struct UARTCC32XX_Object UARTCC32XX_Object |
UARTCC32XX Object.
The application must not access any member variables of this structure!
| typedef struct UARTCC32XX_Object * UARTCC32XX_Handle |
| const UART_FxnTable UARTCC32XX_fxnTable |