EDMA3 RM Instance Specific Configuration Structure. More...
#include <edma3resmgr.h>
Data Fields | |
| EDMA3_RM_Param | initParam |
| EDMA3_CCRL_ShadowRegs * | shadowRegs |
| EDMA3_RM_Obj * | pResMgrObjHandle |
| unsigned int | avlblDmaChannels [EDMA3_MAX_DMA_CHAN_DWRDS] |
| unsigned int | avlblQdmaChannels [EDMA3_MAX_QDMA_CHAN_DWRDS] |
| unsigned int | avlblPaRAMSets [EDMA3_MAX_PARAM_DWRDS] |
| unsigned int | avlblTccs [EDMA3_MAX_TCC_DWRDS] |
| unsigned int | paramInitRequired |
| unsigned int | regModificationRequired |
| EDMA3_RM_mapXbarEvtToChan | mapXbarToChan |
| EDMA3_RM_xbarConfigScr | configScrMapXbarToEvt |
| EDMA3_RM_GblXbarToChanConfigParams | rmXbarToEvtMapConfig |
EDMA3 RM Instance Specific Configuration Structure.
Used to maintain information of the EDMA3 Res Mgr instances. One such storage exists for each instance of the EDMA3 Res Mgr.
Maximum EDMA3_MAX_RM_INSTANCES instances are allowed for each EDMA3 hardware instance, for same or different shadow regions.
Configuration such as region id, IsMaster, Callback function This configuration is passed to the "Open" API. For a single EDMA3 HW controller, there can be EDMA3_MAX_REGIONS different instances tied to different regions.
| EDMA3_CCRL_ShadowRegs* EDMA3_RM_Instance::shadowRegs |
Pointer to appropriate Shadow Register region of CC Registers
Pointer to the EDMA3 RM Object (HW specific) opened by RM instance.
| unsigned int EDMA3_RM_Instance::avlblDmaChannels[EDMA3_MAX_DMA_CHAN_DWRDS] |
Available DMA Channels to the RM Instance
| unsigned int EDMA3_RM_Instance::avlblQdmaChannels[EDMA3_MAX_QDMA_CHAN_DWRDS] |
Available QDMA Channels to the RM Instance
| unsigned int EDMA3_RM_Instance::avlblPaRAMSets[EDMA3_MAX_PARAM_DWRDS] |
Available PaRAM Sets to the RM Instance
| unsigned int EDMA3_RM_Instance::avlblTccs[EDMA3_MAX_TCC_DWRDS] |
Available TCCs to the RM Instance
| unsigned int EDMA3_RM_Instance::paramInitRequired |
Sometimes, PaRAM clearing is not required for some particular RM Instances. In that case, PaRAM Sets allocated will NOT be cleared before allocating to any particular user. It is the responsibility of user to program it accordingly, without assuming anything for a specific field because the PaRAM Set might contain junk values. Not programming it fully might result in erroneous behavior. On the other hand, RM instances can also use this variable to get the PaRAM Sets cleared before allocating them to the specific user. User can program only the selected fields in this case.
Value '0' : PaRAM Sets will NOT be cleared during their allocation. Value '1' : PaRAM Sets will be cleared during their allocation.
This value can be modified using the IOCTL commands.
| unsigned int EDMA3_RM_Instance::regModificationRequired |
Sometimes, global EDMA3 registers (DCHMAP/QCHMAP) and PaRAM Sets should not be modified during EDMA3_RM_allocLogicalChannel (), for some particular RM Instances. In that case, it is the responsibility of user to program them accordingly, when needed, without assuming anything because they might contain junk values. Not programming the registers/PaRAMs fully might result in erroneous behavior. On the other hand, RM instances can also use this variable to get the global registers and PaRAM Sets minimally programmed before allocating them to the specific user. User can program only the remaining fields in this case.
Value '0' : EDMA3 registers (DCHMAP/QCHMAP) and PaRAM Sets will NOT be programmed during their allocation. Value '1' : EDMA3 registers (DCHMAP/QCHMAP) and PaRAM Sets will be programmed during their allocation.
This value can be modified using the IOCTL commands.
Pointer to the user defined function for mapping cross bar events to channel.
Pointer to the user defined function for configuring the cross bar events to appropriate channel in the Control Config TPCC Event Config registers.
Pointer to the configuration data structure for mapping cross bar events to channel.
1.6.1