40 #include <inc/hw_types.h>
41 #include <inc/hw_memmap.h>
42 #include <inc/hw_adi.h>
43 #include <inc/hw_adi_2_refsys.h>
44 #include <inc/hw_adi_3_refsys.h>
45 #include <inc/hw_adi_4_aux.h>
46 #include <inc/hw_aon_batmon.h>
47 #include <inc/hw_aon_sysctl.h>
48 #include <inc/hw_ccfg.h>
49 #include <inc/hw_ddi_0_osc.h>
50 #include <inc/hw_fcfg1.h>
59 #ifdef __IAR_SYSTEMS_ICC__
60 #include <intrinsics.h>
71 #undef SetupAfterColdResetWakeupFromShutDownCfg1
72 #define SetupAfterColdResetWakeupFromShutDownCfg1 NOROM_SetupAfterColdResetWakeupFromShutDownCfg1
73 #undef SetupAfterColdResetWakeupFromShutDownCfg2
74 #define SetupAfterColdResetWakeupFromShutDownCfg2 NOROM_SetupAfterColdResetWakeupFromShutDownCfg2
75 #undef SetupAfterColdResetWakeupFromShutDownCfg3
76 #define SetupAfterColdResetWakeupFromShutDownCfg3 NOROM_SetupAfterColdResetWakeupFromShutDownCfg3
77 #undef SetupGetTrimForAdcShModeEn
78 #define SetupGetTrimForAdcShModeEn NOROM_SetupGetTrimForAdcShModeEn
79 #undef SetupGetTrimForAdcShVbufEn
80 #define SetupGetTrimForAdcShVbufEn NOROM_SetupGetTrimForAdcShVbufEn
81 #undef SetupGetTrimForAmpcompCtrl
82 #define SetupGetTrimForAmpcompCtrl NOROM_SetupGetTrimForAmpcompCtrl
83 #undef SetupGetTrimForAmpcompTh1
84 #define SetupGetTrimForAmpcompTh1 NOROM_SetupGetTrimForAmpcompTh1
85 #undef SetupGetTrimForAmpcompTh2
86 #define SetupGetTrimForAmpcompTh2 NOROM_SetupGetTrimForAmpcompTh2
87 #undef SetupGetTrimForAnabypassValue1
88 #define SetupGetTrimForAnabypassValue1 NOROM_SetupGetTrimForAnabypassValue1
89 #undef SetupGetTrimForDblrLoopFilterResetVoltage
90 #define SetupGetTrimForDblrLoopFilterResetVoltage NOROM_SetupGetTrimForDblrLoopFilterResetVoltage
91 #undef SetupGetTrimForRadcExtCfg
92 #define SetupGetTrimForRadcExtCfg NOROM_SetupGetTrimForRadcExtCfg
93 #undef SetupGetTrimForRcOscLfIBiasTrim
94 #define SetupGetTrimForRcOscLfIBiasTrim NOROM_SetupGetTrimForRcOscLfIBiasTrim
95 #undef SetupGetTrimForRcOscLfRtuneCtuneTrim
96 #define SetupGetTrimForRcOscLfRtuneCtuneTrim NOROM_SetupGetTrimForRcOscLfRtuneCtuneTrim
97 #undef SetupGetTrimForXoscHfCtl
98 #define SetupGetTrimForXoscHfCtl NOROM_SetupGetTrimForXoscHfCtl
99 #undef SetupGetTrimForXoscHfFastStart
100 #define SetupGetTrimForXoscHfFastStart NOROM_SetupGetTrimForXoscHfFastStart
101 #undef SetupGetTrimForXoscHfIbiastherm
102 #define SetupGetTrimForXoscHfIbiastherm NOROM_SetupGetTrimForXoscHfIbiastherm
103 #undef SetupGetTrimForXoscLfRegulatorAndCmirrwrRatio
104 #define SetupGetTrimForXoscLfRegulatorAndCmirrwrRatio NOROM_SetupGetTrimForXoscLfRegulatorAndCmirrwrRatio
105 #undef SetupSetCacheModeAccordingToCcfgSetting
106 #define SetupSetCacheModeAccordingToCcfgSetting NOROM_SetupSetCacheModeAccordingToCcfgSetting
107 #undef SetupSetAonRtcSubSecInc
108 #define SetupSetAonRtcSubSecInc NOROM_SetupSetAonRtcSubSecInc
109 #undef SetupSetVddrLevel
110 #define SetupSetVddrLevel NOROM_SetupSetVddrLevel
129 uint32_t newTrimRaw ;
131 int32_t currentTrim ;
157 if ( currentTrim != targetTrim ) {
161 while ( currentTrim != targetTrim ) {
162 deltaTrim = targetTrim - currentTrim;
163 if ( deltaTrim > 2 ) deltaTrim = 2;
164 if ( deltaTrim < -2 ) deltaTrim = -2;
165 currentTrim += deltaTrim;
193 int32_t i32VddrSleepTrim;
194 int32_t i32VddrSleepDelta;
248 i32VddrSleepDelta = ((((int32_t)ccfg_ModeConfReg )
250 >> ( 32 - CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_W ));
252 i32VddrSleepTrim = ( i32VddrSleepTrim + i32VddrSleepDelta + 1 );
253 if ( i32VddrSleepTrim > 21 ) i32VddrSleepTrim = 21;
254 if ( i32VddrSleepTrim < -10 ) i32VddrSleepTrim = -10;
339 ( 0x20 | ( ui32Trim << 1 ));
348 ( 0x10 | ( ui32Trim ));
367 ( 0x60 | ( ui32Trim << 1 ));
378 ( 0x80 | ( ui32Trim << 3 ));
390 ( 0xFC00 | ( ui32Trim << 2 ));
413 uint32_t fcfg1OscConf;
415 uint32_t currentHfClock;
416 uint32_t ccfgExtLfClk;
545 uint32_t ui32Fcfg1Value ;
546 uint32_t ui32XoscHfRow ;
547 uint32_t ui32XoscHfCol ;
548 int32_t i32CustomerDeltaAdjust ;
549 uint32_t ui32TrimValue ;
557 ui32XoscHfRow = (( ui32Fcfg1Value &
560 ui32XoscHfCol = (( ui32Fcfg1Value &
564 i32CustomerDeltaAdjust = 0;
572 i32CustomerDeltaAdjust = ((int32_t)ccfg_ModeConfReg << 16 ) >> 24;
574 while ( i32CustomerDeltaAdjust < 0 ) {
576 if ( ui32XoscHfCol == 0 ) {
577 ui32XoscHfCol = 0xFFFF;
579 if ( ui32XoscHfRow == 0 ) {
584 i32CustomerDeltaAdjust++;
586 while ( i32CustomerDeltaAdjust > 0 ) {
587 ui32XoscHfCol = ( ui32XoscHfCol << 1 ) | 1;
588 if ( ui32XoscHfCol > 0xFFFF ) {
590 ui32XoscHfRow = ( ui32XoscHfRow << 1 ) | 1;
591 if ( ui32XoscHfRow > 0xF ) {
593 ui32XoscHfCol = 0xFFFF;
596 i32CustomerDeltaAdjust--;
603 return (ui32TrimValue);
615 uint32_t ui32TrimValue;
631 return(ui32TrimValue);
643 uint32_t ui32TrimValue;
652 return(ui32TrimValue);
663 uint32_t ui32TrimValue;
664 uint32_t ui32Fcfg1Value;
670 ui32TrimValue = ((ui32Fcfg1Value &
674 ui32TrimValue |= (((ui32Fcfg1Value &
678 ui32TrimValue |= (((ui32Fcfg1Value &
682 ui32TrimValue |= (((ui32Fcfg1Value &
687 return(ui32TrimValue);
698 uint32_t ui32TrimValue;
699 uint32_t ui32Fcfg1Value;
705 ui32TrimValue = (((ui32Fcfg1Value &
709 ui32TrimValue |= (((ui32Fcfg1Value &
713 ui32TrimValue |= (((ui32Fcfg1Value &
717 ui32TrimValue |= (((ui32Fcfg1Value &
722 return(ui32TrimValue);
733 uint32_t ui32TrimValue ;
734 uint32_t ui32Fcfg1Value ;
735 uint32_t ibiasOffset ;
738 int32_t deltaAdjust ;
745 ibiasOffset = ( ui32Fcfg1Value &
748 ibiasInit = ( ui32Fcfg1Value &
758 deltaAdjust += (int32_t)ibiasOffset;
759 if ( deltaAdjust < 0 ) {
765 ibiasOffset = (uint32_t)deltaAdjust;
768 deltaAdjust += (int32_t)ibiasInit;
769 if ( deltaAdjust < 0 ) {
775 ibiasInit = (uint32_t)deltaAdjust;
780 ui32TrimValue |= (((ui32Fcfg1Value &
784 ui32TrimValue |= (((ui32Fcfg1Value &
788 ui32TrimValue |= (((ui32Fcfg1Value &
793 if ( ui32Fcfg1Revision >= 0x00000022 ) {
794 ui32TrimValue |= ((( ui32Fcfg1Value &
800 return(ui32TrimValue);
811 uint32_t dblrLoopFilterResetVoltageValue = 0;
813 if ( ui32Fcfg1Revision >= 0x00000020 ) {
819 return ( dblrLoopFilterResetVoltageValue );
830 uint32_t getTrimForAdcShModeEnValue = 1;
832 if ( ui32Fcfg1Revision >= 0x00000022 ) {
838 return ( getTrimForAdcShModeEnValue );
849 uint32_t getTrimForAdcShVbufEnValue = 1;
851 if ( ui32Fcfg1Revision >= 0x00000022 ) {
857 return ( getTrimForAdcShVbufEnValue );
868 uint32_t getTrimForXoschfCtlValue = 0;
871 if ( ui32Fcfg1Revision >= 0x00000020 ) {
873 getTrimForXoschfCtlValue =
878 getTrimForXoschfCtlValue |=
883 getTrimForXoschfCtlValue |=
889 return ( getTrimForXoschfCtlValue );
900 uint32_t ui32XoscHfFastStartValue ;
907 return ( ui32XoscHfFastStartValue );
918 uint32_t getTrimForRadcExtCfgValue = 0x403F8000;
921 if ( ui32Fcfg1Revision >= 0x00000020 ) {
923 getTrimForRadcExtCfgValue =
928 getTrimForRadcExtCfgValue |=
933 getTrimForRadcExtCfgValue |=
939 return ( getTrimForRadcExtCfgValue );
950 uint32_t trimForRcOscLfIBiasTrimValue = 0;
952 if ( ui32Fcfg1Revision >= 0x00000022 ) {
958 return ( trimForRcOscLfIBiasTrimValue );
970 uint32_t trimForXoscLfRegulatorAndCmirrwrRatioValue = 0;
972 if ( ui32Fcfg1Revision >= 0x00000022 ) {
979 return ( trimForXoscLfRegulatorAndCmirrwrRatioValue );
1003 uint32_t vimsCtlMode0 ;
static void SysCtrlAonSync(void)
Sync all accesses to the AON register interface.
#define IOC_PORT_AON_CLK32K
uint32_t SetupGetTrimForAmpcompTh1(void)
Returns the trim value to be used for the AMPCOMP_TH1 register in OSC_DIG.
uint32_t SetupGetTrimForRcOscLfRtuneCtuneTrim(void)
Returns the trim value to be used for the RCOSCLF_RTUNE_TRIM and the RCOSCLF_CTUNE_TRIM bit fields in...
uint32_t SetupGetTrimForAmpcompTh2(void)
Returns the trim value to be used for the AMPCOMP_TH2 register in OSC_DIG.
uint32_t SetupGetTrimForDblrLoopFilterResetVoltage(uint32_t ui32Fcfg1Revision)
Returns the trim value from FCFG1 to be used as DBLR_LOOP_FILTER_RESET_VOLTAGE setting.
void SetupAfterColdResetWakeupFromShutDownCfg3(uint32_t ccfg_ModeConfReg)
Third part of configuration required when waking up from shutdown.
uint32_t SetupGetTrimForAdcShVbufEn(uint32_t ui32Fcfg1Revision)
Returns the trim value from FCFG1 to be used as ADC_SH_VBUF_EN setting.
uint32_t OSCClockSourceGet(uint32_t ui32SrcClk)
Get the source clock settings.
void DDI16BitfieldWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask, uint32_t ui32Shift, uint16_t ui32Data)
Write a bitfield via the DDI using 16-bit maskable write.
uint32_t SetupGetTrimForRadcExtCfg(uint32_t ui32Fcfg1Revision)
Returns the trim value to be used for the RADCEXTCFG register in OSC_DIG.
void SetupSetAonRtcSubSecInc(uint32_t subSecInc)
Doing the tricky stuff needed to enter new RTCSUBSECINC value.
uint32_t SetupGetTrimForRcOscLfIBiasTrim(uint32_t ui32Fcfg1Revision)
Returns the FCFG1 OSC_CONF_ATESTLF_RCOSCLF_IBIAS_TRIM.
void SetupAfterColdResetWakeupFromShutDownCfg1(uint32_t ccfg_ModeConfReg)
First part of configuration required when waking up from shutdown.
uint32_t SetupGetTrimForXoscLfRegulatorAndCmirrwrRatio(uint32_t ui32Fcfg1Revision)
Returns XOSCLF_REGULATOR_TRIM and XOSCLF_CMIRRWR_RATIO as one packet spanning bits [5:0] in the retur...
uint32_t SetupGetTrimForAnabypassValue1(uint32_t ccfg_ModeConfReg)
Returns the trim value to be used for the ANABYPASS_VALUE1 register in OSC_DIG.
void SetupSetCacheModeAccordingToCcfgSetting(void)
Set correct VIMS_MODE according to CCFG setting (CACHE or GPRAM)
uint32_t SetupGetTrimForAdcShModeEn(uint32_t ui32Fcfg1Revision)
Returns the trim value from FCFG1 to be used as ADC_SH_MODE_EN setting.
uint32_t SetupGetTrimForAmpcompCtrl(uint32_t ui32Fcfg1Revision)
Returns the trim value to be used for the AMPCOMP_CTRL register in OSC_DIG.
void IOCPortConfigureSet(uint32_t ui32IOId, uint32_t ui32PortId, uint32_t ui32IOConfig)
Set the configuration of an IO port.
void SetupSetVddrLevel(uint32_t ccfg_ModeConfReg)
Set VDDR boost mode (by setting VDDR_TRIM to FCFG1..VDDR_TRIM_HH and setting VDDS_BOD to max) ...
void DDI32RegWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val)
Write a 32 bit value to a register in the DDI slave.
uint32_t SetupGetTrimForXoscHfFastStart(void)
Returns the trim value to be used as OSC_DIG:CTL1.XOSC_HF_FAST_START.
void OSCClockSourceSet(uint32_t ui32SrcClk, uint32_t ui32Osc)
Configure the oscillator input to the a source clock.
void SetupAfterColdResetWakeupFromShutDownCfg2(uint32_t ui32Fcfg1Revision, uint32_t ccfg_ModeConfReg)
Second part of configuration required when waking up from shutdown.
uint32_t SetupGetTrimForXoscHfCtl(uint32_t ui32Fcfg1Revision)
Returns the trim value to be used for the XOSCHFCTL register in OSC_DIG.
uint32_t SetupGetTrimForXoscHfIbiastherm(void)
Returns the trim value to be used for the XOSC_HF_IBIASTHERM bit field in the ANABYPASS_VALUE2 regist...
static int32_t SetupSignExtendVddrTrimValue(uint32_t ui32VddrTrimVal)
Sign extend the VDDR_TRIM setting (special format ranging from -10 to +21)