40 #include <inc/hw_memmap.h>
41 #include <inc/hw_types.h>
42 #include <inc/hw_adi.h>
43 #include <inc/hw_adi_0_rf.h>
44 #include <inc/hw_adi_1_synth.h>
45 #include <inc/hw_adi_2_refsys.h>
46 #include <inc/hw_adi_3_refsys.h>
47 #include <inc/hw_adi_4_aux.h>
48 #include <inc/hw_aon_ioc.h>
49 #include <inc/hw_aon_sysctl.h>
50 #include <inc/hw_aon_wuc.h>
51 #include <inc/hw_aux_wuc.h>
52 #include <inc/hw_ccfg.h>
53 #include <inc/hw_chip_def.h>
54 #include <inc/hw_ddi.h>
55 #include <inc/hw_flash.h>
56 #include <inc/hw_fcfg1.h>
57 #include <inc/hw_ddi_0_osc.h>
58 #include <inc/hw_prcm.h>
59 #include <inc/hw_vims.h>
60 #include <inc/hw_aon_batmon.h>
61 #include <inc/hw_aon_rtc.h>
74 #ifdef __IAR_SYSTEMS_ICC__
75 #include <intrinsics.h>
109 #define DELAY_20_USEC 0x140
121 #define CPU_DELAY_MICRO_SECONDS( x ) \
122 CPUdelay(((uint32_t)((( x ) * 48.0 ) / 5.0 )) - 1 )
146 uint32_t vimsCtlMode0 ;
191 uint32_t ui32Fcfg1Revision;
192 uint32_t ui32AonSysResetctl;
199 if ( ui32Fcfg1Revision == 0xFFFFFFFF ) {
200 ui32Fcfg1Revision = 0;
376 uint32_t ccfg_ModeConfReg ;
377 uint32_t currentHfClock ;
378 uint32_t ccfgExtLfClk ;
379 int32_t i32VddrSleepTrim ;
380 int32_t i32VddrSleepDelta ;
381 uint32_t fcfg1OscConf ;
441 i32VddrSleepDelta = ((((int32_t)ccfg_ModeConfReg )
443 >> ( 32 - CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_W ));
445 i32VddrSleepTrim = ( i32VddrSleepTrim + i32VddrSleepDelta + 1 );
446 if ( i32VddrSleepTrim > 21 ) i32VddrSleepTrim = 21;
447 if ( i32VddrSleepTrim < -10 ) i32VddrSleepTrim = -10;
514 ( 0x20 | ( ui32Trim << 1 ));
523 ( 0x10 | ( ui32Trim ));
542 ( 0x60 | ( ui32Trim << 1 ));
553 ( 0x80 | ( ui32Trim << 3 ));
565 ( 0xFC00 | ( ui32Trim << 2 ));
717 int32_t i32SignedVddrVal = ui32VddrTrimVal;
718 if ( i32SignedVddrVal > 0x15 ) {
719 i32SignedVddrVal -= 0x20;
721 return ( i32SignedVddrVal );
747 uint32_t ui32Fcfg1Value ;
748 uint32_t ui32XoscHfRow ;
749 uint32_t ui32XoscHfCol ;
750 int32_t i32CustomerDeltaAdjust ;
751 uint32_t ui32TrimValue ;
759 ui32XoscHfRow = (( ui32Fcfg1Value &
762 ui32XoscHfCol = (( ui32Fcfg1Value &
766 i32CustomerDeltaAdjust = 0;
774 i32CustomerDeltaAdjust = ((int32_t)ccfg_ModeConfReg << 16 ) >> 24;
776 while ( i32CustomerDeltaAdjust < 0 ) {
778 if ( ui32XoscHfCol == 0 ) {
779 ui32XoscHfCol = 0xFFFF;
781 if ( ui32XoscHfRow == 0 ) {
786 i32CustomerDeltaAdjust++;
788 while ( i32CustomerDeltaAdjust > 0 ) {
789 ui32XoscHfCol = ( ui32XoscHfCol << 1 ) | 1;
790 if ( ui32XoscHfCol > 0xFFFF ) {
792 ui32XoscHfRow = ( ui32XoscHfRow << 1 ) | 1;
793 if ( ui32XoscHfRow > 0xF ) {
795 ui32XoscHfCol = 0xFFFF;
798 i32CustomerDeltaAdjust--;
805 return (ui32TrimValue);
817 uint32_t ui32TrimValue;
833 return(ui32TrimValue);
845 uint32_t ui32TrimValue;
854 return(ui32TrimValue);
865 uint32_t ui32TrimValue;
866 uint32_t ui32Fcfg1Value;
872 ui32TrimValue = ((ui32Fcfg1Value &
876 ui32TrimValue |= (((ui32Fcfg1Value &
880 ui32TrimValue |= (((ui32Fcfg1Value &
884 ui32TrimValue |= (((ui32Fcfg1Value &
889 return(ui32TrimValue);
900 uint32_t ui32TrimValue;
901 uint32_t ui32Fcfg1Value;
907 ui32TrimValue = (((ui32Fcfg1Value &
911 ui32TrimValue |= (((ui32Fcfg1Value &
915 ui32TrimValue |= (((ui32Fcfg1Value &
919 ui32TrimValue |= (((ui32Fcfg1Value &
924 return(ui32TrimValue);
935 uint32_t ui32TrimValue ;
936 uint32_t ui32Fcfg1Value ;
937 uint32_t ibiasOffset ;
940 int32_t deltaAdjust ;
947 ibiasOffset = ( ui32Fcfg1Value &
950 ibiasInit = ( ui32Fcfg1Value &
960 deltaAdjust += (int32_t)ibiasOffset;
961 if ( deltaAdjust < 0 ) {
967 ibiasOffset = (uint32_t)deltaAdjust;
970 deltaAdjust += (int32_t)ibiasInit;
971 if ( deltaAdjust < 0 ) {
977 ibiasInit = (uint32_t)deltaAdjust;
982 ui32TrimValue |= (((ui32Fcfg1Value &
986 ui32TrimValue |= (((ui32Fcfg1Value &
990 ui32TrimValue |= (((ui32Fcfg1Value &
995 if ( ui32Fcfg1Revision >= 0x00000022 ) {
996 ui32TrimValue |= ((( ui32Fcfg1Value &
1002 return(ui32TrimValue);
1013 uint32_t dblrLoopFilterResetVoltageValue = 0;
1015 if ( ui32Fcfg1Revision >= 0x00000020 ) {
1021 return ( dblrLoopFilterResetVoltageValue );
1032 uint32_t getTrimForAdcShModeEnValue = 1;
1034 if ( ui32Fcfg1Revision >= 0x00000022 ) {
1040 return ( getTrimForAdcShModeEnValue );
1051 uint32_t getTrimForAdcShVbufEnValue = 1;
1053 if ( ui32Fcfg1Revision >= 0x00000022 ) {
1059 return ( getTrimForAdcShVbufEnValue );
1070 uint32_t getTrimForXoschfCtlValue = 0;
1073 if ( ui32Fcfg1Revision >= 0x00000020 ) {
1075 getTrimForXoschfCtlValue =
1080 getTrimForXoschfCtlValue |=
1085 getTrimForXoschfCtlValue |=
1091 return ( getTrimForXoschfCtlValue );
1102 uint32_t ui32XoscHfFastStartValue ;
1109 return ( ui32XoscHfFastStartValue );
1120 uint32_t getTrimForRadcExtCfgValue = 0x403F8000;
1123 if ( ui32Fcfg1Revision >= 0x00000020 ) {
1125 getTrimForRadcExtCfgValue =
1130 getTrimForRadcExtCfgValue |=
1135 getTrimForRadcExtCfgValue |=
1141 return ( getTrimForRadcExtCfgValue );
1152 uint32_t trimForRcOscLfIBiasTrimValue = 0;
1154 if ( ui32Fcfg1Revision >= 0x00000022 ) {
1160 return ( trimForRcOscLfIBiasTrimValue );
1172 uint32_t trimForXoscLfRegulatorAndCmirrwrRatioValue = 0;
1174 if ( ui32Fcfg1Revision >= 0x00000022 ) {
1181 return ( trimForXoscLfRegulatorAndCmirrwrRatioValue );
static void SysCtrlAonSync(void)
Sync all accesses to the AON register interface.
#define IOC_PORT_AON_CLK32K
static void DDI32RegWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val)
Write a 32 bit value to a register in the DDI slave.
#define AUX_WUC_POWER_DOWN
static void HapiTrimDevicePowerDown(void)
Trims to be applied when coming from POWER_DOWN (also called when coming from SHUTDOWN and PIN_RESET)...
static void HapiTrimDeviceShutDown(uint32_t ui32Fcfg1Revision)
Trims to be applied when coming from SHUTDOWN (also called when coming from PIN_RESET).
static uint32_t GetTrimForRadcExtCfg(uint32_t ui32Fcfg1Revision)
Returns the trim value to be used for the RADCEXTCFG register in OSC_DIG.
void AUXWUCPowerCtrl(uint32_t ui32PowerMode)
Control the power to the AUX domain.
static uint32_t GetTrimForRcOscLfRtuneCtuneTrim(void)
Returns the trim value to be used for the RCOSCLF_RTUNE_TRIM and the RCOSCLF_CTUNE_TRIM bit fields in...
uint32_t OSCClockSourceGet(uint32_t ui32SrcClk)
Get the source clock settings.
void DDI16BitfieldWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask, uint32_t ui32Shift, uint16_t ui32Data)
Write a bitfield via the DDI using 16-bit maskable write.
int32_t SignExtendVddrTrimValue(uint32_t ui32VddrTrimVal)
Sign extend the VDDR_TRIM setting (special format ranging from -10 to +21)
static uint32_t GetTrimForRcOscLfIBiasTrim(uint32_t ui32Fcfg1Revision)
Returns the FCFG1 OSC_CONF_ATESTLF_RCOSCLF_IBIAS_TRIM.
void ThisCodeIsBuiltForCC26xxHwRev22AndLater_HaltIfViolated(void)
Verifies that current chip is built for CC26xx HwRev 2.2 or later and never returns if violated...
static uint32_t GetTrimForXoscLfRegulatorAndCmirrwrRatio(uint32_t ui32Fcfg1Revision)
Returns XOSCLF_REGULATOR_TRIM and XOSCLF_CMIRRWR_RATIO as one packet spanning bits [5:0] in the retur...
static uint32_t GetTrimForAmpcompTh2(void)
Returns the trim value to be used for the AMPCOMP_TH2 register in OSC_DIG.
static uint32_t GetTrimForAnabypassValue1(uint32_t ccfg_ModeConfReg)
Returns the trim value to be used for the ANABYPASS_VALUE1 register in OSC_DIG.
static uint32_t GetTrimForDblrLoopFilterResetVoltage(uint32_t ui32Fcfg1Revision)
Returns the trim value from FCFG1 to be used as DBLR_LOOP_FILTER_RESET_VOLTAGE setting.
static void HapiTrimDeviceColdReset(void)
Trims to be applied when coming from PIN_RESET.
static uint32_t GetTrimForXoscHfFastStart(void)
Returns the trim value to be used as OSC_DIG:CTL1.XOSC_HF_FAST_START.
static uint32_t GetTrimForAdcShVbufEn(uint32_t ui32Fcfg1Revision)
Returns the trim value from FCFG1 to be used as ADC_SH_VBUF_EN setting.
void IOCPortConfigureSet(uint32_t ui32IOId, uint32_t ui32PortId, uint32_t ui32IOConfig)
Set the configuration of an IO port.
static uint32_t GetTrimForXoscHfCtl(uint32_t ui32Fcfg1Revision)
Returns the trim value to be used for the XOSCHFCTL register in OSC_DIG.
static uint32_t GetTrimForAdcShModeEn(uint32_t ui32Fcfg1Revision)
Returns the trim value from FCFG1 to be used as ADC_SH_MODE_EN setting.
static void SetAonRtcSubSecInc(uint32_t subSecInc)
Doing the tricky stuff needed to enter new RTCSUBSECINC value.
static uint32_t GetTrimForXoscHfIbiastherm(void)
Returns the trim value to be used for the XOSC_HF_IBIASTHERM bit field in the ANABYPASS_VALUE2 regist...
void OSCClockSourceSet(uint32_t ui32SrcClk, uint32_t ui32Osc)
Configure the oscillator input to the a source clock.
static void SetupCacheModeAccordingToCcfgSetting(void)
Set correct VIMS_MODE according to CCFG setting (CACHE or GPRAM)
static uint32_t GetTrimForAmpcompTh1(void)
Returns the trim value to be used for the AMPCOMP_TH1 register in OSC_DIG.
static uint32_t GetTrimForAmpcompCtrl(uint32_t ui32Fcfg1Revision)
Returns the trim value to be used for the AMPCOMP_CTRL register in OSC_DIG.
void trimDevice(void)
Performs the necessary trim of the device which is not done in boot code.
static void AONWUCJtagPowerOff(void)
Request power off of the JTAG domain.