65 #include <inc/hw_types.h>
66 #include <inc/hw_memmap.h>
67 #include <inc/hw_cpu_scs.h>
83 #define CPUcpsid NOROM_CPUcpsid
84 #define CPUprimask NOROM_CPUprimask
85 #define CPUcpsie NOROM_CPUcpsie
86 #define CPUbasepriGet NOROM_CPUbasepriGet
87 #define CPUdelay NOROM_CPUdelay
144 #if defined(__IAR_SYSTEMS_ICC__)
153 #elif defined(__CC_ARM) || defined(__ARMCC_VERSION)
154 __asm __STATIC_INLINE
void
163 #elif defined(__TI_COMPILER_VERSION__) || defined(DOXYGEN)
173 __STATIC_INLINE
void __attribute__((always_inline))
193 #if defined(__IAR_SYSTEMS_ICC__)
202 #elif defined(__CC_ARM) || defined(__ARMCC_VERSION)
203 __asm __STATIC_INLINE
void
212 #elif defined(__TI_COMPILER_VERSION__) || defined(DOXYGEN)
222 __STATIC_INLINE
void __attribute__((always_inline))
242 #if defined(__IAR_SYSTEMS_ICC__)
251 #elif defined(__CC_ARM) || defined(__ARMCC_VERSION)
252 __asm __STATIC_INLINE
void
261 #elif defined(__TI_COMPILER_VERSION__) || defined(DOXYGEN)
271 __STATIC_INLINE
void __attribute__((always_inline))
294 #if defined(__IAR_SYSTEMS_ICC__)
301 __asm(
" msr BASEPRI, r0\n");
303 #elif defined(__CC_ARM) || defined(__ARMCC_VERSION)
304 __asm __STATIC_INLINE
void
313 #elif defined(__TI_COMPILER_VERSION__) || defined(DOXYGEN)
320 __asm(
" msr BASEPRI, r0\n");
323 #pragma GCC diagnostic push
324 #pragma GCC diagnostic ignored "-Wattributes"
325 __STATIC_INLINE
void __attribute__ ((naked))
331 __asm(
" msr BASEPRI, r0\n"
334 #pragma GCC diagnostic pop
364 extern void CPUdelay(uint32_t ui32Count);
412 #if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
416 #define CPUcpsid ROM_CPUcpsid
418 #ifdef ROM_CPUprimask
420 #define CPUprimask ROM_CPUprimask
424 #define CPUcpsie ROM_CPUcpsie
426 #ifdef ROM_CPUbasepriGet
428 #define CPUbasepriGet ROM_CPUbasepriGet
432 #define CPUdelay ROM_CPUdelay
static void CPU_WriteBufferDisable(void)
Disable CPU write buffering (recommended for debug purpose only).
uint32_t CPUprimask(void)
Get the current interrupt state.
static void CPUbasepriSet(uint32_t ui32NewBasepri)
Update the interrupt priority disable level.
static void CPU_WriteBufferEnable(void)
Enable CPU write buffering (default setting).
static void CPUwfi(void)
Wait for interrupt.
uint32_t CPUcpsid(void)
Disable all external interrupts.
__asm(" .sect \".text:NOROM_CPUdelay\"\n"" .clink\n"" .thumbfunc NOROM_CPUdelay\n"" .thumb\n"" .global NOROM_CPUdelay\n""NOROM_CPUdelay:\n"" subs r0, #1\n"" bne.n NOROM_CPUdelay\n"" bx lr\n")
Provide a small delay.
static void CPUwfe(void)
Wait for event.
uint32_t CPUcpsie(void)
Enable all external interrupts.
static void CPUsev(void)
Send event.
uint32_t CPUbasepriGet(void)
Get the interrupt priority disable level.
void CPUdelay(uint32_t ui32Count)
Provide a small delay.