64 #include <inc/hw_types.h>
65 #include <inc/hw_uart.h>
66 #include <inc/hw_memmap.h>
67 #include <inc/hw_ints.h>
85 #define UARTFIFOLevelGet NOROM_UARTFIFOLevelGet
86 #define UARTConfigSetExpClk NOROM_UARTConfigSetExpClk
87 #define UARTConfigGetExpClk NOROM_UARTConfigGetExpClk
88 #define UARTDisable NOROM_UARTDisable
89 #define UARTCharGetNonBlocking NOROM_UARTCharGetNonBlocking
90 #define UARTCharGet NOROM_UARTCharGet
91 #define UARTCharPutNonBlocking NOROM_UARTCharPutNonBlocking
92 #define UARTCharPut NOROM_UARTCharPut
93 #define UARTIntRegister NOROM_UARTIntRegister
94 #define UARTIntUnregister NOROM_UARTIntUnregister
103 #define UART_INT_OE 0x400 // Overrun Error Interrupt Mask
104 #define UART_INT_BE 0x200 // Break Error Interrupt Mask
105 #define UART_INT_PE 0x100 // Parity Error Interrupt Mask
106 #define UART_INT_FE 0x080 // Framing Error Interrupt Mask
107 #define UART_INT_RT 0x040 // Receive Timeout Interrupt Mask
108 #define UART_INT_TX 0x020 // Transmit Interrupt Mask
109 #define UART_INT_RX 0x010 // Receive Interrupt Mask
110 #define UART_INT_CTS 0x002 // CTS Modem Interrupt Mask
121 #define UART_CONFIG_WLEN_MASK 0x00000060 // Mask for extracting word length
122 #define UART_CONFIG_WLEN_8 0x00000060 // 8 bit data
123 #define UART_CONFIG_WLEN_7 0x00000040 // 7 bit data
124 #define UART_CONFIG_WLEN_6 0x00000020 // 6 bit data
125 #define UART_CONFIG_WLEN_5 0x00000000 // 5 bit data
126 #define UART_CONFIG_STOP_MASK 0x00000008 // Mask for extracting stop bits
127 #define UART_CONFIG_STOP_ONE 0x00000000 // One stop bit
128 #define UART_CONFIG_STOP_TWO 0x00000008 // Two stop bits
129 #define UART_CONFIG_PAR_MASK 0x00000086 // Mask for extracting parity
130 #define UART_CONFIG_PAR_NONE 0x00000000 // No parity
131 #define UART_CONFIG_PAR_EVEN 0x00000006 // Even parity
132 #define UART_CONFIG_PAR_ODD 0x00000002 // Odd parity
133 #define UART_CONFIG_PAR_ONE 0x00000082 // Parity bit is one
134 #define UART_CONFIG_PAR_ZERO 0x00000086 // Parity bit is zero
142 #define UART_FIFO_TX1_8 0x00000000 // Transmit interrupt at 1/8 Full
143 #define UART_FIFO_TX2_8 0x00000001 // Transmit interrupt at 1/4 Full
144 #define UART_FIFO_TX4_8 0x00000002 // Transmit interrupt at 1/2 Full
145 #define UART_FIFO_TX6_8 0x00000003 // Transmit interrupt at 3/4 Full
146 #define UART_FIFO_TX7_8 0x00000004 // Transmit interrupt at 7/8 Full
154 #define UART_FIFO_RX1_8 0x00000000 // Receive interrupt at 1/8 Full
155 #define UART_FIFO_RX2_8 0x00000008 // Receive interrupt at 1/4 Full
156 #define UART_FIFO_RX4_8 0x00000010 // Receive interrupt at 1/2 Full
157 #define UART_FIFO_RX6_8 0x00000018 // Receive interrupt at 3/4 Full
158 #define UART_FIFO_RX7_8 0x00000020 // Receive interrupt at 7/8 Full
165 #define UART_DMA_ERR_RXSTOP 0x00000004 // Stop DMA receive if UART error
166 #define UART_DMA_TX 0x00000002 // Enable DMA for transmit
167 #define UART_DMA_RX 0x00000001 // Enable DMA for receive
174 #define UART_RXERROR_OVERRUN 0x00000008
175 #define UART_RXERROR_BREAK 0x00000004
176 #define UART_RXERROR_PARITY 0x00000002
177 #define UART_RXERROR_FRAMING 0x00000001
184 #define UART_BUSY 0x00000001
185 #define UART_IDLE 0x00000000
193 #ifdef DRIVERLIB_DEBUG
209 UARTBaseValid(uint32_t ui32Base)
241 ASSERT(UARTBaseValid(ui32Base));
273 __STATIC_INLINE uint32_t
279 ASSERT(UARTBaseValid(ui32Base));
314 uint32_t ui32RxLevel)
319 ASSERT(UARTBaseValid(ui32Base));
334 HWREG(ui32Base +
UART_O_IFLS) = ui32TxLevel | ui32RxLevel;
364 uint32_t *pui32RxLevel);
400 uint32_t ui32Baud, uint32_t ui32Config);
425 uint32_t *pui32Baud, uint32_t *pui32Config);
445 ASSERT(UARTBaseValid(ui32Base));
490 ASSERT(UARTBaseValid(ui32Base));
515 ASSERT(UARTBaseValid(ui32Base));
543 ASSERT(UARTBaseValid(ui32Base));
571 ASSERT(UARTBaseValid(ui32Base));
649 extern void UARTCharPut(uint32_t ui32Base, uint8_t ui8Data);
673 ASSERT(UARTBaseValid(ui32Base));
703 ASSERT(UARTBaseValid(ui32Base));
733 extern void UARTIntRegister(uint32_t ui32Base,
void (*pfnHandler)(
void));
783 ASSERT(UARTBaseValid(ui32Base));
819 ASSERT(UARTBaseValid(ui32Base));
851 __STATIC_INLINE uint32_t
857 ASSERT(UARTBaseValid(ui32Base));
916 ASSERT(UARTBaseValid(ui32Base));
951 ASSERT(UARTBaseValid(ui32Base));
982 ASSERT(UARTBaseValid(ui32Base));
1009 __STATIC_INLINE uint32_t
1015 ASSERT(UARTBaseValid(ui32Base));
1020 return(HWREG(ui32Base +
UART_O_RSR) & 0x0000000F);
1037 __STATIC_INLINE
void
1043 ASSERT(UARTBaseValid(ui32Base));
1063 __STATIC_INLINE
void
1069 ASSERT( UARTBaseValid( ui32Base ));
1085 __STATIC_INLINE
void
1091 ASSERT( UARTBaseValid( ui32Base ));
1103 #if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
1105 #ifdef ROM_UARTFIFOLevelGet
1106 #undef UARTFIFOLevelGet
1107 #define UARTFIFOLevelGet ROM_UARTFIFOLevelGet
1109 #ifdef ROM_UARTConfigSetExpClk
1110 #undef UARTConfigSetExpClk
1111 #define UARTConfigSetExpClk ROM_UARTConfigSetExpClk
1113 #ifdef ROM_UARTConfigGetExpClk
1114 #undef UARTConfigGetExpClk
1115 #define UARTConfigGetExpClk ROM_UARTConfigGetExpClk
1117 #ifdef ROM_UARTDisable
1119 #define UARTDisable ROM_UARTDisable
1121 #ifdef ROM_UARTCharGetNonBlocking
1122 #undef UARTCharGetNonBlocking
1123 #define UARTCharGetNonBlocking ROM_UARTCharGetNonBlocking
1125 #ifdef ROM_UARTCharGet
1127 #define UARTCharGet ROM_UARTCharGet
1129 #ifdef ROM_UARTCharPutNonBlocking
1130 #undef UARTCharPutNonBlocking
1131 #define UARTCharPutNonBlocking ROM_UARTCharPutNonBlocking
1133 #ifdef ROM_UARTCharPut
1135 #define UARTCharPut ROM_UARTCharPut
1137 #ifdef ROM_UARTIntRegister
1138 #undef UARTIntRegister
1139 #define UARTIntRegister ROM_UARTIntRegister
1141 #ifdef ROM_UARTIntUnregister
1142 #undef UARTIntUnregister
1143 #define UARTIntUnregister ROM_UARTIntUnregister
1156 #endif // __UART_H__
void UARTCharPut(uint32_t ui32Base, uint8_t ui8Data)
Waits to send a character from the specified port.
#define UART_CONFIG_PAR_ODD
static void UARTFIFODisable(uint32_t ui32Base)
Disables the transmit and receive FIFOs.
static void UARTIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags)
Enables individual UART interrupt sources.
static void UARTFIFOLevelSet(uint32_t ui32Base, uint32_t ui32TxLevel, uint32_t ui32RxLevel)
Sets the FIFO level at which interrupts are generated.
static uint32_t UARTIntStatus(uint32_t ui32Base, bool bMasked)
Gets the current interrupt status.
void UARTConfigSetExpClk(uint32_t ui32Base, uint32_t ui32UARTClk, uint32_t ui32Baud, uint32_t ui32Config)
Sets the configuration of a UART.
static void UARTHwFlowControlEnable(uint32_t ui32Base)
Enables hardware flow control for both CTS and RTS.
void UARTIntRegister(uint32_t ui32Base, void(*pfnHandler)(void))
Registers an interrupt handler for a UART interrupt.
static void UARTIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags)
Disables individual UART interrupt sources.
void UARTDisable(uint32_t ui32Base)
Disables transmitting and receiving.
static void UARTFIFOEnable(uint32_t ui32Base)
Enables the transmit and receive FIFOs.
int32_t UARTCharGetNonBlocking(uint32_t ui32Base)
Receives a character from the specified port.
#define UART_CONFIG_PAR_EVEN
static void UARTBreakCtl(uint32_t ui32Base, bool bBreakState)
Causes a BREAK to be sent.
static bool UARTBusy(uint32_t ui32Base)
Determines whether the UART transmitter is busy or not.
static void UARTEnable(uint32_t ui32Base)
Enables transmitting and receiving.
static bool UARTSpaceAvail(uint32_t ui32Base)
Determines if there is any space in the transmit FIFO.
void UARTConfigGetExpClk(uint32_t ui32Base, uint32_t ui32UARTClk, uint32_t *pui32Baud, uint32_t *pui32Config)
Gets the current configuration of a UART.
static bool UARTCharsAvail(uint32_t ui32Base)
Determines if there are any characters in the receive FIFO.
#define UART_CONFIG_PAR_NONE
int32_t UARTCharGet(uint32_t ui32Base)
Waits for a character from the specified port.
#define UART_CONFIG_PAR_ZERO
static void UARTRxErrorClear(uint32_t ui32Base)
Clears all reported receiver errors.
static void UARTDMADisable(uint32_t ui32Base, uint32_t ui32DMAFlags)
Disable UART DMA operation.
static uint32_t UARTRxErrorGet(uint32_t ui32Base)
Gets current receiver errors.
static void UARTParityModeSet(uint32_t ui32Base, uint32_t ui32Parity)
Sets the type of parity.
bool UARTCharPutNonBlocking(uint32_t ui32Base, uint8_t ui8Data)
Sends a character to the specified port.
void UARTFIFOLevelGet(uint32_t ui32Base, uint32_t *pui32TxLevel, uint32_t *pui32RxLevel)
Gets the FIFO level at which interrupts are generated.
static void UARTDMAEnable(uint32_t ui32Base, uint32_t ui32DMAFlags)
Enable UART DMA operation.
void UARTIntUnregister(uint32_t ui32Base)
Unregisters an interrupt handler for a UART interrupt.
static void UARTIntClear(uint32_t ui32Base, uint32_t ui32IntFlags)
Clears UART interrupt sources.
#define UART_CONFIG_PAR_ONE
static uint32_t UARTParityModeGet(uint32_t ui32Base)
Gets the type of parity currently being used.
static void UARTHwFlowControlDisable(uint32_t ui32Base)
Disables hardware flow control for both CTS and RTS.