CC13xx Driver Library
uart.h
Go to the documentation of this file.
1 /******************************************************************************
2 * Filename: uart.h
3 * Revised: 2015-09-21 15:19:36 +0200 (Mon, 21 Sep 2015)
4 * Revision: 44629
5 *
6 * Description: Defines and prototypes for the UART.
7 *
8 * Copyright (c) 2015, Texas Instruments Incorporated
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions are met:
13 *
14 * 1) Redistributions of source code must retain the above copyright notice,
15 * this list of conditions and the following disclaimer.
16 *
17 * 2) Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 *
21 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may
22 * be used to endorse or promote products derived from this software without
23 * specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
29 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 *
37 ******************************************************************************/
38 
39 //*****************************************************************************
40 //
45 //
46 //*****************************************************************************
47 
48 #ifndef __UART_H__
49 #define __UART_H__
50 
51 //*****************************************************************************
52 //
53 // If building with a C++ compiler, make all of the definitions in this header
54 // have a C binding.
55 //
56 //*****************************************************************************
57 #ifdef __cplusplus
58 extern "C"
59 {
60 #endif
61 
62 #include <stdbool.h>
63 #include <stdint.h>
64 #include <inc/hw_types.h>
65 #include <inc/hw_uart.h>
66 #include <inc/hw_memmap.h>
67 #include <inc/hw_ints.h>
68 #include <driverlib/interrupt.h>
69 #include <driverlib/debug.h>
70 
71 //*****************************************************************************
72 //
73 // Support for DriverLib in ROM:
74 // This section renames all functions that are not "static inline", so that
75 // calling these functions will default to implementation in flash. At the end
76 // of this file a second renaming will change the defaults to implementation in
77 // ROM for available functions.
78 //
79 // To force use of the implementation in flash, e.g. for debugging:
80 // - Globally: Define DRIVERLIB_NOROM at project level
81 // - Per function: Use prefix "NOROM_" when calling the function
82 //
83 //*****************************************************************************
84 #if !defined(DOXYGEN)
85  #define UARTFIFOLevelGet NOROM_UARTFIFOLevelGet
86  #define UARTConfigSetExpClk NOROM_UARTConfigSetExpClk
87  #define UARTConfigGetExpClk NOROM_UARTConfigGetExpClk
88  #define UARTDisable NOROM_UARTDisable
89  #define UARTCharGetNonBlocking NOROM_UARTCharGetNonBlocking
90  #define UARTCharGet NOROM_UARTCharGet
91  #define UARTCharPutNonBlocking NOROM_UARTCharPutNonBlocking
92  #define UARTCharPut NOROM_UARTCharPut
93  #define UARTIntRegister NOROM_UARTIntRegister
94  #define UARTIntUnregister NOROM_UARTIntUnregister
95 #endif
96 
97 //*****************************************************************************
98 //
99 // Values that can be passed to UARTIntEnable, UARTIntDisable, and UARTIntClear
100 // as the ui32IntFlags parameter, and returned from UARTIntStatus.
101 //
102 //*****************************************************************************
103 #define UART_INT_OE 0x400 // Overrun Error Interrupt Mask
104 #define UART_INT_BE 0x200 // Break Error Interrupt Mask
105 #define UART_INT_PE 0x100 // Parity Error Interrupt Mask
106 #define UART_INT_FE 0x080 // Framing Error Interrupt Mask
107 #define UART_INT_RT 0x040 // Receive Timeout Interrupt Mask
108 #define UART_INT_TX 0x020 // Transmit Interrupt Mask
109 #define UART_INT_RX 0x010 // Receive Interrupt Mask
110 #define UART_INT_CTS 0x002 // CTS Modem Interrupt Mask
111 
112 //*****************************************************************************
113 //
114 // Values that can be passed to UARTConfigSetExpClk as the ui32Config parameter
115 // and returned by UARTConfigGetExpClk in the pui32Config parameter.
116 // Additionally, the UART_CONFIG_PAR_* subset can be passed to
117 // UARTParityModeSet as the ui32Parity parameter, and are returned by
118 // UARTParityModeGet.
119 //
120 //*****************************************************************************
121 #define UART_CONFIG_WLEN_MASK 0x00000060 // Mask for extracting word length
122 #define UART_CONFIG_WLEN_8 0x00000060 // 8 bit data
123 #define UART_CONFIG_WLEN_7 0x00000040 // 7 bit data
124 #define UART_CONFIG_WLEN_6 0x00000020 // 6 bit data
125 #define UART_CONFIG_WLEN_5 0x00000000 // 5 bit data
126 #define UART_CONFIG_STOP_MASK 0x00000008 // Mask for extracting stop bits
127 #define UART_CONFIG_STOP_ONE 0x00000000 // One stop bit
128 #define UART_CONFIG_STOP_TWO 0x00000008 // Two stop bits
129 #define UART_CONFIG_PAR_MASK 0x00000086 // Mask for extracting parity
130 #define UART_CONFIG_PAR_NONE 0x00000000 // No parity
131 #define UART_CONFIG_PAR_EVEN 0x00000006 // Even parity
132 #define UART_CONFIG_PAR_ODD 0x00000002 // Odd parity
133 #define UART_CONFIG_PAR_ONE 0x00000082 // Parity bit is one
134 #define UART_CONFIG_PAR_ZERO 0x00000086 // Parity bit is zero
135 
136 //*****************************************************************************
137 //
138 // Values that can be passed to UARTFIFOLevelSet as the ui32TxLevel parameter
139 // and returned by UARTFIFOLevelGet in the pui32TxLevel.
140 //
141 //*****************************************************************************
142 #define UART_FIFO_TX1_8 0x00000000 // Transmit interrupt at 1/8 Full
143 #define UART_FIFO_TX2_8 0x00000001 // Transmit interrupt at 1/4 Full
144 #define UART_FIFO_TX4_8 0x00000002 // Transmit interrupt at 1/2 Full
145 #define UART_FIFO_TX6_8 0x00000003 // Transmit interrupt at 3/4 Full
146 #define UART_FIFO_TX7_8 0x00000004 // Transmit interrupt at 7/8 Full
147 
148 //*****************************************************************************
149 //
150 // Values that can be passed to UARTFIFOLevelSet as the ui32RxLevel parameter
151 // and returned by UARTFIFOLevelGet in the pui32RxLevel.
152 //
153 //*****************************************************************************
154 #define UART_FIFO_RX1_8 0x00000000 // Receive interrupt at 1/8 Full
155 #define UART_FIFO_RX2_8 0x00000008 // Receive interrupt at 1/4 Full
156 #define UART_FIFO_RX4_8 0x00000010 // Receive interrupt at 1/2 Full
157 #define UART_FIFO_RX6_8 0x00000018 // Receive interrupt at 3/4 Full
158 #define UART_FIFO_RX7_8 0x00000020 // Receive interrupt at 7/8 Full
159 
160 //*****************************************************************************
161 //
162 // Values that can be passed to UARTDMAEnable() and UARTDMADisable().
163 //
164 //*****************************************************************************
165 #define UART_DMA_ERR_RXSTOP 0x00000004 // Stop DMA receive if UART error
166 #define UART_DMA_TX 0x00000002 // Enable DMA for transmit
167 #define UART_DMA_RX 0x00000001 // Enable DMA for receive
168 
169 //*****************************************************************************
170 //
171 // Values returned from UARTRxErrorGet().
172 //
173 //*****************************************************************************
174 #define UART_RXERROR_OVERRUN 0x00000008
175 #define UART_RXERROR_BREAK 0x00000004
176 #define UART_RXERROR_PARITY 0x00000002
177 #define UART_RXERROR_FRAMING 0x00000001
178 
179 //*****************************************************************************
180 //
181 // Values returned from the UARTBusy().
182 //
183 //*****************************************************************************
184 #define UART_BUSY 0x00000001
185 #define UART_IDLE 0x00000000
186 
187 //*****************************************************************************
188 //
189 // API Functions and prototypes
190 //
191 //*****************************************************************************
192 
193 #ifdef DRIVERLIB_DEBUG
194 //*****************************************************************************
195 //
206 //
207 //*****************************************************************************
208 static bool
209 UARTBaseValid(uint32_t ui32Base)
210 {
211  return(ui32Base == UART0_BASE);
212 }
213 #endif
214 
215 //*****************************************************************************
216 //
233 //
234 //*****************************************************************************
235 __STATIC_INLINE void
236 UARTParityModeSet(uint32_t ui32Base, uint32_t ui32Parity)
237 {
238  //
239  // Check the arguments.
240  //
241  ASSERT(UARTBaseValid(ui32Base));
242  ASSERT((ui32Parity == UART_CONFIG_PAR_NONE) ||
243  (ui32Parity == UART_CONFIG_PAR_EVEN) ||
244  (ui32Parity == UART_CONFIG_PAR_ODD) ||
245  (ui32Parity == UART_CONFIG_PAR_ONE) ||
246  (ui32Parity == UART_CONFIG_PAR_ZERO));
247 
248  //
249  // Set the parity mode.
250  //
251  HWREG(ui32Base + UART_O_LCRH) = ((HWREG(ui32Base + UART_O_LCRH) &
253  UART_LCRH_PEN)) | ui32Parity);
254 }
255 
256 //*****************************************************************************
257 //
271 //
272 //*****************************************************************************
273 __STATIC_INLINE uint32_t
274 UARTParityModeGet(uint32_t ui32Base)
275 {
276  //
277  // Check the arguments.
278  //
279  ASSERT(UARTBaseValid(ui32Base));
280 
281  //
282  // Return the current parity setting
283  //
284  return(HWREG(ui32Base + UART_O_LCRH) &
286 }
287 
288 //*****************************************************************************
289 //
310 //
311 //*****************************************************************************
312 __STATIC_INLINE void
313 UARTFIFOLevelSet(uint32_t ui32Base, uint32_t ui32TxLevel,
314  uint32_t ui32RxLevel)
315 {
316  //
317  // Check the arguments.
318  //
319  ASSERT(UARTBaseValid(ui32Base));
320  ASSERT((ui32TxLevel == UART_FIFO_TX1_8) ||
321  (ui32TxLevel == UART_FIFO_TX2_8) ||
322  (ui32TxLevel == UART_FIFO_TX4_8) ||
323  (ui32TxLevel == UART_FIFO_TX6_8) ||
324  (ui32TxLevel == UART_FIFO_TX7_8));
325  ASSERT((ui32RxLevel == UART_FIFO_RX1_8) ||
326  (ui32RxLevel == UART_FIFO_RX2_8) ||
327  (ui32RxLevel == UART_FIFO_RX4_8) ||
328  (ui32RxLevel == UART_FIFO_RX6_8) ||
329  (ui32RxLevel == UART_FIFO_RX7_8));
330 
331  //
332  // Set the FIFO interrupt levels.
333  //
334  HWREG(ui32Base + UART_O_IFLS) = ui32TxLevel | ui32RxLevel;
335 }
336 
337 //*****************************************************************************
338 //
361 //
362 //*****************************************************************************
363 extern void UARTFIFOLevelGet(uint32_t ui32Base, uint32_t *pui32TxLevel,
364  uint32_t *pui32RxLevel);
365 
366 //*****************************************************************************
367 //
397 //
398 //*****************************************************************************
399 extern void UARTConfigSetExpClk(uint32_t ui32Base, uint32_t ui32UARTClk,
400  uint32_t ui32Baud, uint32_t ui32Config);
401 
402 //*****************************************************************************
403 //
422 //
423 //*****************************************************************************
424 extern void UARTConfigGetExpClk(uint32_t ui32Base, uint32_t ui32UARTClk,
425  uint32_t *pui32Baud, uint32_t *pui32Config);
426 
427 //*****************************************************************************
428 //
437 //
438 //*****************************************************************************
439 __STATIC_INLINE void
440 UARTEnable(uint32_t ui32Base)
441 {
442  //
443  // Check the arguments.
444  //
445  ASSERT(UARTBaseValid(ui32Base));
446 
447  //
448  // Enable the FIFO.
449  //
450  HWREG(ui32Base + UART_O_LCRH) |= UART_LCRH_FEN;
451 
452  //
453  // Enable RX, TX, and the UART.
454  //
455  HWREG(ui32Base + UART_O_CTL) |= (UART_CTL_UARTEN | UART_CTL_TXE |
456  UART_CTL_RXE);
457 }
458 
459 //*****************************************************************************
460 //
469 //
470 //*****************************************************************************
471 extern void UARTDisable(uint32_t ui32Base);
472 
473 //*****************************************************************************
474 //
482 //
483 //*****************************************************************************
484 __STATIC_INLINE void
485 UARTFIFOEnable(uint32_t ui32Base)
486 {
487  //
488  // Check the arguments.
489  //
490  ASSERT(UARTBaseValid(ui32Base));
491 
492  //
493  // Enable the FIFO.
494  //
495  HWREG(ui32Base + UART_O_LCRH) |= UART_LCRH_FEN;
496 }
497 
498 //*****************************************************************************
499 //
507 //
508 //*****************************************************************************
509 __STATIC_INLINE void
510 UARTFIFODisable(uint32_t ui32Base)
511 {
512  //
513  // Check the arguments.
514  //
515  ASSERT(UARTBaseValid(ui32Base));
516 
517  //
518  // Disable the FIFO.
519  //
520  HWREG(ui32Base + UART_O_LCRH) &= ~(UART_LCRH_FEN);
521 }
522 
523 //*****************************************************************************
524 //
535 //
536 //*****************************************************************************
537 __STATIC_INLINE bool
538 UARTCharsAvail(uint32_t ui32Base)
539 {
540  //
541  // Check the arguments.
542  //
543  ASSERT(UARTBaseValid(ui32Base));
544 
545  //
546  // Return the availability of characters.
547  //
548  return((HWREG(ui32Base + UART_O_FR) & UART_FR_RXFE) ? false : true);
549 }
550 
551 //*****************************************************************************
552 //
563 //
564 //*****************************************************************************
565 __STATIC_INLINE bool
566 UARTSpaceAvail(uint32_t ui32Base)
567 {
568  //
569  // Check the arguments.
570  //
571  ASSERT(UARTBaseValid(ui32Base));
572 
573  //
574  // Return the availability of space.
575  //
576  return((HWREG(ui32Base + UART_O_FR) & UART_FR_TXFF) ? false : true);
577 }
578 
579 //*****************************************************************************
580 //
596 //
597 //*****************************************************************************
598 extern int32_t UARTCharGetNonBlocking(uint32_t ui32Base);
599 
600 //*****************************************************************************
601 //
612 //
613 //*****************************************************************************
614 extern int32_t UARTCharGet(uint32_t ui32Base);
615 
616 //*****************************************************************************
617 //
631 //
632 //*****************************************************************************
633 extern bool UARTCharPutNonBlocking(uint32_t ui32Base, uint8_t ui8Data);
634 
635 //*****************************************************************************
636 //
647 //
648 //*****************************************************************************
649 extern void UARTCharPut(uint32_t ui32Base, uint8_t ui8Data);
650 
651 //*****************************************************************************
652 //
665 //
666 //*****************************************************************************
667 __STATIC_INLINE bool
668 UARTBusy(uint32_t ui32Base)
669 {
670  //
671  // Check the argument.
672  //
673  ASSERT(UARTBaseValid(ui32Base));
674 
675  //
676  // Determine if the UART is busy.
677  //
678  return((HWREG(ui32Base + UART_O_FR) & UART_FR_BUSY) ?
679  UART_BUSY : UART_IDLE);
680 }
681 
682 //*****************************************************************************
683 //
695 //
696 //*****************************************************************************
697 __STATIC_INLINE void
698 UARTBreakCtl(uint32_t ui32Base, bool bBreakState)
699 {
700  //
701  // Check the arguments.
702  //
703  ASSERT(UARTBaseValid(ui32Base));
704 
705  //
706  // Set the break condition as requested.
707  //
708  HWREG(ui32Base + UART_O_LCRH) =
709  (bBreakState ?
710  (HWREG(ui32Base + UART_O_LCRH) | UART_LCRH_BRK) :
711  (HWREG(ui32Base + UART_O_LCRH) & ~(UART_LCRH_BRK)));
712 }
713 
714 //*****************************************************************************
715 //
731 //
732 //*****************************************************************************
733 extern void UARTIntRegister(uint32_t ui32Base, void (*pfnHandler)(void));
734 
735 //*****************************************************************************
736 //
750 //
751 //*****************************************************************************
752 extern void UARTIntUnregister(uint32_t ui32Base);
753 
754 //*****************************************************************************
755 //
775 //
776 //*****************************************************************************
777 __STATIC_INLINE void
778 UARTIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags)
779 {
780  //
781  // Check the arguments.
782  //
783  ASSERT(UARTBaseValid(ui32Base));
784 
785  //
786  // Enable the specified interrupts.
787  //
788  HWREG(ui32Base + UART_O_IMSC) |= ui32IntFlags;
789 }
790 
791 //*****************************************************************************
792 //
811 //
812 //*****************************************************************************
813 __STATIC_INLINE void
814 UARTIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags)
815 {
816  //
817  // Check the arguments.
818  //
819  ASSERT(UARTBaseValid(ui32Base));
820 
821  //
822  // Disable the specified interrupts.
823  //
824  HWREG(ui32Base + UART_O_IMSC) &= ~(ui32IntFlags);
825 }
826 
827 //*****************************************************************************
828 //
849 //
850 //*****************************************************************************
851 __STATIC_INLINE uint32_t
852 UARTIntStatus(uint32_t ui32Base, bool bMasked)
853 {
854  //
855  // Check the arguments.
856  //
857  ASSERT(UARTBaseValid(ui32Base));
858 
859  //
860  // Return either the interrupt status or the raw interrupt status as
861  // requested.
862  //
863  if(bMasked)
864  {
865  return(HWREG(ui32Base + UART_O_MIS));
866  }
867  else
868  {
869  return(HWREG(ui32Base + UART_O_RIS));
870  }
871 }
872 
873 //*****************************************************************************
874 //
908 //
909 //*****************************************************************************
910 __STATIC_INLINE void
911 UARTIntClear(uint32_t ui32Base, uint32_t ui32IntFlags)
912 {
913  //
914  // Check the arguments
915  //
916  ASSERT(UARTBaseValid(ui32Base));
917 
918  //
919  // Clear the requested interrupt sources
920  //
921  HWREG(ui32Base + UART_O_ICR) = ui32IntFlags;
922 }
923 
924 //*****************************************************************************
925 //
943 //
944 //*****************************************************************************
945 __STATIC_INLINE void
946 UARTDMAEnable(uint32_t ui32Base, uint32_t ui32DMAFlags)
947 {
948  //
949  // Check the arguments.
950  //
951  ASSERT(UARTBaseValid(ui32Base));
952 
953  //
954  // Set the requested bits in the UART DMA control register.
955  //
956  HWREG(ui32Base + UART_O_DMACTL) |= ui32DMAFlags;
957 }
958 
959 //*****************************************************************************
960 //
974 //
975 //*****************************************************************************
976 __STATIC_INLINE void
977 UARTDMADisable(uint32_t ui32Base, uint32_t ui32DMAFlags)
978 {
979  //
980  // Check the arguments.
981  //
982  ASSERT(UARTBaseValid(ui32Base));
983 
984  //
985  // Clear the requested bits in the UART DMA control register.
986  //
987  HWREG(ui32Base + UART_O_DMACTL) &= ~ui32DMAFlags;
988 }
989 
990 //*****************************************************************************
991 //
1007 //
1008 //*****************************************************************************
1009 __STATIC_INLINE uint32_t
1010 UARTRxErrorGet(uint32_t ui32Base)
1011 {
1012  //
1013  // Check the arguments.
1014  //
1015  ASSERT(UARTBaseValid(ui32Base));
1016 
1017  //
1018  // Return the current value of the receive status register.
1019  //
1020  return(HWREG(ui32Base + UART_O_RSR) & 0x0000000F);
1021 }
1022 
1023 //*****************************************************************************
1024 //
1035 //
1036 //*****************************************************************************
1037 __STATIC_INLINE void
1038 UARTRxErrorClear(uint32_t ui32Base)
1039 {
1040  //
1041  // Check the arguments.
1042  //
1043  ASSERT(UARTBaseValid(ui32Base));
1044 
1045  //
1046  // Any write to the Error Clear Register will clear all bits which are
1047  // currently set.
1048  //
1049  HWREG(ui32Base + UART_O_ECR) = 0;
1050 }
1051 
1052 //*****************************************************************************
1053 //
1061 //
1062 //*****************************************************************************
1063 __STATIC_INLINE void
1064 UARTHwFlowControlEnable( uint32_t ui32Base )
1065 {
1066  //
1067  // Check the arguments.
1068  //
1069  ASSERT( UARTBaseValid( ui32Base ));
1070 
1071  HWREG( ui32Base + UART_O_CTL ) |= ( UART_CTL_CTSEN | UART_CTL_RTSEN );
1072 }
1073 
1074 //*****************************************************************************
1075 //
1083 //
1084 //*****************************************************************************
1085 __STATIC_INLINE void
1086 UARTHwFlowControlDisable( uint32_t ui32Base )
1087 {
1088  //
1089  // Check the arguments.
1090  //
1091  ASSERT( UARTBaseValid( ui32Base ));
1092 
1093  HWREG( ui32Base + UART_O_CTL ) &= ~( UART_CTL_CTSEN | UART_CTL_RTSEN );
1094 }
1095 
1096 
1097 //*****************************************************************************
1098 //
1099 // Support for DriverLib in ROM:
1100 // Redirect to implementation in ROM when available.
1101 //
1102 //*****************************************************************************
1103 #if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
1104  #include <driverlib/rom.h>
1105  #ifdef ROM_UARTFIFOLevelGet
1106  #undef UARTFIFOLevelGet
1107  #define UARTFIFOLevelGet ROM_UARTFIFOLevelGet
1108  #endif
1109  #ifdef ROM_UARTConfigSetExpClk
1110  #undef UARTConfigSetExpClk
1111  #define UARTConfigSetExpClk ROM_UARTConfigSetExpClk
1112  #endif
1113  #ifdef ROM_UARTConfigGetExpClk
1114  #undef UARTConfigGetExpClk
1115  #define UARTConfigGetExpClk ROM_UARTConfigGetExpClk
1116  #endif
1117  #ifdef ROM_UARTDisable
1118  #undef UARTDisable
1119  #define UARTDisable ROM_UARTDisable
1120  #endif
1121  #ifdef ROM_UARTCharGetNonBlocking
1122  #undef UARTCharGetNonBlocking
1123  #define UARTCharGetNonBlocking ROM_UARTCharGetNonBlocking
1124  #endif
1125  #ifdef ROM_UARTCharGet
1126  #undef UARTCharGet
1127  #define UARTCharGet ROM_UARTCharGet
1128  #endif
1129  #ifdef ROM_UARTCharPutNonBlocking
1130  #undef UARTCharPutNonBlocking
1131  #define UARTCharPutNonBlocking ROM_UARTCharPutNonBlocking
1132  #endif
1133  #ifdef ROM_UARTCharPut
1134  #undef UARTCharPut
1135  #define UARTCharPut ROM_UARTCharPut
1136  #endif
1137  #ifdef ROM_UARTIntRegister
1138  #undef UARTIntRegister
1139  #define UARTIntRegister ROM_UARTIntRegister
1140  #endif
1141  #ifdef ROM_UARTIntUnregister
1142  #undef UARTIntUnregister
1143  #define UARTIntUnregister ROM_UARTIntUnregister
1144  #endif
1145 #endif
1146 
1147 //*****************************************************************************
1148 //
1149 // Mark the end of the C bindings section for C++ compilers.
1150 //
1151 //*****************************************************************************
1152 #ifdef __cplusplus
1153 }
1154 #endif
1155 
1156 #endif // __UART_H__
1157 
1158 //*****************************************************************************
1159 //
1163 //
1164 //*****************************************************************************
void UARTCharPut(uint32_t ui32Base, uint8_t ui8Data)
Waits to send a character from the specified port.
Definition: uart.c:302
#define UART_CONFIG_PAR_ODD
Definition: uart.h:132
#define UART_FIFO_RX2_8
Definition: uart.h:155
static void UARTFIFODisable(uint32_t ui32Base)
Disables the transmit and receive FIFOs.
Definition: uart.h:510
#define UART_FIFO_TX7_8
Definition: uart.h:146
static void UARTIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags)
Enables individual UART interrupt sources.
Definition: uart.h:778
#define UART_FIFO_RX6_8
Definition: uart.h:157
static void UARTFIFOLevelSet(uint32_t ui32Base, uint32_t ui32TxLevel, uint32_t ui32RxLevel)
Sets the FIFO level at which interrupts are generated.
Definition: uart.h:313
static uint32_t UARTIntStatus(uint32_t ui32Base, bool bMasked)
Gets the current interrupt status.
Definition: uart.h:852
void UARTConfigSetExpClk(uint32_t ui32Base, uint32_t ui32UARTClk, uint32_t ui32Baud, uint32_t ui32Config)
Sets the configuration of a UART.
Definition: uart.c:104
static void UARTHwFlowControlEnable(uint32_t ui32Base)
Enables hardware flow control for both CTS and RTS.
Definition: uart.h:1064
#define UART_FIFO_RX7_8
Definition: uart.h:158
void UARTIntRegister(uint32_t ui32Base, void(*pfnHandler)(void))
Registers an interrupt handler for a UART interrupt.
Definition: uart.c:328
static void UARTIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags)
Disables individual UART interrupt sources.
Definition: uart.h:814
void UARTDisable(uint32_t ui32Base)
Disables transmitting and receiving.
Definition: uart.c:174
static void UARTFIFOEnable(uint32_t ui32Base)
Enables the transmit and receive FIFOs.
Definition: uart.h:485
#define UART_BUSY
Definition: uart.h:184
int32_t UARTCharGetNonBlocking(uint32_t ui32Base)
Receives a character from the specified port.
Definition: uart.c:207
#define UART_CONFIG_PAR_EVEN
Definition: uart.h:131
static void UARTBreakCtl(uint32_t ui32Base, bool bBreakState)
Causes a BREAK to be sent.
Definition: uart.h:698
static bool UARTBusy(uint32_t ui32Base)
Determines whether the UART transmitter is busy or not.
Definition: uart.h:668
static void UARTEnable(uint32_t ui32Base)
Enables transmitting and receiving.
Definition: uart.h:440
#define ASSERT(expr)
Definition: debug.h:74
static bool UARTSpaceAvail(uint32_t ui32Base)
Determines if there is any space in the transmit FIFO.
Definition: uart.h:566
#define UART_FIFO_TX6_8
Definition: uart.h:145
#define UART_FIFO_TX4_8
Definition: uart.h:144
void UARTConfigGetExpClk(uint32_t ui32Base, uint32_t ui32UARTClk, uint32_t *pui32Baud, uint32_t *pui32Config)
Gets the current configuration of a UART.
Definition: uart.c:143
#define UART_FIFO_TX1_8
Definition: uart.h:142
#define UART_FIFO_RX4_8
Definition: uart.h:156
static bool UARTCharsAvail(uint32_t ui32Base)
Determines if there are any characters in the receive FIFO.
Definition: uart.h:538
#define UART_CONFIG_PAR_NONE
Definition: uart.h:130
int32_t UARTCharGet(uint32_t ui32Base)
Waits for a character from the specified port.
Definition: uart.c:239
#define UART_CONFIG_PAR_ZERO
Definition: uart.h:134
static void UARTRxErrorClear(uint32_t ui32Base)
Clears all reported receiver errors.
Definition: uart.h:1038
static void UARTDMADisable(uint32_t ui32Base, uint32_t ui32DMAFlags)
Disable UART DMA operation.
Definition: uart.h:977
static uint32_t UARTRxErrorGet(uint32_t ui32Base)
Gets current receiver errors.
Definition: uart.h:1010
static void UARTParityModeSet(uint32_t ui32Base, uint32_t ui32Parity)
Sets the type of parity.
Definition: uart.h:236
#define UART_FIFO_RX1_8
Definition: uart.h:154
bool UARTCharPutNonBlocking(uint32_t ui32Base, uint8_t ui8Data)
Sends a character to the specified port.
Definition: uart.c:265
#define UART_FIFO_TX2_8
Definition: uart.h:143
void UARTFIFOLevelGet(uint32_t ui32Base, uint32_t *pui32TxLevel, uint32_t *pui32RxLevel)
Gets the FIFO level at which interrupts are generated.
Definition: uart.c:76
#define UART_IDLE
Definition: uart.h:185
static void UARTDMAEnable(uint32_t ui32Base, uint32_t ui32DMAFlags)
Enable UART DMA operation.
Definition: uart.h:946
void UARTIntUnregister(uint32_t ui32Base)
Unregisters an interrupt handler for a UART interrupt.
Definition: uart.c:352
static void UARTIntClear(uint32_t ui32Base, uint32_t ui32IntFlags)
Clears UART interrupt sources.
Definition: uart.h:911
#define UART_CONFIG_PAR_ONE
Definition: uart.h:133
static uint32_t UARTParityModeGet(uint32_t ui32Base)
Gets the type of parity currently being used.
Definition: uart.h:274
static void UARTHwFlowControlDisable(uint32_t ui32Base)
Disables hardware flow control for both CTS and RTS.
Definition: uart.h:1086