CC26xx Driver Library
ioc.c
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1 /******************************************************************************
2 * Filename: ioc.c
3 * Revised: 2015-05-08 15:23:45 +0200 (Fri, 08 May 2015)
4 * Revision: 43451
5 *
6 * Description: Driver for the IOC.
7 *
8 * Copyright (c) 2015, Texas Instruments Incorporated
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions are met:
13 *
14 * 1) Redistributions of source code must retain the above copyright notice,
15 * this list of conditions and the following disclaimer.
16 *
17 * 2) Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 *
21 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may
22 * be used to endorse or promote products derived from this software without
23 * specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
29 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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37 ******************************************************************************/
38 
39 #include <driverlib/ioc.h>
40 
41 //*****************************************************************************
42 //
43 // Handle support for DriverLib in ROM:
44 // This section will undo prototype renaming made in the header file
45 //
46 //*****************************************************************************
47 #if !defined(DOXYGEN)
48  #undef IOCPortConfigureSet
49  #define IOCPortConfigureSet NOROM_IOCPortConfigureSet
50  #undef IOCPortConfigureGet
51  #define IOCPortConfigureGet NOROM_IOCPortConfigureGet
52  #undef IOCIOShutdownSet
53  #define IOCIOShutdownSet NOROM_IOCIOShutdownSet
54  #undef IOCIOModeSet
55  #define IOCIOModeSet NOROM_IOCIOModeSet
56  #undef IOCIOIntSet
57  #define IOCIOIntSet NOROM_IOCIOIntSet
58  #undef IOCIOPortPullSet
59  #define IOCIOPortPullSet NOROM_IOCIOPortPullSet
60  #undef IOCIOHystSet
61  #define IOCIOHystSet NOROM_IOCIOHystSet
62  #undef IOCIOInputSet
63  #define IOCIOInputSet NOROM_IOCIOInputSet
64  #undef IOCIOSlewCtrlSet
65  #define IOCIOSlewCtrlSet NOROM_IOCIOSlewCtrlSet
66  #undef IOCIODrvStrengthSet
67  #define IOCIODrvStrengthSet NOROM_IOCIODrvStrengthSet
68  #undef IOCIOPortIdSet
69  #define IOCIOPortIdSet NOROM_IOCIOPortIdSet
70  #undef IOCIntEnable
71  #define IOCIntEnable NOROM_IOCIntEnable
72  #undef IOCIntDisable
73  #define IOCIntDisable NOROM_IOCIntDisable
74  #undef IOCPinTypeGpioInput
75  #define IOCPinTypeGpioInput NOROM_IOCPinTypeGpioInput
76  #undef IOCPinTypeGpioOutput
77  #define IOCPinTypeGpioOutput NOROM_IOCPinTypeGpioOutput
78  #undef IOCPinTypeUart
79  #define IOCPinTypeUart NOROM_IOCPinTypeUart
80  #undef IOCPinTypeSsiMaster
81  #define IOCPinTypeSsiMaster NOROM_IOCPinTypeSsiMaster
82  #undef IOCPinTypeSsiSlave
83  #define IOCPinTypeSsiSlave NOROM_IOCPinTypeSsiSlave
84  #undef IOCPinTypeI2c
85  #define IOCPinTypeI2c NOROM_IOCPinTypeI2c
86  #undef IOCPinTypeSpis
87  #define IOCPinTypeSpis NOROM_IOCPinTypeSpis
88  #undef IOCPinTypeAux
89  #define IOCPinTypeAux NOROM_IOCPinTypeAux
90 #endif
91 
92 //*****************************************************************************
93 //
94 // This is the mapping between an IO and the corresponding configuration
95 // register.
96 //
97 //*****************************************************************************
98 static const uint32_t g_pui32IOCfgReg[] =
99 {
107 };
108 
109 //*****************************************************************************
110 //
112 //
113 //*****************************************************************************
114 void
115 IOCPortConfigureSet(uint32_t ui32IOId, uint32_t ui32PortId,
116  uint32_t ui32IOConfig)
117 {
118  uint32_t ui32Reg;
119 
120  //
121  // Check the arguments.
122  //
123  ASSERT(ui32IOId <= IOID_31);
124  ASSERT(ui32PortId <= IOC_PORT_RFC_GPI1);
125 
126  //
127  // Get the register address.
128  //
129  ui32Reg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
130 
131  //
132  // Configure the port.
133  //
134  HWREG(ui32Reg) = ui32IOConfig | ui32PortId;
135 }
136 
137 //*****************************************************************************
138 //
140 //
141 //*****************************************************************************
142 uint32_t
143 IOCPortConfigureGet(uint32_t ui32IOId)
144 {
145  uint32_t ui32Reg;
146 
147  //
148  // Check the arguments.
149  //
150  ASSERT(ui32IOId <= IOID_31);
151 
152  //
153  // Get the register address.
154  //
155  ui32Reg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
156 
157  //
158  // Return the IO configuration.
159  //
160  return HWREG(ui32Reg);
161 }
162 
163 //*****************************************************************************
164 //
166 //
167 //*****************************************************************************
168 void
169 IOCIOShutdownSet(uint32_t ui32IOId, uint32_t ui32IOShutdown)
170 {
171  uint32_t ui32Reg;
172  uint32_t ui32Config;
173 
174  //
175  // Check the arguments.
176  //
177  ASSERT(ui32IOId <= IOID_31);
178  ASSERT((ui32IOShutdown == IOC_NO_WAKE_UP) ||
179  (ui32IOShutdown == IOC_WAKE_ON_LOW) ||
180  (ui32IOShutdown == IOC_WAKE_ON_HIGH));
181 
182  //
183  // Get the register address.
184  //
185  ui32Reg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
186 
187  //
188  // Configure the IO.
189  //
190  ui32Config = HWREG(ui32Reg);
191  ui32Config &= ~IOC_IOCFG0_WU_CFG_M;
192  HWREG(ui32Reg) = ui32Config | ui32IOShutdown;
193 }
194 
195 
196 //*****************************************************************************
197 //
199 //
200 //*****************************************************************************
201 void
202 IOCIOModeSet(uint32_t ui32IOId, uint32_t ui32IOMode)
203 {
204  uint32_t ui32Reg;
205  uint32_t ui32Config;
206 
207  //
208  // Check the arguments.
209  //
210  ASSERT(ui32IOId <= IOID_31);
211  ASSERT((ui32IOMode == IOC_IOMODE_NORMAL) ||
212  (ui32IOMode == IOC_IOMODE_INV) ||
213  (ui32IOMode == IOC_IOMODE_OPEN_DRAIN_NORMAL) ||
214  (ui32IOMode == IOC_IOMODE_OPEN_DRAIN_INV) ||
215  (ui32IOMode == IOC_IOMODE_OPEN_SRC_NORMAL) ||
216  (ui32IOMode == IOC_IOMODE_OPEN_SRC_INV));
217 
218  //
219  // Get the register address.
220  //
221  ui32Reg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
222 
223  //
224  // Configure the IO.
225  //
226  ui32Config = HWREG(ui32Reg);
227  ui32Config &= ~IOC_IOCFG0_IOMODE_M;
228  HWREG(ui32Reg) = ui32Config | ui32IOMode;
229 }
230 
231 //*****************************************************************************
232 //
234 //
235 //*****************************************************************************
236 void
237 IOCIOIntSet(uint32_t ui32IOId, uint32_t ui32Int, uint32_t ui32EdgeDet)
238 {
239  uint32_t ui32IOReg;
240  uint32_t ui32Config;
241 
242  //
243  // Check the arguments.
244  //
245  ASSERT(ui32IOId <= IOID_31);
246  ASSERT((ui32Int == IOC_INT_ENABLE) ||
247  (ui32Int == IOC_INT_DISABLE));
248  ASSERT((ui32EdgeDet == IOC_NO_EDGE) ||
249  (ui32EdgeDet == IOC_FALLING_EDGE) ||
250  (ui32EdgeDet == IOC_RISING_EDGE) ||
251  (ui32EdgeDet == IOC_BOTH_EDGES));
252 
253  //
254  // Get the register address.
255  //
256  ui32IOReg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
257 
258  //
259  // Configure the IO.
260  //
261  ui32Config = HWREG(ui32IOReg);
263  HWREG(ui32IOReg) = ui32Config | ((ui32Int ? IOC_IOCFG0_EDGE_IRQ_EN : 0) | ui32EdgeDet);
264 }
265 
266 //*****************************************************************************
267 //
269 //
270 //*****************************************************************************
271 void
272 IOCIOPortPullSet(uint32_t ui32IOId, uint32_t ui32Pull)
273 {
274  uint32_t ui32IOReg;
275  uint32_t ui32Config;
276 
277  //
278  // Check the argument.
279  //
280  ASSERT(ui32IOId <= IOID_31);
281  ASSERT((ui32Pull == IOC_NO_IOPULL) ||
282  (ui32Pull == IOC_IOPULL_UP) ||
283  (ui32Pull == IOC_IOPULL_DOWN));
284 
285  //
286  // Get the register address.
287  //
288  ui32IOReg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
289 
290  //
291  // Configure the IO.
292  //
293  ui32Config = HWREG(ui32IOReg);
294  ui32Config &= ~IOC_IOCFG0_PULL_CTL_M;
295  HWREG(ui32IOReg) = ui32Config | ui32Pull;
296 }
297 
298 //*****************************************************************************
299 //
301 //
302 //*****************************************************************************
303 void
304 IOCIOHystSet(uint32_t ui32IOId, uint32_t ui32Hysteresis)
305 {
306  uint32_t ui32IOReg;
307  uint32_t ui32Config;
308 
309  //
310  // Check the arguments.
311  //
312  ASSERT(ui32IOId <= IOID_31);
313  ASSERT((ui32Hysteresis == IOC_HYST_ENABLE) ||
314  (ui32Hysteresis == IOC_HYST_DISABLE));
315 
316  //
317  // Get the register address.
318  //
319  ui32IOReg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
320 
321  //
322  // Configure the IO.
323  //
324  ui32Config = HWREG(ui32IOReg);
325  ui32Config &= ~IOC_IOCFG0_HYST_EN;
326  HWREG(ui32IOReg) = ui32Config | ui32Hysteresis;
327 }
328 
329 //*****************************************************************************
330 //
332 //
333 //*****************************************************************************
334 void
335 IOCIOInputSet(uint32_t ui32IOId, uint32_t ui32Input)
336 {
337  uint32_t ui32IOReg;
338  uint32_t ui32Config;
339 
340  //
341  // Check the arguments.
342  //
343  ASSERT(ui32IOId <= IOID_31);
344  ASSERT((ui32Input == IOC_INPUT_ENABLE) ||
345  (ui32Input == IOC_INPUT_DISABLE));
346 
347  //
348  // Get the register address.
349  //
350  ui32IOReg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
351 
352  //
353  // Configure the IO.
354  //
355  ui32Config = HWREG(ui32IOReg);
356  ui32Config &= ~IOC_IOCFG0_IE;
357  HWREG(ui32IOReg) = ui32Config | ui32Input;
358 }
359 
360 //*****************************************************************************
361 //
363 //
364 //*****************************************************************************
365 void
366 IOCIOSlewCtrlSet(uint32_t ui32IOId, uint32_t ui32SlewEnable)
367 {
368  uint32_t ui32IOReg;
369  uint32_t ui32Config;
370 
371  //
372  // Check the arguments.
373  //
374  ASSERT(ui32IOId <= IOID_31);
375  ASSERT((ui32SlewEnable == IOC_SLEW_ENABLE) ||
376  (ui32SlewEnable == IOC_SLEW_DISABLE));
377 
378  //
379  // Get the register address.
380  //
381  ui32IOReg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
382 
383  //
384  // Configure the IO.
385  //
386  ui32Config = HWREG(ui32IOReg);
387  ui32Config &= ~IOC_IOCFG0_SLEW_RED;
388  HWREG(ui32IOReg) = ui32Config | ui32SlewEnable;
389 }
390 
391 //*****************************************************************************
392 //
394 //
395 //*****************************************************************************
396 void
397 IOCIODrvStrengthSet(uint32_t ui32IOId, uint32_t ui32IOCurrent,
398  uint32_t ui32DrvStrength)
399 {
400  uint32_t ui32IOReg;
401  uint32_t ui32Config;
402 
403  //
404  // Check the arguments.
405  //
406  ASSERT(ui32IOId <= IOID_31);
407  ASSERT((ui32IOCurrent == IOC_CURRENT_2MA) ||
408  (ui32IOCurrent == IOC_CURRENT_4MA) ||
409  (ui32IOCurrent == IOC_CURRENT_8MA) ||
410  (ui32IOCurrent == IOC_CURRENT_16MA));
411  ASSERT((ui32DrvStrength == IOC_STRENGTH_MIN) ||
412  (ui32DrvStrength == IOC_STRENGTH_MAX) ||
413  (ui32DrvStrength == IOC_STRENGTH_MED) ||
414  (ui32DrvStrength == IOC_STRENGTH_AUTO));
415 
416  //
417  // Get the register address.
418  //
419  ui32IOReg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
420 
421  //
422  // Configure the IO.
423  //
424  ui32Config = HWREG(ui32IOReg);
425  ui32Config &= ~(IOC_IOCFG0_IOCURR_M | IOC_IOCFG0_IOSTR_M);
426  HWREG(ui32IOReg) = ui32Config | (ui32IOCurrent | ui32DrvStrength);
427 }
428 
429 //*****************************************************************************
430 //
432 //
433 //*****************************************************************************
434 void
435 IOCIOPortIdSet(uint32_t ui32IOId, uint32_t ui32PortId)
436 {
437  uint32_t ui32IOReg;
438  uint32_t ui32Config;
439 
440  //
441  // Check the arguments.
442  //
443  ASSERT(ui32IOId <= IOID_31);
444  ASSERT(ui32PortId <= IOC_PORT_RFC_GPI1);
445 
446  //
447  // Get the register address.
448  //
449  ui32IOReg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
450 
451  //
452  // Configure the IO.
453  //
454  ui32Config = HWREG(ui32IOReg);
455  ui32Config &= ~IOC_IOCFG0_PORT_ID_M;
456  HWREG(ui32IOReg) = ui32Config | ui32PortId;
457 }
458 
459 //*****************************************************************************
460 //
462 //
463 //*****************************************************************************
464 void
465 IOCIntEnable(uint32_t ui32IOId)
466 {
467  uint32_t ui32IOReg;
468  uint32_t ui32Config;
469 
470  //
471  // Check the arguments.
472  //
473  ASSERT(ui32IOId <= IOID_31);
474 
475  //
476  // Get the register address.
477  //
478  ui32IOReg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
479 
480  //
481  // Enable the specified interrupt.
482  //
483  ui32Config = HWREG(ui32IOReg);
484  ui32Config |= IOC_IOCFG0_EDGE_IRQ_EN;
485  HWREG(ui32IOReg) = ui32Config;
486 }
487 
488 //*****************************************************************************
489 //
491 //
492 //*****************************************************************************
493 void
494 IOCIntDisable(uint32_t ui32IOId)
495 {
496  uint32_t ui32IOReg;
497  uint32_t ui32Config;
498 
499  //
500  // Check the arguments.
501  //
502  ASSERT(ui32IOId <= IOID_31);
503 
504  //
505  // Get the register address.
506  //
507  ui32IOReg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
508 
509  //
510  // Disable the specified interrupt.
511  //
512  ui32Config = HWREG(ui32IOReg);
513  ui32Config &= ~IOC_IOCFG0_EDGE_IRQ_EN;
514  HWREG(ui32IOReg) = ui32Config;
515 }
516 
517 //*****************************************************************************
518 //
520 //
521 //*****************************************************************************
522 void
523 IOCPinTypeGpioInput(uint32_t ui32IOId)
524 {
525  //
526  // Check the arguments.
527  //
528  ASSERT(ui32IOId <= IOID_31);
529 
530  //
531  // Setup the IO for standard input.
532  //
534 
535  //
536  // Enable input mode in the GPIO module.
537  //
538  GPIODirModeSet(1 << ui32IOId, GPIO_DIR_MODE_IN);
539 }
540 
541 //*****************************************************************************
542 //
544 //
545 //*****************************************************************************
546 void
547 IOCPinTypeGpioOutput(uint32_t ui32IOId)
548 {
549  //
550  // Check the arguments.
551  //
552  ASSERT(ui32IOId <= IOID_31);
553 
554  //
555  // Setup the IO for standard input.
556  //
558 
559  //
560  // Enable output mode in the GPIO module.
561  //
562  GPIODirModeSet(1 << ui32IOId, GPIO_DIR_MODE_OUT);
563 }
564 
565 //*****************************************************************************
566 //
568 //
569 //*****************************************************************************
570 void
571 IOCPinTypeUart(uint32_t ui32Base, uint32_t ui32Rx, uint32_t ui32Tx,
572  uint32_t ui32Cts, uint32_t ui32Rts)
573 {
574  //
575  // Check the arguments.
576  //
577  ASSERT(ui32Base == UART0_BASE);
578  ASSERT((ui32Rx <= IOID_31) || (ui32Rx == IOID_UNUSED));
579  ASSERT((ui32Tx <= IOID_31) || (ui32Tx == IOID_UNUSED));
580  ASSERT((ui32Cts <= IOID_31) || (ui32Cts == IOID_UNUSED));
581  ASSERT((ui32Rts <= IOID_31) || (ui32Rts == IOID_UNUSED));
582 
583  //
584  // Setup the IOs in the desired configuration.
585  //
586  if(ui32Rx != IOID_UNUSED)
587  {
589  }
590  if(ui32Tx != IOID_UNUSED)
591  {
593  }
594  if(ui32Cts != IOID_UNUSED)
595  {
597  }
598  if(ui32Rts != IOID_UNUSED)
599  {
601  }
602 }
603 
604 //*****************************************************************************
605 //
607 //
608 //*****************************************************************************
609 void
610 IOCPinTypeSsiMaster(uint32_t ui32Base, uint32_t ui32Rx,
611  uint32_t ui32Tx, uint32_t ui32Fss,
612  uint32_t ui32Clk)
613 {
614  //
615  // Check the arguments.
616  //
617  ASSERT((ui32Base == SSI0_BASE) || (ui32Base == SSI1_BASE));
618  ASSERT((ui32Rx <= IOID_31) || (ui32Rx == IOID_UNUSED));
619  ASSERT((ui32Tx <= IOID_31) || (ui32Tx == IOID_UNUSED));
620  ASSERT((ui32Fss <= IOID_31) || (ui32Fss == IOID_UNUSED));
621  ASSERT((ui32Clk <= IOID_31) || (ui32Clk == IOID_UNUSED));
622 
623  //
624  // Setup the IOs in the desired configuration.
625  //
626  if(ui32Base == SSI0_BASE)
627  {
628  if(ui32Rx != IOID_UNUSED)
629  {
631  }
632  if(ui32Tx != IOID_UNUSED)
633  {
635  }
636  if(ui32Fss != IOID_UNUSED)
637  {
639  }
640  if(ui32Clk != IOID_UNUSED)
641  {
643  }
644  }
645  else
646  {
647  if(ui32Rx != IOID_UNUSED)
648  {
650  }
651  if(ui32Tx != IOID_UNUSED)
652  {
654  }
655  if(ui32Fss != IOID_UNUSED)
656  {
658  }
659  if(ui32Clk != IOID_UNUSED)
660  {
662  }
663  }
664 }
665 
666 //*****************************************************************************
667 //
669 //
670 //*****************************************************************************
671 void
672 IOCPinTypeSsiSlave(uint32_t ui32Base, uint32_t ui32Rx,
673  uint32_t ui32Tx, uint32_t ui32Fss,
674  uint32_t ui32Clk)
675 {
676  //
677  // Check the arguments.
678  //
679  ASSERT((ui32Base == SSI0_BASE) || (ui32Base == SSI1_BASE));
680  ASSERT((ui32Rx <= IOID_31) || (ui32Rx == IOID_UNUSED));
681  ASSERT((ui32Tx <= IOID_31) || (ui32Tx == IOID_UNUSED));
682  ASSERT((ui32Fss <= IOID_31) || (ui32Fss == IOID_UNUSED));
683  ASSERT((ui32Clk <= IOID_31) || (ui32Clk == IOID_UNUSED));
684 
685  //
686  // Setup the IOs in the desired configuration.
687  //
688  if(ui32Base == SSI0_BASE)
689  {
690  if(ui32Rx != IOID_UNUSED)
691  {
693  }
694  if(ui32Tx != IOID_UNUSED)
695  {
697  }
698  if(ui32Fss != IOID_UNUSED)
699  {
701  }
702  if(ui32Clk != IOID_UNUSED)
703  {
705  }
706  }
707  else
708  {
709  if(ui32Rx != IOID_UNUSED)
710  {
712  }
713  if(ui32Tx != IOID_UNUSED)
714  {
716  }
717  if(ui32Fss != IOID_UNUSED)
718  {
720  }
721  if(ui32Clk != IOID_UNUSED)
722  {
724  }
725  }
726 }
727 
728 //*****************************************************************************
729 //
731 //
732 //*****************************************************************************
733 void
734 IOCPinTypeI2c(uint32_t ui32Base, uint32_t ui32Data, uint32_t ui32Clk)
735 {
736  uint32_t ui32IOConfig;
737 
738  //
739  // Check the arguments.
740  //
741  ASSERT((ui32Data <= IOID_31) || (ui32Data == IOID_UNUSED));
742  ASSERT((ui32Clk <= IOID_31) || (ui32Clk == IOID_UNUSED));
743 
744  //
745  // Define the IO configuration parameters.
746  //
747  ui32IOConfig = IOC_CURRENT_2MA | IOC_STRENGTH_AUTO | IOC_IOPULL_UP |
751 
752  //
753  // Setup the IOs in the desired configuration.
754  //
755  IOCPortConfigureSet(ui32Data, IOC_PORT_MCU_I2C_MSSDA, ui32IOConfig);
756  IOCPortConfigureSet(ui32Clk, IOC_PORT_MCU_I2C_MSSCL, ui32IOConfig);
757 }
758 
759 //*****************************************************************************
760 //
762 //
763 //*****************************************************************************
764 void
765 IOCPinTypeSpis(uint32_t ui32Rx, uint32_t ui32Tx, uint32_t ui32Fss,
766  uint32_t ui32Clk)
767 {
768  //
769  // Check the arguments.
770  //
771  ASSERT((ui32Rx <= IOID_31) || (ui32Rx == IOID_UNUSED));
772  ASSERT((ui32Tx <= IOID_31) || (ui32Tx == IOID_UNUSED));
773  ASSERT((ui32Fss <= IOID_31) || (ui32Fss == IOID_UNUSED));
774  ASSERT((ui32Clk <= IOID_31) || (ui32Clk == IOID_UNUSED));
775 
776  //
777  // Setup the IOs in the desired configuration.
778  //
779  if(ui32Rx != IOID_UNUSED)
780  {
782  }
783  if(ui32Tx != IOID_UNUSED)
784  {
786  }
787  if(ui32Fss != IOID_UNUSED)
788  {
790  }
791  if(ui32Clk != IOID_UNUSED)
792  {
794  }
795 }
796 
797 //*****************************************************************************
798 //
800 //
801 //*****************************************************************************
802 void
803 IOCPinTypeAux(uint32_t ui32IOId)
804 {
805  //
806  // Check the arguments.
807  //
808  ASSERT((ui32IOId <= IOID_31) || (ui32IOId == IOID_UNUSED));
809 
810  //
811  // Setup the IO.
812  //
814 }
#define IOC_PORT_MCU_SSI1_RX
Definition: ioc.h:195
#define IOC_IOMODE_OPEN_SRC_INV
Definition: ioc.h:247
#define IOC_PORT_MCU_UART0_RTS
Definition: ioc.h:185
#define IOC_PORT_MCU_SSI1_TX
Definition: ioc.h:196
#define IOC_FALLING_EDGE
Definition: ioc.h:257
#define IOC_WAKE_ON_HIGH
Definition: ioc.h:231
void IOCIntDisable(uint32_t ui32IOId)
Disables individual IO edge interrupt sources.
Definition: ioc.c:494
#define IOC_INPUT_ENABLE
Definition: ioc.h:219
void IOCIOSlewCtrlSet(uint32_t ui32IOId, uint32_t ui32SlewEnable)
Enable/disable the slew control on an IO port.
Definition: ioc.c:366
#define IOC_PORT_MCU_I2C_MSSDA
Definition: ioc.h:180
void IOCPinTypeSsiMaster(uint32_t ui32Base, uint32_t ui32Rx, uint32_t ui32Tx, uint32_t ui32Fss, uint32_t ui32Clk)
Configure a set of IOs for standard SSI peripheral master control.
Definition: ioc.c:610
#define IOC_STRENGTH_MED
Definition: ioc.h:289
void IOCPinTypeI2c(uint32_t ui32Base, uint32_t ui32Data, uint32_t ui32Clk)
Configure a set of IOs for standard I2C peripheral control.
Definition: ioc.c:734
void IOCIOShutdownSet(uint32_t ui32IOId, uint32_t ui32IOShutdown)
Set wake-up on an IO port.
Definition: ioc.c:169
#define IOC_IOMODE_OPEN_DRAIN_INV
Definition: ioc.h:242
#define IOC_STRENGTH_MAX
Definition: ioc.h:287
#define IOC_IOMODE_OPEN_SRC_NORMAL
Definition: ioc.h:245
#define IOC_PORT_AON_SCK
Definition: ioc.h:171
#define IOC_CURRENT_16MA
Definition: ioc.h:283
#define IOC_PORT_MCU_SSI1_CLK
Definition: ioc.h:198
#define IOC_IOPULL_DOWN
Definition: ioc.h:271
#define IOC_PORT_AUX_IO
Definition: ioc.h:175
#define IOID_UNUSED
Definition: ioc.h:153
static const uint32_t g_pui32IOCfgReg[]
Definition: ioc.c:98
#define GPIO_DIR_MODE_OUT
Definition: gpio.h:123
#define IOC_BOTH_EDGES
Definition: ioc.h:259
#define IOC_STD_INPUT
Definition: ioc.h:298
#define IOC_PORT_GPIO
Definition: ioc.h:169
#define IOC_IOPULL_UP
Definition: ioc.h:270
#define IOC_PORT_MCU_I2C_MSSCL
Definition: ioc.h:181
void IOCPinTypeSsiSlave(uint32_t ui32Base, uint32_t ui32Rx, uint32_t ui32Tx, uint32_t ui32Fss, uint32_t ui32Clk)
Configure a set of IOs for standard SSI peripheral slave control.
Definition: ioc.c:672
void IOCIOHystSet(uint32_t ui32IOId, uint32_t ui32Hysteresis)
Configure hysteresis on and IO port.
Definition: ioc.c:304
void IOCIOInputSet(uint32_t ui32IOId, uint32_t ui32Input)
Enable/disable IO port as input.
Definition: ioc.c:335
void IOCIntEnable(uint32_t ui32IOId)
Enables individual IO edge detect interrupt.
Definition: ioc.c:465
#define IOC_IOMODE_INV
Definition: ioc.h:239
#define IOC_PORT_AON_SCS
Definition: ioc.h:170
#define IOC_STD_OUTPUT
Definition: ioc.h:303
void IOCIODrvStrengthSet(uint32_t ui32IOId, uint32_t ui32IOCurrent, uint32_t ui32DrvStrength)
Configure the drive strength and maximum current of an IO port.
Definition: ioc.c:397
#define IOC_INT_DISABLE
Definition: ioc.h:261
#define IOC_PORT_MCU_SSI0_TX
Definition: ioc.h:177
#define IOC_PORT_MCU_UART0_TX
Definition: ioc.h:183
#define IOC_SLEW_ENABLE
Definition: ioc.h:217
#define IOC_RISING_EDGE
Definition: ioc.h:258
#define IOC_INPUT_DISABLE
Definition: ioc.h:220
void IOCPinTypeAux(uint32_t ui32IOId)
Configure an IO for AUX control.
Definition: ioc.c:803
#define IOC_NO_WAKE_UP
Definition: ioc.h:229
#define IOC_PORT_MCU_SSI1_FSS
Definition: ioc.h:197
#define IOC_WAKE_ON_LOW
Definition: ioc.h:230
void IOCIOIntSet(uint32_t ui32IOId, uint32_t ui32Int, uint32_t ui32EdgeDet)
Setup interrupt detection on an IO Port.
Definition: ioc.c:237
#define ASSERT(expr)
Definition: debug.h:74
#define IOC_PORT_AON_SDO
Definition: ioc.h:173
uint32_t IOCPortConfigureGet(uint32_t ui32IOId)
Get the configuration of an IO port.
Definition: ioc.c:143
#define IOC_PORT_MCU_SSI0_CLK
Definition: ioc.h:179
#define IOC_STRENGTH_MIN
Definition: ioc.h:291
#define IOC_CURRENT_2MA
Definition: ioc.h:280
void IOCPortConfigureSet(uint32_t ui32IOId, uint32_t ui32PortId, uint32_t ui32IOConfig)
Set the configuration of an IO port.
Definition: ioc.c:115
#define IOC_NO_EDGE
Definition: ioc.h:256
void IOCPinTypeGpioOutput(uint32_t ui32IOId)
Setup an IO for standard GPIO output.
Definition: ioc.c:547
#define IOC_PORT_MCU_SSI0_RX
Definition: ioc.h:176
#define GPIO_DIR_MODE_IN
Definition: gpio.h:122
void IOCIOPortIdSet(uint32_t ui32IOId, uint32_t ui32PortId)
Setup the Port ID for this IO.
Definition: ioc.c:435
#define IOC_IOMODE_OPEN_DRAIN_NORMAL
Definition: ioc.h:240
#define IOC_PORT_AON_SDI
Definition: ioc.h:172
#define IOC_HYST_ENABLE
Definition: ioc.h:221
void IOCPinTypeGpioInput(uint32_t ui32IOId)
Setup an IO for standard GPIO input.
Definition: ioc.c:523
#define IOC_PORT_MCU_UART0_RX
Definition: ioc.h:182
#define IOC_SLEW_DISABLE
Definition: ioc.h:218
#define IOC_CURRENT_8MA
Definition: ioc.h:282
#define IOC_PORT_MCU_UART0_CTS
Definition: ioc.h:184
#define IOC_CURRENT_4MA
Definition: ioc.h:281
#define IOC_INT_ENABLE
Definition: ioc.h:260
#define IOC_STRENGTH_AUTO
Definition: ioc.h:285
#define IOC_HYST_DISABLE
Definition: ioc.h:222
#define IOID_31
Definition: ioc.h:152
#define IOC_IOMODE_NORMAL
Definition: ioc.h:238
void IOCPinTypeUart(uint32_t ui32Base, uint32_t ui32Rx, uint32_t ui32Tx, uint32_t ui32Cts, uint32_t ui32Rts)
Configure a set of IOs for standard UART peripheral control.
Definition: ioc.c:571
#define IOC_PORT_MCU_SSI0_FSS
Definition: ioc.h:178
#define IOC_NO_IOPULL
Definition: ioc.h:269
#define IOC_PORT_RFC_GPI1
Definition: ioc.h:210
static void GPIODirModeSet(uint32_t ui32Pins, uint32_t ui32Dir)
Sets the direction of the specified pin(s).
Definition: gpio.h:151
void IOCIOModeSet(uint32_t ui32IOId, uint32_t ui32IOMode)
Set the IO Mode of an IO Port.
Definition: ioc.c:202
void IOCIOPortPullSet(uint32_t ui32IOId, uint32_t ui32Pull)
Set the pull on an IO port.
Definition: ioc.c:272
void IOCPinTypeSpis(uint32_t ui32Rx, uint32_t ui32Tx, uint32_t ui32Fss, uint32_t ui32Clk)
Configure a set of IOs for standard SPIS peripheral control.
Definition: ioc.c:765