module ti.catalog.arm.cortexm3.concertoInit.Boot

Concerto M3 Boot Support

The Boot module supports boot initialization for the Concerto M3 core. A special boot init function is created based on the configuration settings for this module. This function is hooked into the xdc.runtime.Reset.fxns[] array and called very early at boot time (prior to cinit processing). [ more ... ]
C synopsis target-domain sourced in ti/catalog/arm/cortexm3/concertoInit/Boot.xdc
#include <ti/catalog/arm/cortexm3/concertoInit/Boot.h>
Constants
extern const Bool 
 
DETAILS
The Boot module supports boot initialization for the Concerto M3 core. A special boot init function is created based on the configuration settings for this module. This function is hooked into the xdc.runtime.Reset.fxns[] array and called very early at boot time (prior to cinit processing).
The code to support the boot module is placed in a separate section named ".text:.bootCodeSection" to allow placement of this section in the linker .cmd file if necessary. This section is a subsection of the ".text" section so this code will be placed into the .text section unless explicitly placed, either through Program.sectMap or through a linker command file.
 
config Boot_configureClocks  // module-wide

Clock configuration flag, default is false

C synopsis target-domain
extern const Bool Boot_configureClocks;
 
DETAILS
Set to true to configure the PLL and system and M3 subsystem clock dividers.
 
XDCscript usage meta-domain sourced in ti/catalog/arm/cortexm3/concertoInit/Boot.xdc
var Boot = xdc.useModule('ti.catalog.arm.cortexm3.concertoInit.Boot');
module-wide constants & types
 
        const Boot.M3Div_1// Divide by 1;
        const Boot.M3Div_2// Divide by 2;
        const Boot.M3Div_4// Divide by 4;
 
        const Boot.Div_1// Divide by 1;
        const Boot.Div_2// Divide by 2;
        const Boot.Div_4// Divide by 4;
        const Boot.Div_8// Divide by 8;
 
    var obj = new Boot.ModuleView// ;
        obj.configureClocks = Bool  ...
        obj.OSCCLK = UInt  ...
        obj.SPLLIMULT = UInt  ...
        obj.SPLLFMULT = String  ...
        obj.SYSDIVSEL = String  ...
        obj.M3SSDIVSEL = String  ...
        obj.bootC28 = Bool  ...
module-wide config parameters
 
 
 
metaonly enum Boot.FractMult

System PLL Fractional Multiplier (SPLLFMULT) value

XDCscript usage meta-domain
values of type Boot.FractMult
    const Boot.Fract_0;
    // Fractional multiplier is 0
    const Boot.Fract_25;
    // Fractional multiplier is 0.25
    const Boot.Fract_50;
    // Fractional multiplier is 0.5
    const Boot.Fract_75;
    // Fractional multiplier is 0.75
 
 
metaonly enum Boot.M3Div

M3 Subsystem Clock Divider (M3SSDIVSEL) value

XDCscript usage meta-domain
values of type Boot.M3Div
    const Boot.M3Div_1;
    // Divide by 1
    const Boot.M3Div_2;
    // Divide by 2
    const Boot.M3Div_4;
    // Divide by 4
 
 
metaonly enum Boot.SysDiv

System Clock Divider (SYSDIVSEL) value

XDCscript usage meta-domain
values of type Boot.SysDiv
    const Boot.Div_1;
    // Divide by 1
    const Boot.Div_2;
    // Divide by 2
    const Boot.Div_4;
    // Divide by 4
    const Boot.Div_8;
    // Divide by 8
 
 
metaonly struct Boot.ModuleView
XDCscript usage meta-domain
var obj = new Boot.ModuleView;
 
    obj.configureClocks = Bool  ...
    obj.OSCCLK = UInt  ...
    obj.SPLLIMULT = UInt  ...
    obj.SPLLFMULT = String  ...
    obj.SYSDIVSEL = String  ...
    obj.M3SSDIVSEL = String  ...
    obj.bootC28 = Bool  ...
 
 
config Boot.configureClocks  // module-wide

Clock configuration flag, default is false

XDCscript usage meta-domain
Boot.configureClocks = Bool false;
 
DETAILS
Set to true to configure the PLL and system and M3 subsystem clock dividers.
C SYNOPSIS
 
metaonly config Boot.M3SSDIVSEL  // module-wide

M3 Subsystem Clock Divider (M3SSDIVSEL) value

XDCscript usage meta-domain
Boot.M3SSDIVSEL = Boot.M3Div Boot.M3Div_4;
 
 
metaonly config Boot.OSCCLK  // module-wide

OSCCLK input frequency to PLL, in MHz. Default is 20 MHz

XDCscript usage meta-domain
Boot.OSCCLK = UInt 20;
 
DETAILS
This is the frequency of the oscillator clock (OSCCLK) input to the PLL.
 
metaonly config Boot.SPLLFMULT  // module-wide

System PLL Fractional Multiplier (SPLLFMULT) value

XDCscript usage meta-domain
Boot.SPLLFMULT = Boot.FractMult Boot.Fract_0;
 
 
metaonly config Boot.SPLLIMULT  // module-wide

System PLL Integer Multiplier (SPLLIMULT) value

XDCscript usage meta-domain
Boot.SPLLIMULT = UInt 1;
 
 
metaonly config Boot.SYSDIVSEL  // module-wide

System Clock Divider (SYSDIVSEL) value

XDCscript usage meta-domain
Boot.SYSDIVSEL = Boot.SysDiv Boot.Div_8;
 
 
metaonly config Boot.bootC28  // module-wide

Initiate booting of the C28 processor. Default is false

XDCscript usage meta-domain
Boot.bootC28 = Bool false;
 
DETAILS
Set to true to enable the M3 to initiate boot of the C28.
If enabled, this will occur after the optional clock configuration step, enabled by configureClocks.
 
metaonly config Boot.bootFromFlash  // module-wide

Boot from Flash flag. Default is true

XDCscript usage meta-domain
Boot.bootFromFlash = Bool true;
 
DETAILS
Set to true to enable booting the M3 from Flash.
 
metaonly config Boot.configureFlashWaitStates  // module-wide

Flash controller wait states configuration flag, default is true

XDCscript usage meta-domain
Boot.configureFlashWaitStates = Bool true;
 
DETAILS
Set to true to configure the Flash controller wait states. The number of wait states is computed based upon the CPU frequency.
 
metaonly config Boot.enableFlashDataCache  // module-wide

Flash controller data cache enable flag, default is true

XDCscript usage meta-domain
Boot.enableFlashDataCache = Bool true;
 
DETAILS
Set to true to enable the Flash controller's data cache.
 
metaonly config Boot.enableFlashProgramCache  // module-wide

Flash controller program cache enable flag, default is true

XDCscript usage meta-domain
Boot.enableFlashProgramCache = Bool true;
 
DETAILS
Set to true to enable the Flash controller's program cache.
 
metaonly config Boot.initC28RAMs  // module-wide

Initialize C28 RAM regions before booting the C28 processor. Default is true

XDCscript usage meta-domain
Boot.initC28RAMs = Bool true;
 
DETAILS
Set to true to enable initialization of these C28 RAM regions: M1, CtoM, LO, L1, L2, and L3. RAM locations will be zeroed, and the ECC or parity bits will be initialized.
 
metaonly config Boot.limpAbortFunction  // module-wide

Function to be called when Limp mode is detected

XDCscript usage meta-domain
Boot.limpAbortFunction = Fxn undefined;
 
DETAILS
This function is called when the Boot module is about to configure the PLL, but finds the device operating in Limp mode (i.e., the mode when a missing OSCCLK input has been detected).
If this function is not specified by the application, a default function will be used, which spins in an infinite loop.
 
metaonly config Boot.rovViewInfo  // module-wide
XDCscript usage meta-domain
Boot.rovViewInfo = ViewInfo.Instance ViewInfo.create;
 
generated on Tue, 16 Oct 2012 23:16:28 GMT