module ti.catalog.arm.cortexm3.lm3init.Boot
index URL

Stellaris M3 Boot Support

The Boot module supports boot initialization for the Stellaris M3 devices. A special boot init function is created based on the configuration settings for this module. This function is hooked into the xdc.runtime.Reset.fxns[] array and called very early at boot time (prior to cinit processing). [ more ... ]
C synopsis target-domain sourced in ti/catalog/arm/cortexm3/lm3init/Boot.xdc
#include <ti/catalog/arm/cortexm3/lm3init/Boot.h>
Typedefs
typedef enum
Boot_LdoOut//  ...
typedef enum
Boot_OscSrc//  ...
typedef enum
Boot_PwmDiv//  ...
typedef enum
Boot_SysDiv//  ...
typedef enum
Boot_XtalFreq//  ...
Constants
extern const Bool 
Boot_configureClock// Clock configuration flag, default is false;
extern const Bool 
Boot_configureLdo// LDO configuration flag, default is false;
extern const Bool 
Boot_ioscDisable// Internal Oscillator Disable flag;
extern const Boot_LdoOut 
Boot_ldoOut// LDO VADJ setting, default is 2.5V;
extern const Bool 
Boot_moscDisable// Main Oscillator Disable flag;
extern const Boot_OscSrc 
Boot_oscSrc// Oscillator Source;
extern const Bool 
Boot_pllBypass// PLL Bypass flag;
extern const Bool 
Boot_pllOutEnable// PLL Output Enable flag;
extern const Boot_PwmDiv 
Boot_pwmClockDiv// PWM Clock Divisor;
extern const Boot_SysDiv 
Boot_sysClockDiv// SYS Clock Divisor;
extern const Boot_XtalFreq 
Boot_xtal// Crystal Value;
 
DETAILS
The Boot module supports boot initialization for the Stellaris M3 devices. A special boot init function is created based on the configuration settings for this module. This function is hooked into the xdc.runtime.Reset.fxns[] array and called very early at boot time (prior to cinit processing).
The code to support the boot module is placed in a separate section named ".text:.bootCodeSection" to allow placement of this section in the linker .cmd file if necessary. This section is a subsection of the ".text" section so this code will be placed into the .text section unless explicitly placed, either through Program.sectMap or through a linker command file.
 
enum Boot_LdoOut
index URL
C synopsis target-domain
typedef enum Boot_LdoOut {
    Boot_LDOPCTL_2_55V,
    // LDO output of 2.55V
    Boot_LDOPCTL_2_60V,
    // LDO output of 2.60V
    Boot_LDOPCTL_2_65V,
    // LDO output of 2.65V
    Boot_LDOPCTL_2_70V,
    // LDO output of 2.70V
    Boot_LDOPCTL_2_75V,
    // LDO output of 2.75V
    Boot_LDOPCTL_2_25V,
    // LDO output of 2.25V
    Boot_LDOPCTL_2_30V,
    // LDO output of 2.30V
    Boot_LDOPCTL_2_35V,
    // LDO output of 2.35V
    Boot_LDOPCTL_2_40V,
    // LDO output of 2.40V
    Boot_LDOPCTL_2_45V,
    // LDO output of 2.45V
    Boot_LDOPCTL_2_50V
    // LDO output of 2.50V
} Boot_LdoOut;
 
 
enum Boot_OscSrc
index URL
C synopsis target-domain
typedef enum Boot_OscSrc {
    Boot_OSCSRC_MAIN,
    // Use the main oscillator
    Boot_OSCSRC_INT,
    // Use the internal oscillator
    Boot_OSCSRC_INT4,
    // Use the internal oscillator / 4
    Boot_OSCSRC_30
    // 30 KHz internal oscillator
} Boot_OscSrc;
 
 
enum Boot_PwmDiv
index URL
C synopsis target-domain
typedef enum Boot_PwmDiv {
    Boot_PWMDIV_1,
    // PWM clock /1
    Boot_PWMDIV_2,
    // PWM clock /2
    Boot_PWMDIV_4,
    // PWM clock /4
    Boot_PWMDIV_8,
    // PWM clock /8
    Boot_PWMDIV_16,
    // PWM clock /16
    Boot_PWMDIV_32,
    // PWM clock /32
    Boot_PWMDIV_64
    // PWM clock /64
} Boot_PwmDiv;
 
 
enum Boot_SysDiv
index URL
C synopsis target-domain
typedef enum Boot_SysDiv {
    Boot_SYSDIV_1,
    // CPU clock is osc/pll / 1
    Boot_SYSDIV_2,
    // CPU clock is osc/pll / 2
    Boot_SYSDIV_3,
    // CPU clock is osc/pll / 3
    Boot_SYSDIV_4,
    // CPU clock is osc/pll / 4
    Boot_SYSDIV_5,
    // CPU clock is osc/pll / 5
    Boot_SYSDIV_6,
    // CPU clock is osc/pll / 6
    Boot_SYSDIV_7,
    // CPU clock is osc/pll / 7
    Boot_SYSDIV_8,
    // CPU clock is osc/pll / 8
    Boot_SYSDIV_9,
    // CPU clock is osc/pll / 9
    Boot_SYSDIV_10,
    // CPU clock is osc/pll / 10
    Boot_SYSDIV_11,
    // CPU clock is osc/pll / 11
    Boot_SYSDIV_12,
    // CPU clock is osc/pll / 12
    Boot_SYSDIV_13,
    // CPU clock is osc/pll / 13
    Boot_SYSDIV_14,
    // CPU clock is osc/pll / 14
    Boot_SYSDIV_15,
    // CPU clock is osc/pll / 15
    Boot_SYSDIV_16,
    // CPU clock is osc/pll / 16
    Boot_SYSDIV_17,
    // CPU clock is osc/pll / 17
    Boot_SYSDIV_18,
    // CPU clock is osc/pll / 18
    Boot_SYSDIV_19,
    // CPU clock is osc/pll / 19
    Boot_SYSDIV_20,
    // CPU clock is osc/pll / 20
    Boot_SYSDIV_21,
    // CPU clock is osc/pll / 21
    Boot_SYSDIV_22,
    // CPU clock is osc/pll / 22
    Boot_SYSDIV_23,
    // CPU clock is osc/pll / 23
    Boot_SYSDIV_24,
    // CPU clock is osc/pll / 24
    Boot_SYSDIV_25,
    // CPU clock is osc/pll / 25
    Boot_SYSDIV_26,
    // CPU clock is osc/pll / 26
    Boot_SYSDIV_27,
    // CPU clock is osc/pll / 27
    Boot_SYSDIV_28,
    // CPU clock is osc/pll / 28
    Boot_SYSDIV_29,
    // CPU clock is osc/pll / 29
    Boot_SYSDIV_30,
    // CPU clock is osc/pll / 30
    Boot_SYSDIV_31,
    // CPU clock is osc/pll / 31
    Boot_SYSDIV_32,
    // CPU clock is osc/pll / 32
    Boot_SYSDIV_33,
    // CPU clock is osc/pll / 33
    Boot_SYSDIV_34,
    // CPU clock is osc/pll / 34
    Boot_SYSDIV_35,
    // CPU clock is osc/pll / 35
    Boot_SYSDIV_36,
    // CPU clock is osc/pll / 36
    Boot_SYSDIV_37,
    // CPU clock is osc/pll / 37
    Boot_SYSDIV_38,
    // CPU clock is osc/pll / 38
    Boot_SYSDIV_39,
    // CPU clock is osc/pll / 39
    Boot_SYSDIV_40,
    // CPU clock is osc/pll / 40
    Boot_SYSDIV_41,
    // CPU clock is osc/pll / 41
    Boot_SYSDIV_42,
    // CPU clock is osc/pll / 42
    Boot_SYSDIV_43,
    // CPU clock is osc/pll / 43
    Boot_SYSDIV_44,
    // CPU clock is osc/pll / 44
    Boot_SYSDIV_45,
    // CPU clock is osc/pll / 45
    Boot_SYSDIV_46,
    // CPU clock is osc/pll / 46
    Boot_SYSDIV_47,
    // CPU clock is osc/pll / 47
    Boot_SYSDIV_48,
    // CPU clock is osc/pll / 48
    Boot_SYSDIV_49,
    // CPU clock is osc/pll / 49
    Boot_SYSDIV_50,
    // CPU clock is osc/pll / 50
    Boot_SYSDIV_51,
    // CPU clock is osc/pll / 51
    Boot_SYSDIV_52,
    // CPU clock is osc/pll / 52
    Boot_SYSDIV_53,
    // CPU clock is osc/pll / 53
    Boot_SYSDIV_54,
    // CPU clock is osc/pll / 54
    Boot_SYSDIV_55,
    // CPU clock is osc/pll / 55
    Boot_SYSDIV_56,
    // CPU clock is osc/pll / 56
    Boot_SYSDIV_57,
    // CPU clock is osc/pll / 57
    Boot_SYSDIV_58,
    // CPU clock is osc/pll / 58
    Boot_SYSDIV_59,
    // CPU clock is osc/pll / 59
    Boot_SYSDIV_60,
    // CPU clock is osc/pll / 60
    Boot_SYSDIV_61,
    // CPU clock is osc/pll / 61
    Boot_SYSDIV_62,
    // CPU clock is osc/pll / 62
    Boot_SYSDIV_63,
    // CPU clock is osc/pll / 63
    Boot_SYSDIV_64,
    // CPU clock is osc/pll / 64
    Boot_SYSDIV_2_5,
    // CPU clock is osc/pll / 2.5
    Boot_SYSDIV_3_5,
    // CPU clock is osc/pll / 3.5
    Boot_SYSDIV_4_5,
    // CPU clock is osc/pll / 4.5
    Boot_SYSDIV_5_5,
    // CPU clock is osc/pll / 5.5
    Boot_SYSDIV_6_5,
    // CPU clock is osc/pll / 6.5
    Boot_SYSDIV_7_5,
    // CPU clock is osc/pll / 7.5
    Boot_SYSDIV_8_5,
    // CPU clock is osc/pll / 8.5
    Boot_SYSDIV_9_5,
    // CPU clock is osc/pll / 9.5
    Boot_SYSDIV_10_5,
    // CPU clock is osc/pll / 10.5
    Boot_SYSDIV_11_5,
    // CPU clock is osc/pll / 11.5
    Boot_SYSDIV_12_5,
    // CPU clock is osc/pll / 12.5
    Boot_SYSDIV_13_5,
    // CPU clock is osc/pll / 13.5
    Boot_SYSDIV_14_5,
    // CPU clock is osc/pll / 14.5
    Boot_SYSDIV_15_5,
    // CPU clock is osc/pll / 15.5
    Boot_SYSDIV_16_5,
    // CPU clock is osc/pll / 16.5
    Boot_SYSDIV_17_5,
    // CPU clock is osc/pll / 17.5
    Boot_SYSDIV_18_5,
    // CPU clock is osc/pll / 18.5
    Boot_SYSDIV_19_5,
    // CPU clock is osc/pll / 19.5
    Boot_SYSDIV_20_5,
    // CPU clock is osc/pll / 20.5
    Boot_SYSDIV_21_5,
    // CPU clock is osc/pll / 21.5
    Boot_SYSDIV_22_5,
    // CPU clock is osc/pll / 22.5
    Boot_SYSDIV_23_5,
    // CPU clock is osc/pll / 23.5
    Boot_SYSDIV_24_5,
    // CPU clock is osc/pll / 24.5
    Boot_SYSDIV_25_5,
    // CPU clock is osc/pll / 25.5
    Boot_SYSDIV_26_5,
    // CPU clock is osc/pll / 26.5
    Boot_SYSDIV_27_5,
    // CPU clock is osc/pll / 27.5
    Boot_SYSDIV_28_5,
    // CPU clock is osc/pll / 28.5
    Boot_SYSDIV_29_5,
    // CPU clock is osc/pll / 29.5
    Boot_SYSDIV_30_5,
    // CPU clock is osc/pll / 30.5
    Boot_SYSDIV_31_5,
    // CPU clock is osc/pll / 31.5
    Boot_SYSDIV_32_5,
    // CPU clock is osc/pll / 32.5
    Boot_SYSDIV_33_5,
    // CPU clock is osc/pll / 33.5
    Boot_SYSDIV_34_5,
    // CPU clock is osc/pll / 34.5
    Boot_SYSDIV_35_5,
    // CPU clock is osc/pll / 35.5
    Boot_SYSDIV_36_5,
    // CPU clock is osc/pll / 36.5
    Boot_SYSDIV_37_5,
    // CPU clock is osc/pll / 37.5
    Boot_SYSDIV_38_5,
    // CPU clock is osc/pll / 38.5
    Boot_SYSDIV_39_5,
    // CPU clock is osc/pll / 39.5
    Boot_SYSDIV_40_5,
    // CPU clock is osc/pll / 40.5
    Boot_SYSDIV_41_5,
    // CPU clock is osc/pll / 41.5
    Boot_SYSDIV_42_5,
    // CPU clock is osc/pll / 42.5
    Boot_SYSDIV_43_5,
    // CPU clock is osc/pll / 43.5
    Boot_SYSDIV_44_5,
    // CPU clock is osc/pll / 44.5
    Boot_SYSDIV_45_5,
    // CPU clock is osc/pll / 45.5
    Boot_SYSDIV_46_5,
    // CPU clock is osc/pll / 46.5
    Boot_SYSDIV_47_5,
    // CPU clock is osc/pll / 47.5
    Boot_SYSDIV_48_5,
    // CPU clock is osc/pll / 48.5
    Boot_SYSDIV_49_5,
    // CPU clock is osc/pll / 49.5
    Boot_SYSDIV_50_5,
    // CPU clock is osc/pll / 50.5
    Boot_SYSDIV_51_5,
    // CPU clock is osc/pll / 51.5
    Boot_SYSDIV_52_5,
    // CPU clock is osc/pll / 52.5
    Boot_SYSDIV_53_5,
    // CPU clock is osc/pll / 53.5
    Boot_SYSDIV_54_5,
    // CPU clock is osc/pll / 54.5
    Boot_SYSDIV_55_5,
    // CPU clock is osc/pll / 55.5
    Boot_SYSDIV_56_5,
    // CPU clock is osc/pll / 56.5
    Boot_SYSDIV_57_5,
    // CPU clock is osc/pll / 57.5
    Boot_SYSDIV_58_5,
    // CPU clock is osc/pll / 58.5
    Boot_SYSDIV_59_5,
    // CPU clock is osc/pll / 59.5
    Boot_SYSDIV_60_5,
    // CPU clock is osc/pll / 60.5
    Boot_SYSDIV_61_5,
    // CPU clock is osc/pll / 61.5
    Boot_SYSDIV_62_5,
    // CPU clock is osc/pll / 62.5
    Boot_SYSDIV_63_5
    // CPU clock is osc/pll / 63.5
} Boot_SysDiv;
 
 
enum Boot_XtalFreq
index URL
C synopsis target-domain
typedef enum Boot_XtalFreq {
    Boot_XTAL_1MHZ,
    // Using a 1MHz crystal
    Boot_XTAL_1_84MHZ,
    // Using a 1.8432MHz crystal
    Boot_XTAL_2MHZ,
    // Using a 2MHz crystal
    Boot_XTAL_2_45MHZ,
    // Using a 2.4576MHz crystal
    Boot_XTAL_3_57MHZ,
    // Using a 3.579545MHz crystal
    Boot_XTAL_3_68MHZ,
    // Using a 3.6864MHz crystal
    Boot_XTAL_4MHZ,
    // Using a 4MHz crystal
    Boot_XTAL_4_09MHZ,
    // Using a 4.096MHz crystal
    Boot_XTAL_4_91MHZ,
    // Using a 4.9152MHz crystal
    Boot_XTAL_5MHZ,
    // Using a 5MHz crystal
    Boot_XTAL_5_12MHZ,
    // Using a 5.12MHz crystal
    Boot_XTAL_6MHZ,
    // Using a 6MHz crystal
    Boot_XTAL_6_14MHZ,
    // Using a 6.144MHz crystal
    Boot_XTAL_7_37MHZ,
    // Using a 7.3728MHz crystal
    Boot_XTAL_8MHZ,
    // Using a 8MHz crystal
    Boot_XTAL_8_19MHZ,
    // Using a 8.192MHz crystal
    Boot_XTAL_10MHZ,
    // 10.0 MHz (USB)
    Boot_XTAL_12MHZ,
    // 12.0 MHz (USB)
    Boot_XTAL_12_2MHZ,
    // 12.288 MHz
    Boot_XTAL_13_5MHZ,
    // 13.56 MHz
    Boot_XTAL_14_3MHZ,
    // 14.31818 MHz
    Boot_XTAL_16MHZ,
    // 16.0 MHz (USB)
    Boot_XTAL_16_3MHZ
    // 16.384 MHz
} Boot_XtalFreq;
 
 
config Boot_configureClock  // module-wide
index URL

Clock configuration flag, default is false

C synopsis target-domain
extern const Bool Boot_configureClock;
 
DETAILS
Set to true to automatically configure the Clock.
 
config Boot_configureLdo  // module-wide
index URL

LDO configuration flag, default is false

C synopsis target-domain
extern const Bool Boot_configureLdo;
 
DETAILS
Set to true to automatically configure the LDO.
 
config Boot_ioscDisable  // module-wide
index URL

Internal Oscillator Disable flag

C synopsis target-domain
extern const Bool Boot_ioscDisable;
 
 
config Boot_ldoOut  // module-wide
index URL

LDO VADJ setting, default is 2.5V

C synopsis target-domain
extern const Boot_LdoOut Boot_ldoOut;
 
 
config Boot_moscDisable  // module-wide
index URL

Main Oscillator Disable flag

C synopsis target-domain
extern const Bool Boot_moscDisable;
 
 
config Boot_oscSrc  // module-wide
index URL

Oscillator Source

C synopsis target-domain
extern const Boot_OscSrc Boot_oscSrc;
 
 
config Boot_pllBypass  // module-wide
index URL

PLL Bypass flag

C synopsis target-domain
extern const Bool Boot_pllBypass;
 
 
config Boot_pllOutEnable  // module-wide
index URL

PLL Output Enable flag

C synopsis target-domain
extern const Bool Boot_pllOutEnable;
 
 
config Boot_pwmClockDiv  // module-wide
index URL

PWM Clock Divisor

C synopsis target-domain
extern const Boot_PwmDiv Boot_pwmClockDiv;
 
 
config Boot_sysClockDiv  // module-wide
index URL

SYS Clock Divisor

C synopsis target-domain
extern const Boot_SysDiv Boot_sysClockDiv;
 
 
config Boot_xtal  // module-wide
index URL

Crystal Value

C synopsis target-domain
extern const Boot_XtalFreq Boot_xtal;
 
 
XDCscript usage meta-domain sourced in ti/catalog/arm/cortexm3/lm3init/Boot.xdc
var Boot = xdc.useModule('ti.catalog.arm.cortexm3.lm3init.Boot');
module-wide constants & types
    values of type Boot.LdoOut// 
        const Boot.LDOPCTL_2_55V// LDO output of 2.55V;
        const Boot.LDOPCTL_2_60V// LDO output of 2.60V;
        const Boot.LDOPCTL_2_65V// LDO output of 2.65V;
        const Boot.LDOPCTL_2_70V// LDO output of 2.70V;
        const Boot.LDOPCTL_2_75V// LDO output of 2.75V;
        const Boot.LDOPCTL_2_25V// LDO output of 2.25V;
        const Boot.LDOPCTL_2_30V// LDO output of 2.30V;
        const Boot.LDOPCTL_2_35V// LDO output of 2.35V;
        const Boot.LDOPCTL_2_40V// LDO output of 2.40V;
        const Boot.LDOPCTL_2_45V// LDO output of 2.45V;
        const Boot.LDOPCTL_2_50V// LDO output of 2.50V;
 
    values of type Boot.OscSrc// 
        const Boot.OSCSRC_MAIN// Use the main oscillator;
        const Boot.OSCSRC_INT// Use the internal oscillator;
        const Boot.OSCSRC_INT4// Use the internal oscillator / 4;
        const Boot.OSCSRC_30// 30 KHz internal oscillator;
 
    values of type Boot.PwmDiv// 
        const Boot.PWMDIV_1// PWM clock /1;
        const Boot.PWMDIV_2// PWM clock /2;
        const Boot.PWMDIV_4// PWM clock /4;
        const Boot.PWMDIV_8// PWM clock /8;
        const Boot.PWMDIV_16// PWM clock /16;
        const Boot.PWMDIV_32// PWM clock /32;
        const Boot.PWMDIV_64// PWM clock /64;
 
    values of type Boot.SysDiv// 
        const Boot.SYSDIV_1// CPU clock is osc/pll / 1;
        const Boot.SYSDIV_2// CPU clock is osc/pll / 2;
        const Boot.SYSDIV_3// CPU clock is osc/pll / 3;
        const Boot.SYSDIV_4// CPU clock is osc/pll / 4;
        const Boot.SYSDIV_5// CPU clock is osc/pll / 5;
        const Boot.SYSDIV_6// CPU clock is osc/pll / 6;
        const Boot.SYSDIV_7// CPU clock is osc/pll / 7;
        const Boot.SYSDIV_8// CPU clock is osc/pll / 8;
        const Boot.SYSDIV_9// CPU clock is osc/pll / 9;
        const Boot.SYSDIV_10// CPU clock is osc/pll / 10;
        const Boot.SYSDIV_11// CPU clock is osc/pll / 11;
        const Boot.SYSDIV_12// CPU clock is osc/pll / 12;
        const Boot.SYSDIV_13// CPU clock is osc/pll / 13;
        const Boot.SYSDIV_14// CPU clock is osc/pll / 14;
        const Boot.SYSDIV_15// CPU clock is osc/pll / 15;
        const Boot.SYSDIV_16// CPU clock is osc/pll / 16;
        const Boot.SYSDIV_17// CPU clock is osc/pll / 17;
        const Boot.SYSDIV_18// CPU clock is osc/pll / 18;
        const Boot.SYSDIV_19// CPU clock is osc/pll / 19;
        const Boot.SYSDIV_20// CPU clock is osc/pll / 20;
        const Boot.SYSDIV_21// CPU clock is osc/pll / 21;
        const Boot.SYSDIV_22// CPU clock is osc/pll / 22;
        const Boot.SYSDIV_23// CPU clock is osc/pll / 23;
        const Boot.SYSDIV_24// CPU clock is osc/pll / 24;
        const Boot.SYSDIV_25// CPU clock is osc/pll / 25;
        const Boot.SYSDIV_26// CPU clock is osc/pll / 26;
        const Boot.SYSDIV_27// CPU clock is osc/pll / 27;
        const Boot.SYSDIV_28// CPU clock is osc/pll / 28;
        const Boot.SYSDIV_29// CPU clock is osc/pll / 29;
        const Boot.SYSDIV_30// CPU clock is osc/pll / 30;
        const Boot.SYSDIV_31// CPU clock is osc/pll / 31;
        const Boot.SYSDIV_32// CPU clock is osc/pll / 32;
        const Boot.SYSDIV_33// CPU clock is osc/pll / 33;
        const Boot.SYSDIV_34// CPU clock is osc/pll / 34;
        const Boot.SYSDIV_35// CPU clock is osc/pll / 35;
        const Boot.SYSDIV_36// CPU clock is osc/pll / 36;
        const Boot.SYSDIV_37// CPU clock is osc/pll / 37;
        const Boot.SYSDIV_38// CPU clock is osc/pll / 38;
        const Boot.SYSDIV_39// CPU clock is osc/pll / 39;
        const Boot.SYSDIV_40// CPU clock is osc/pll / 40;
        const Boot.SYSDIV_41// CPU clock is osc/pll / 41;
        const Boot.SYSDIV_42// CPU clock is osc/pll / 42;
        const Boot.SYSDIV_43// CPU clock is osc/pll / 43;
        const Boot.SYSDIV_44// CPU clock is osc/pll / 44;
        const Boot.SYSDIV_45// CPU clock is osc/pll / 45;
        const Boot.SYSDIV_46// CPU clock is osc/pll / 46;
        const Boot.SYSDIV_47// CPU clock is osc/pll / 47;
        const Boot.SYSDIV_48// CPU clock is osc/pll / 48;
        const Boot.SYSDIV_49// CPU clock is osc/pll / 49;
        const Boot.SYSDIV_50// CPU clock is osc/pll / 50;
        const Boot.SYSDIV_51// CPU clock is osc/pll / 51;
        const Boot.SYSDIV_52// CPU clock is osc/pll / 52;
        const Boot.SYSDIV_53// CPU clock is osc/pll / 53;
        const Boot.SYSDIV_54// CPU clock is osc/pll / 54;
        const Boot.SYSDIV_55// CPU clock is osc/pll / 55;
        const Boot.SYSDIV_56// CPU clock is osc/pll / 56;
        const Boot.SYSDIV_57// CPU clock is osc/pll / 57;
        const Boot.SYSDIV_58// CPU clock is osc/pll / 58;
        const Boot.SYSDIV_59// CPU clock is osc/pll / 59;
        const Boot.SYSDIV_60// CPU clock is osc/pll / 60;
        const Boot.SYSDIV_61// CPU clock is osc/pll / 61;
        const Boot.SYSDIV_62// CPU clock is osc/pll / 62;
        const Boot.SYSDIV_63// CPU clock is osc/pll / 63;
        const Boot.SYSDIV_64// CPU clock is osc/pll / 64;
        const Boot.SYSDIV_2_5// CPU clock is osc/pll / 2.5;
        const Boot.SYSDIV_3_5// CPU clock is osc/pll / 3.5;
        const Boot.SYSDIV_4_5// CPU clock is osc/pll / 4.5;
        const Boot.SYSDIV_5_5// CPU clock is osc/pll / 5.5;
        const Boot.SYSDIV_6_5// CPU clock is osc/pll / 6.5;
        const Boot.SYSDIV_7_5// CPU clock is osc/pll / 7.5;
        const Boot.SYSDIV_8_5// CPU clock is osc/pll / 8.5;
        const Boot.SYSDIV_9_5// CPU clock is osc/pll / 9.5;
        const Boot.SYSDIV_10_5// CPU clock is osc/pll / 10.5;
        const Boot.SYSDIV_11_5// CPU clock is osc/pll / 11.5;
        const Boot.SYSDIV_12_5// CPU clock is osc/pll / 12.5;
        const Boot.SYSDIV_13_5// CPU clock is osc/pll / 13.5;
        const Boot.SYSDIV_14_5// CPU clock is osc/pll / 14.5;
        const Boot.SYSDIV_15_5// CPU clock is osc/pll / 15.5;
        const Boot.SYSDIV_16_5// CPU clock is osc/pll / 16.5;
        const Boot.SYSDIV_17_5// CPU clock is osc/pll / 17.5;
        const Boot.SYSDIV_18_5// CPU clock is osc/pll / 18.5;
        const Boot.SYSDIV_19_5// CPU clock is osc/pll / 19.5;
        const Boot.SYSDIV_20_5// CPU clock is osc/pll / 20.5;
        const Boot.SYSDIV_21_5// CPU clock is osc/pll / 21.5;
        const Boot.SYSDIV_22_5// CPU clock is osc/pll / 22.5;
        const Boot.SYSDIV_23_5// CPU clock is osc/pll / 23.5;
        const Boot.SYSDIV_24_5// CPU clock is osc/pll / 24.5;
        const Boot.SYSDIV_25_5// CPU clock is osc/pll / 25.5;
        const Boot.SYSDIV_26_5// CPU clock is osc/pll / 26.5;
        const Boot.SYSDIV_27_5// CPU clock is osc/pll / 27.5;
        const Boot.SYSDIV_28_5// CPU clock is osc/pll / 28.5;
        const Boot.SYSDIV_29_5// CPU clock is osc/pll / 29.5;
        const Boot.SYSDIV_30_5// CPU clock is osc/pll / 30.5;
        const Boot.SYSDIV_31_5// CPU clock is osc/pll / 31.5;
        const Boot.SYSDIV_32_5// CPU clock is osc/pll / 32.5;
        const Boot.SYSDIV_33_5// CPU clock is osc/pll / 33.5;
        const Boot.SYSDIV_34_5// CPU clock is osc/pll / 34.5;
        const Boot.SYSDIV_35_5// CPU clock is osc/pll / 35.5;
        const Boot.SYSDIV_36_5// CPU clock is osc/pll / 36.5;
        const Boot.SYSDIV_37_5// CPU clock is osc/pll / 37.5;
        const Boot.SYSDIV_38_5// CPU clock is osc/pll / 38.5;
        const Boot.SYSDIV_39_5// CPU clock is osc/pll / 39.5;
        const Boot.SYSDIV_40_5// CPU clock is osc/pll / 40.5;
        const Boot.SYSDIV_41_5// CPU clock is osc/pll / 41.5;
        const Boot.SYSDIV_42_5// CPU clock is osc/pll / 42.5;
        const Boot.SYSDIV_43_5// CPU clock is osc/pll / 43.5;
        const Boot.SYSDIV_44_5// CPU clock is osc/pll / 44.5;
        const Boot.SYSDIV_45_5// CPU clock is osc/pll / 45.5;
        const Boot.SYSDIV_46_5// CPU clock is osc/pll / 46.5;
        const Boot.SYSDIV_47_5// CPU clock is osc/pll / 47.5;
        const Boot.SYSDIV_48_5// CPU clock is osc/pll / 48.5;
        const Boot.SYSDIV_49_5// CPU clock is osc/pll / 49.5;
        const Boot.SYSDIV_50_5// CPU clock is osc/pll / 50.5;
        const Boot.SYSDIV_51_5// CPU clock is osc/pll / 51.5;
        const Boot.SYSDIV_52_5// CPU clock is osc/pll / 52.5;
        const Boot.SYSDIV_53_5// CPU clock is osc/pll / 53.5;
        const Boot.SYSDIV_54_5// CPU clock is osc/pll / 54.5;
        const Boot.SYSDIV_55_5// CPU clock is osc/pll / 55.5;
        const Boot.SYSDIV_56_5// CPU clock is osc/pll / 56.5;
        const Boot.SYSDIV_57_5// CPU clock is osc/pll / 57.5;
        const Boot.SYSDIV_58_5// CPU clock is osc/pll / 58.5;
        const Boot.SYSDIV_59_5// CPU clock is osc/pll / 59.5;
        const Boot.SYSDIV_60_5// CPU clock is osc/pll / 60.5;
        const Boot.SYSDIV_61_5// CPU clock is osc/pll / 61.5;
        const Boot.SYSDIV_62_5// CPU clock is osc/pll / 62.5;
        const Boot.SYSDIV_63_5// CPU clock is osc/pll / 63.5;
 
    values of type Boot.XtalFreq// 
        const Boot.XTAL_1MHZ// Using a 1MHz crystal;
        const Boot.XTAL_1_84MHZ// Using a 1.8432MHz crystal;
        const Boot.XTAL_2MHZ// Using a 2MHz crystal;
        const Boot.XTAL_2_45MHZ// Using a 2.4576MHz crystal;
        const Boot.XTAL_3_57MHZ// Using a 3.579545MHz crystal;
        const Boot.XTAL_3_68MHZ// Using a 3.6864MHz crystal;
        const Boot.XTAL_4MHZ// Using a 4MHz crystal;
        const Boot.XTAL_4_09MHZ// Using a 4.096MHz crystal;
        const Boot.XTAL_4_91MHZ// Using a 4.9152MHz crystal;
        const Boot.XTAL_5MHZ// Using a 5MHz crystal;
        const Boot.XTAL_5_12MHZ// Using a 5.12MHz crystal;
        const Boot.XTAL_6MHZ// Using a 6MHz crystal;
        const Boot.XTAL_6_14MHZ// Using a 6.144MHz crystal;
        const Boot.XTAL_7_37MHZ// Using a 7.3728MHz crystal;
        const Boot.XTAL_8MHZ// Using a 8MHz crystal;
        const Boot.XTAL_8_19MHZ// Using a 8.192MHz crystal;
        const Boot.XTAL_10MHZ// 10.0 MHz (USB);
        const Boot.XTAL_12MHZ// 12.0 MHz (USB);
        const Boot.XTAL_12_2MHZ// 12.288 MHz;
        const Boot.XTAL_13_5MHZ// 13.56 MHz;
        const Boot.XTAL_14_3MHZ// 14.31818 MHz;
        const Boot.XTAL_16MHZ// 16.0 MHz (USB);
        const Boot.XTAL_16_3MHZ// 16.384 MHz;
 
    var obj = new Boot.ModuleView// ;
        obj.configureClock = Bool  ...
        obj.sysClockDivEnable = Bool  ...
        obj.sysClockDiv = String  ...
        obj.pwmClockDivEnable = Bool  ...
        obj.pwmClockDiv = String  ...
        obj.xtal = String  ...
        obj.oscSrc = String  ...
        obj.pllBypass = Bool  ...
        obj.pllOutEnable = Bool  ...
        obj.ioscDisable = Bool  ...
        obj.moscDisable = Bool  ...
        obj.configureLdo = Bool  ...
        obj.ldoOut = String  ...
module-wide config parameters
    Boot.configureClock// Clock configuration flag, default is false = Bool false;
    Boot.configureLdo// LDO configuration flag, default is false = Bool false;
    Boot.ioscDisable// Internal Oscillator Disable flag = Bool false;
    Boot.ldoOut// LDO VADJ setting, default is 2.5V = Boot.LdoOut Boot.LDOPCTL_2_50V;
    Boot.moscDisable// Main Oscillator Disable flag = Bool false;
    Boot.oscSrc// Oscillator Source = Boot.OscSrc Boot.OSCSRC_MAIN;
    Boot.pllBypass// PLL Bypass flag = Bool false;
    Boot.pllOutEnable// PLL Output Enable flag = Bool false;
    Boot.pwmClockDiv// PWM Clock Divisor = Boot.PwmDiv Boot.PWMDIV_1;
    Boot.sysClockDiv// SYS Clock Divisor = Boot.SysDiv Boot.SYSDIV_1;
    Boot.xtal// Crystal Value = Boot.XtalFreq Boot.XTAL_1MHZ;
 
    Boot.rovViewInfo//  = ViewInfo.Instance ViewInfo.create;
 
 
enum Boot.LdoOut
index URL
XDCscript usage meta-domain
values of type Boot.LdoOut
    const Boot.LDOPCTL_2_55V;
    // LDO output of 2.55V
    const Boot.LDOPCTL_2_60V;
    // LDO output of 2.60V
    const Boot.LDOPCTL_2_65V;
    // LDO output of 2.65V
    const Boot.LDOPCTL_2_70V;
    // LDO output of 2.70V
    const Boot.LDOPCTL_2_75V;
    // LDO output of 2.75V
    const Boot.LDOPCTL_2_25V;
    // LDO output of 2.25V
    const Boot.LDOPCTL_2_30V;
    // LDO output of 2.30V
    const Boot.LDOPCTL_2_35V;
    // LDO output of 2.35V
    const Boot.LDOPCTL_2_40V;
    // LDO output of 2.40V
    const Boot.LDOPCTL_2_45V;
    // LDO output of 2.45V
    const Boot.LDOPCTL_2_50V;
    // LDO output of 2.50V
 
C SYNOPSIS
Boot_LdoOut
 
enum Boot.OscSrc
index URL
XDCscript usage meta-domain
values of type Boot.OscSrc
    const Boot.OSCSRC_MAIN;
    // Use the main oscillator
    const Boot.OSCSRC_INT;
    // Use the internal oscillator
    const Boot.OSCSRC_INT4;
    // Use the internal oscillator / 4
    const Boot.OSCSRC_30;
    // 30 KHz internal oscillator
 
C SYNOPSIS
Boot_OscSrc
 
enum Boot.PwmDiv
index URL
XDCscript usage meta-domain
values of type Boot.PwmDiv
    const Boot.PWMDIV_1;
    // PWM clock /1
    const Boot.PWMDIV_2;
    // PWM clock /2
    const Boot.PWMDIV_4;
    // PWM clock /4
    const Boot.PWMDIV_8;
    // PWM clock /8
    const Boot.PWMDIV_16;
    // PWM clock /16
    const Boot.PWMDIV_32;
    // PWM clock /32
    const Boot.PWMDIV_64;
    // PWM clock /64
 
C SYNOPSIS
Boot_PwmDiv
 
enum Boot.SysDiv
index URL
XDCscript usage meta-domain
values of type Boot.SysDiv
    const Boot.SYSDIV_1;
    // CPU clock is osc/pll / 1
    const Boot.SYSDIV_2;
    // CPU clock is osc/pll / 2
    const Boot.SYSDIV_3;
    // CPU clock is osc/pll / 3
    const Boot.SYSDIV_4;
    // CPU clock is osc/pll / 4
    const Boot.SYSDIV_5;
    // CPU clock is osc/pll / 5
    const Boot.SYSDIV_6;
    // CPU clock is osc/pll / 6
    const Boot.SYSDIV_7;
    // CPU clock is osc/pll / 7
    const Boot.SYSDIV_8;
    // CPU clock is osc/pll / 8
    const Boot.SYSDIV_9;
    // CPU clock is osc/pll / 9
    const Boot.SYSDIV_10;
    // CPU clock is osc/pll / 10
    const Boot.SYSDIV_11;
    // CPU clock is osc/pll / 11
    const Boot.SYSDIV_12;
    // CPU clock is osc/pll / 12
    const Boot.SYSDIV_13;
    // CPU clock is osc/pll / 13
    const Boot.SYSDIV_14;
    // CPU clock is osc/pll / 14
    const Boot.SYSDIV_15;
    // CPU clock is osc/pll / 15
    const Boot.SYSDIV_16;
    // CPU clock is osc/pll / 16
    const Boot.SYSDIV_17;
    // CPU clock is osc/pll / 17
    const Boot.SYSDIV_18;
    // CPU clock is osc/pll / 18
    const Boot.SYSDIV_19;
    // CPU clock is osc/pll / 19
    const Boot.SYSDIV_20;
    // CPU clock is osc/pll / 20
    const Boot.SYSDIV_21;
    // CPU clock is osc/pll / 21
    const Boot.SYSDIV_22;
    // CPU clock is osc/pll / 22
    const Boot.SYSDIV_23;
    // CPU clock is osc/pll / 23
    const Boot.SYSDIV_24;
    // CPU clock is osc/pll / 24
    const Boot.SYSDIV_25;
    // CPU clock is osc/pll / 25
    const Boot.SYSDIV_26;
    // CPU clock is osc/pll / 26
    const Boot.SYSDIV_27;
    // CPU clock is osc/pll / 27
    const Boot.SYSDIV_28;
    // CPU clock is osc/pll / 28
    const Boot.SYSDIV_29;
    // CPU clock is osc/pll / 29
    const Boot.SYSDIV_30;
    // CPU clock is osc/pll / 30
    const Boot.SYSDIV_31;
    // CPU clock is osc/pll / 31
    const Boot.SYSDIV_32;
    // CPU clock is osc/pll / 32
    const Boot.SYSDIV_33;
    // CPU clock is osc/pll / 33
    const Boot.SYSDIV_34;
    // CPU clock is osc/pll / 34
    const Boot.SYSDIV_35;
    // CPU clock is osc/pll / 35
    const Boot.SYSDIV_36;
    // CPU clock is osc/pll / 36
    const Boot.SYSDIV_37;
    // CPU clock is osc/pll / 37
    const Boot.SYSDIV_38;
    // CPU clock is osc/pll / 38
    const Boot.SYSDIV_39;
    // CPU clock is osc/pll / 39
    const Boot.SYSDIV_40;
    // CPU clock is osc/pll / 40
    const Boot.SYSDIV_41;
    // CPU clock is osc/pll / 41
    const Boot.SYSDIV_42;
    // CPU clock is osc/pll / 42
    const Boot.SYSDIV_43;
    // CPU clock is osc/pll / 43
    const Boot.SYSDIV_44;
    // CPU clock is osc/pll / 44
    const Boot.SYSDIV_45;
    // CPU clock is osc/pll / 45
    const Boot.SYSDIV_46;
    // CPU clock is osc/pll / 46
    const Boot.SYSDIV_47;
    // CPU clock is osc/pll / 47
    const Boot.SYSDIV_48;
    // CPU clock is osc/pll / 48
    const Boot.SYSDIV_49;
    // CPU clock is osc/pll / 49
    const Boot.SYSDIV_50;
    // CPU clock is osc/pll / 50
    const Boot.SYSDIV_51;
    // CPU clock is osc/pll / 51
    const Boot.SYSDIV_52;
    // CPU clock is osc/pll / 52
    const Boot.SYSDIV_53;
    // CPU clock is osc/pll / 53
    const Boot.SYSDIV_54;
    // CPU clock is osc/pll / 54
    const Boot.SYSDIV_55;
    // CPU clock is osc/pll / 55
    const Boot.SYSDIV_56;
    // CPU clock is osc/pll / 56
    const Boot.SYSDIV_57;
    // CPU clock is osc/pll / 57
    const Boot.SYSDIV_58;
    // CPU clock is osc/pll / 58
    const Boot.SYSDIV_59;
    // CPU clock is osc/pll / 59
    const Boot.SYSDIV_60;
    // CPU clock is osc/pll / 60
    const Boot.SYSDIV_61;
    // CPU clock is osc/pll / 61
    const Boot.SYSDIV_62;
    // CPU clock is osc/pll / 62
    const Boot.SYSDIV_63;
    // CPU clock is osc/pll / 63
    const Boot.SYSDIV_64;
    // CPU clock is osc/pll / 64
    const Boot.SYSDIV_2_5;
    // CPU clock is osc/pll / 2.5
    const Boot.SYSDIV_3_5;
    // CPU clock is osc/pll / 3.5
    const Boot.SYSDIV_4_5;
    // CPU clock is osc/pll / 4.5
    const Boot.SYSDIV_5_5;
    // CPU clock is osc/pll / 5.5
    const Boot.SYSDIV_6_5;
    // CPU clock is osc/pll / 6.5
    const Boot.SYSDIV_7_5;
    // CPU clock is osc/pll / 7.5
    const Boot.SYSDIV_8_5;
    // CPU clock is osc/pll / 8.5
    const Boot.SYSDIV_9_5;
    // CPU clock is osc/pll / 9.5
    const Boot.SYSDIV_10_5;
    // CPU clock is osc/pll / 10.5
    const Boot.SYSDIV_11_5;
    // CPU clock is osc/pll / 11.5
    const Boot.SYSDIV_12_5;
    // CPU clock is osc/pll / 12.5
    const Boot.SYSDIV_13_5;
    // CPU clock is osc/pll / 13.5
    const Boot.SYSDIV_14_5;
    // CPU clock is osc/pll / 14.5
    const Boot.SYSDIV_15_5;
    // CPU clock is osc/pll / 15.5
    const Boot.SYSDIV_16_5;
    // CPU clock is osc/pll / 16.5
    const Boot.SYSDIV_17_5;
    // CPU clock is osc/pll / 17.5
    const Boot.SYSDIV_18_5;
    // CPU clock is osc/pll / 18.5
    const Boot.SYSDIV_19_5;
    // CPU clock is osc/pll / 19.5
    const Boot.SYSDIV_20_5;
    // CPU clock is osc/pll / 20.5
    const Boot.SYSDIV_21_5;
    // CPU clock is osc/pll / 21.5
    const Boot.SYSDIV_22_5;
    // CPU clock is osc/pll / 22.5
    const Boot.SYSDIV_23_5;
    // CPU clock is osc/pll / 23.5
    const Boot.SYSDIV_24_5;
    // CPU clock is osc/pll / 24.5
    const Boot.SYSDIV_25_5;
    // CPU clock is osc/pll / 25.5
    const Boot.SYSDIV_26_5;
    // CPU clock is osc/pll / 26.5
    const Boot.SYSDIV_27_5;
    // CPU clock is osc/pll / 27.5
    const Boot.SYSDIV_28_5;
    // CPU clock is osc/pll / 28.5
    const Boot.SYSDIV_29_5;
    // CPU clock is osc/pll / 29.5
    const Boot.SYSDIV_30_5;
    // CPU clock is osc/pll / 30.5
    const Boot.SYSDIV_31_5;
    // CPU clock is osc/pll / 31.5
    const Boot.SYSDIV_32_5;
    // CPU clock is osc/pll / 32.5
    const Boot.SYSDIV_33_5;
    // CPU clock is osc/pll / 33.5
    const Boot.SYSDIV_34_5;
    // CPU clock is osc/pll / 34.5
    const Boot.SYSDIV_35_5;
    // CPU clock is osc/pll / 35.5
    const Boot.SYSDIV_36_5;
    // CPU clock is osc/pll / 36.5
    const Boot.SYSDIV_37_5;
    // CPU clock is osc/pll / 37.5
    const Boot.SYSDIV_38_5;
    // CPU clock is osc/pll / 38.5
    const Boot.SYSDIV_39_5;
    // CPU clock is osc/pll / 39.5
    const Boot.SYSDIV_40_5;
    // CPU clock is osc/pll / 40.5
    const Boot.SYSDIV_41_5;
    // CPU clock is osc/pll / 41.5
    const Boot.SYSDIV_42_5;
    // CPU clock is osc/pll / 42.5
    const Boot.SYSDIV_43_5;
    // CPU clock is osc/pll / 43.5
    const Boot.SYSDIV_44_5;
    // CPU clock is osc/pll / 44.5
    const Boot.SYSDIV_45_5;
    // CPU clock is osc/pll / 45.5
    const Boot.SYSDIV_46_5;
    // CPU clock is osc/pll / 46.5
    const Boot.SYSDIV_47_5;
    // CPU clock is osc/pll / 47.5
    const Boot.SYSDIV_48_5;
    // CPU clock is osc/pll / 48.5
    const Boot.SYSDIV_49_5;
    // CPU clock is osc/pll / 49.5
    const Boot.SYSDIV_50_5;
    // CPU clock is osc/pll / 50.5
    const Boot.SYSDIV_51_5;
    // CPU clock is osc/pll / 51.5
    const Boot.SYSDIV_52_5;
    // CPU clock is osc/pll / 52.5
    const Boot.SYSDIV_53_5;
    // CPU clock is osc/pll / 53.5
    const Boot.SYSDIV_54_5;
    // CPU clock is osc/pll / 54.5
    const Boot.SYSDIV_55_5;
    // CPU clock is osc/pll / 55.5
    const Boot.SYSDIV_56_5;
    // CPU clock is osc/pll / 56.5
    const Boot.SYSDIV_57_5;
    // CPU clock is osc/pll / 57.5
    const Boot.SYSDIV_58_5;
    // CPU clock is osc/pll / 58.5
    const Boot.SYSDIV_59_5;
    // CPU clock is osc/pll / 59.5
    const Boot.SYSDIV_60_5;
    // CPU clock is osc/pll / 60.5
    const Boot.SYSDIV_61_5;
    // CPU clock is osc/pll / 61.5
    const Boot.SYSDIV_62_5;
    // CPU clock is osc/pll / 62.5
    const Boot.SYSDIV_63_5;
    // CPU clock is osc/pll / 63.5
 
C SYNOPSIS
Boot_SysDiv
 
enum Boot.XtalFreq
index URL
XDCscript usage meta-domain
values of type Boot.XtalFreq
    const Boot.XTAL_1MHZ;
    // Using a 1MHz crystal
    const Boot.XTAL_1_84MHZ;
    // Using a 1.8432MHz crystal
    const Boot.XTAL_2MHZ;
    // Using a 2MHz crystal
    const Boot.XTAL_2_45MHZ;
    // Using a 2.4576MHz crystal
    const Boot.XTAL_3_57MHZ;
    // Using a 3.579545MHz crystal
    const Boot.XTAL_3_68MHZ;
    // Using a 3.6864MHz crystal
    const Boot.XTAL_4MHZ;
    // Using a 4MHz crystal
    const Boot.XTAL_4_09MHZ;
    // Using a 4.096MHz crystal
    const Boot.XTAL_4_91MHZ;
    // Using a 4.9152MHz crystal
    const Boot.XTAL_5MHZ;
    // Using a 5MHz crystal
    const Boot.XTAL_5_12MHZ;
    // Using a 5.12MHz crystal
    const Boot.XTAL_6MHZ;
    // Using a 6MHz crystal
    const Boot.XTAL_6_14MHZ;
    // Using a 6.144MHz crystal
    const Boot.XTAL_7_37MHZ;
    // Using a 7.3728MHz crystal
    const Boot.XTAL_8MHZ;
    // Using a 8MHz crystal
    const Boot.XTAL_8_19MHZ;
    // Using a 8.192MHz crystal
    const Boot.XTAL_10MHZ;
    // 10.0 MHz (USB)
    const Boot.XTAL_12MHZ;
    // 12.0 MHz (USB)
    const Boot.XTAL_12_2MHZ;
    // 12.288 MHz
    const Boot.XTAL_13_5MHZ;
    // 13.56 MHz
    const Boot.XTAL_14_3MHZ;
    // 14.31818 MHz
    const Boot.XTAL_16MHZ;
    // 16.0 MHz (USB)
    const Boot.XTAL_16_3MHZ;
    // 16.384 MHz
 
C SYNOPSIS
Boot_XtalFreq
 
metaonly struct Boot.ModuleView
index URL
XDCscript usage meta-domain
var obj = new Boot.ModuleView;
 
    obj.configureClock = Bool  ...
    obj.sysClockDivEnable = Bool  ...
    obj.sysClockDiv = String  ...
    obj.pwmClockDivEnable = Bool  ...
    obj.pwmClockDiv = String  ...
    obj.xtal = String  ...
    obj.oscSrc = String  ...
    obj.pllBypass = Bool  ...
    obj.pllOutEnable = Bool  ...
    obj.ioscDisable = Bool  ...
    obj.moscDisable = Bool  ...
    obj.configureLdo = Bool  ...
    obj.ldoOut = String  ...
 
 
config Boot.configureClock  // module-wide
index URL

Clock configuration flag, default is false

XDCscript usage meta-domain
Boot.configureClock = Bool false;
 
DETAILS
Set to true to automatically configure the Clock.
C SYNOPSIS
Boot_configureClock
 
config Boot.configureLdo  // module-wide
index URL

LDO configuration flag, default is false

XDCscript usage meta-domain
Boot.configureLdo = Bool false;
 
DETAILS
Set to true to automatically configure the LDO.
C SYNOPSIS
Boot_configureLdo
 
config Boot.ioscDisable  // module-wide
index URL

Internal Oscillator Disable flag

XDCscript usage meta-domain
Boot.ioscDisable = Bool false;
 
C SYNOPSIS
Boot_ioscDisable
 
config Boot.ldoOut  // module-wide
index URL

LDO VADJ setting, default is 2.5V

XDCscript usage meta-domain
Boot.ldoOut = Boot.LdoOut Boot.LDOPCTL_2_50V;
 
C SYNOPSIS
Boot_ldoOut
 
config Boot.moscDisable  // module-wide
index URL

Main Oscillator Disable flag

XDCscript usage meta-domain
Boot.moscDisable = Bool false;
 
C SYNOPSIS
Boot_moscDisable
 
config Boot.oscSrc  // module-wide
index URL

Oscillator Source

XDCscript usage meta-domain
Boot.oscSrc = Boot.OscSrc Boot.OSCSRC_MAIN;
 
C SYNOPSIS
Boot_oscSrc
 
config Boot.pllBypass  // module-wide
index URL

PLL Bypass flag

XDCscript usage meta-domain
Boot.pllBypass = Bool false;
 
C SYNOPSIS
Boot_pllBypass
 
config Boot.pllOutEnable  // module-wide
index URL

PLL Output Enable flag

XDCscript usage meta-domain
Boot.pllOutEnable = Bool false;
 
C SYNOPSIS
Boot_pllOutEnable
 
config Boot.pwmClockDiv  // module-wide
index URL

PWM Clock Divisor

XDCscript usage meta-domain
Boot.pwmClockDiv = Boot.PwmDiv Boot.PWMDIV_1;
 
C SYNOPSIS
Boot_pwmClockDiv
 
config Boot.sysClockDiv  // module-wide
index URL

SYS Clock Divisor

XDCscript usage meta-domain
Boot.sysClockDiv = Boot.SysDiv Boot.SYSDIV_1;
 
C SYNOPSIS
Boot_sysClockDiv
 
config Boot.xtal  // module-wide
index URL

Crystal Value

XDCscript usage meta-domain
Boot.xtal = Boot.XtalFreq Boot.XTAL_1MHZ;
 
C SYNOPSIS
Boot_xtal
 
metaonly config Boot.rovViewInfo  // module-wide
index URL
XDCscript usage meta-domain
Boot.rovViewInfo = ViewInfo.Instance ViewInfo.create;
 
generated on Tue, 01 May 2012 02:40:21 GMT