metaonly module ti.catalog.c6000.TMS320C6747
index URL

The C6747 device data sheet module

XDCscript usage meta-domain sourced in ti/catalog/c6000/TMS320C6747.xdc
var TMS320C6747 = xdc.useModule('ti.catalog.c6000.TMS320C6747');
module-wide config parameters
    const TMS320C6747.cacheMap//  = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
    TMS320C6747.cacheSizeL1//  = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
    TMS320C6747.cacheSizeL2//  = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6747.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "C674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap//  = IPlatform.Memory[string] [
        [
            "IROM",
            {
                comment: "Internal 1MB L2 ROM",
                name: "IROM",
                base: 0x11700000,
                len: 0x00100000,
                space: "code/data",
                access: "RX"
            }
        ],
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// The map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6747.create// Create an instance-object(String revision, params);
per-instance functions
    inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
    inst.getRegisterSet// The set of valid register names for this CPU() returns Any
 
config TMS320C6747.cacheMap  // module-wide
index URL
XDCscript usage meta-domain
const TMS320C6747.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6747.cacheSizeL1  // module-wide
index URL
XDCscript usage meta-domain
TMS320C6747.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C6747.cacheSizeL2  // module-wide
index URL
XDCscript usage meta-domain
TMS320C6747.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

XDCscript usage meta-domain
var params = new TMS320C6747.Params;
// Instance config-params object
    params.cpuCore = String "C674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // 
    [
        "IROM",
        {
            comment: "Internal 1MB L2 ROM",
            name: "IROM",
            base: 0x11700000,
            len: 0x00100000,
            space: "code/data",
            access: "RX"
        }
    ],
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // The map of peripherals available on the device
config TMS320C6747.cpuCore  // instance
index URL

A string identifying the CPU Core

XDCscript usage meta-domain
var params = new TMS320C6747.Params;
  ...
params.cpuCore = String "C674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6747.cpuCoreRevision  // instance
index URL

A string that uniquely identifies a revision of the core

XDCscript usage meta-domain
var params = new TMS320C6747.Params;
  ...
params.cpuCoreRevision = String "1.0";
config TMS320C6747.dataWordSize  // instance
index URL

The size of an int on the target in 8-bit bytes

XDCscript usage meta-domain
var params = new TMS320C6747.Params;
  ...
params.dataWordSize = Int 4;
config TMS320C6747.deviceHeader  // instance
index URL

The optional header file that define device specific constants and structures

XDCscript usage meta-domain
var params = new TMS320C6747.Params;
  ...
params.deviceHeader = String undefined;
config TMS320C6747.memMap  // instance
index URL
XDCscript usage meta-domain
var params = new TMS320C6747.Params;
  ...
params.memMap = IPlatform.Memory[string] [
    [
        "IROM",
        {
            comment: "Internal 1MB L2 ROM",
            name: "IROM",
            base: 0x11700000,
            len: 0x00100000,
            space: "code/data",
            access: "RX"
        }
    ],
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6747.minDataUnitSize  // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCscript usage meta-domain
var params = new TMS320C6747.Params;
  ...
params.minDataUnitSize = Int 1;
config TMS320C6747.minProgUnitSize  // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCscript usage meta-domain
var params = new TMS320C6747.Params;
  ...
params.minProgUnitSize = Int 1;
config TMS320C6747.peripherals  // instance
index URL

The map of peripherals available on the device

XDCscript usage meta-domain
var params = new TMS320C6747.Params;
  ...
params.peripherals = IPeripheral.Instance[string] undefined;
Instance Creation
index URL

XDCscript usage meta-domain
var params = new TMS320C6747.Params;
// Allocate instance config-params
params.config =   ...
// Assign individual configs
 
var inst = TMS320C6747.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6747.getMemoryMap()  // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCscript usage meta-domain
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6747.getRegisterSet()  // instance
index URL

The set of valid register names for this CPU

XDCscript usage meta-domain
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Tue, 24 Aug 2010 15:40:26 GMT