metaonly module ti.catalog.c6000.TMS320CDRI300
index URL

The DRI300 device data sheet module

This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
XDCspec summary sourced in ti/catalog/c6000/TMS320CDRI300.xdc
metaonly module TMS320CDRI300 {  ...
// inherits ti.catalog.c6000.ITMS320C64_512K
    // inherits ti.catalog.ICpuDataSheet
        // inherits xdc.platform.ICpuDataSheet
instance:  ...
XDCscript usage meta-domain
var TMS320CDRI300 = xdc.useModule('ti.catalog.c6000.TMS320CDRI300');
module-wide config parameters
    const TMS320CDRI300.cacheMap//  = ICacheInfo.CacheDesc[string] [
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "4-way cache (0k)",
                        0x0000
                    ],
                    [
                        "4-way cache (32k)",
                        0x8000
                    ],
                    [
                        "4-way cache (64k)",
                        0x10000
                    ],
                    [
                        "4-way cache (128k)",
                        0x20000
                    ],
                    [
                        "4-way cache (256k)",
                        0x40000
                    ]
                ],
                defaultValue: "4-way cache (0k)",
                memorySection: "IRAM"
            }
        ]
    ];
 
    TMS320CDRI300.cacheSize//  = Long[string] [
        [
            "4-way cache (0k)",
            0x00000
        ],
        [
            "4-way cache (32k)",
            0x08000
        ],
        [
            "4-way cache (64k)",
            0x10000
        ],
        [
            "4-way cache (128k)",
            0x20000
        ],
        [
            "4-way cache (256k)",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDRI300.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6400";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.isa//  = String "64";
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal L2 memory",
                base: 0x00000,
                len: 0x80000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
per-instance creation
    var inst = TMS320CDRI300.create// Create an instance-object( String revision, params );
per-instance functions
    inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers( Any registers ) returns Any
    inst.getRegisterSet// The set of valid register names for this CPU( ) returns Any
 
XDCspec declarations sourced in ti/catalog/c6000/TMS320CDRI300.xdc
package ti.catalog.c6000;
 
metaonly module TMS320CDRI300 inherits ITMS320C64_512K {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "4-way cache (0k)",
                        0x0000
                    ],
                    [
                        "4-way cache (32k)",
                        0x8000
                    ],
                    [
                        "4-way cache (64k)",
                        0x10000
                    ],
                    [
                        "4-way cache (128k)",
                        0x20000
                    ],
                    [
                        "4-way cache (256k)",
                        0x40000
                    ]
                ],
                defaultValue: "4-way cache (0k)",
                memorySection: "IRAM"
            }
        ]
    ];
 
    config Long cacheSize// [string] = [
        [
            "4-way cache (0k)",
            0x00000
        ],
        [
            "4-way cache (32k)",
            0x08000
        ],
        [
            "4-way cache (64k)",
            0x10000
        ],
        [
            "4-way cache (128k)",
            0x20000
        ],
        [
            "4-way cache (256k)",
            0x40000
        ]
    ];
 
 
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "6400";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal L2 memory",
                base: 0x00000,
                len: 0x80000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
per-instance creation
    create// Create an instance-object( String revision );
per-instance functions
    function getMemoryMap// Get the memory map that corresponds to the values of the specified registers( registers );
    function getRegisterSet// The set of valid register names for this CPU( );
}
 
config TMS320CDRI300.cacheMap  // module-wide
index URL
XDCscript usage meta-domain
const TMS320CDRI300.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            map: [
                [
                    "4-way cache (0k)",
                    0x0000
                ],
                [
                    "4-way cache (32k)",
                    0x8000
                ],
                [
                    "4-way cache (64k)",
                    0x10000
                ],
                [
                    "4-way cache (128k)",
                    0x20000
                ],
                [
                    "4-way cache (256k)",
                    0x40000
                ]
            ],
            defaultValue: "4-way cache (0k)",
            memorySection: "IRAM"
        }
    ]
];
 
 
config TMS320CDRI300.cacheSize  // module-wide
index URL
XDCscript usage meta-domain
TMS320CDRI300.cacheSize = Long[string] [
    [
        "4-way cache (0k)",
        0x00000
    ],
    [
        "4-way cache (32k)",
        0x08000
    ],
    [
        "4-way cache (64k)",
        0x10000
    ],
    [
        "4-way cache (128k)",
        0x20000
    ],
    [
        "4-way cache (256k)",
        0x40000
    ]
];
 
 
per-instance config parameters
index URL

XDCscript usage meta-domain
var params = new TMS320CDRI300.Params;
// Instance config-params object
    params.cpuCore = String "6400";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.isa = String "64";
    // 
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal L2 memory",
            base: 0x00000,
            len: 0x80000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
 
config TMS320CDRI300.cpuCore  // per-instance
index URL

A string identifying the CPU Core

XDCscript usage meta-domain
var params = new TMS320CDRI300.Params;
  ...
params.cpuCore = String "6400";
 
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
 
config TMS320CDRI300.cpuCoreRevision  // per-instance
index URL

A string that uniquely identifies a revision of the core

XDCscript usage meta-domain
var params = new TMS320CDRI300.Params;
  ...
params.cpuCoreRevision = String "1.0";
 
 
config TMS320CDRI300.dataWordSize  // per-instance
index URL

The size of an int on the target in 8-bit bytes

XDCscript usage meta-domain
var params = new TMS320CDRI300.Params;
  ...
params.dataWordSize = Int 4;
 
 
config TMS320CDRI300.memMap  // per-instance
index URL

The default memory map for this device

XDCscript usage meta-domain
var params = new TMS320CDRI300.Params;
  ...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal L2 memory",
            base: 0x00000,
            len: 0x80000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
 
 
config TMS320CDRI300.minDataUnitSize  // per-instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCscript usage meta-domain
var params = new TMS320CDRI300.Params;
  ...
params.minDataUnitSize = Int 1;
 
 
config TMS320CDRI300.minProgUnitSize  // per-instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCscript usage meta-domain
var params = new TMS320CDRI300.Params;
  ...
params.minProgUnitSize = Int 1;
 
 
per-instance creation
index URL

XDCscript usage meta-domain
var params = new TMS320CDRI300.Params;
// Allocate instance config-params
params.config =   ...
// Assign individual configs
 
var inst = TMS320CDRI300.create( String revision, params );
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
 
TMS320CDRI300.getMemoryMap( )  // per-instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCscript usage meta-domain
inst.getMemoryMap( Any registers ) returns Any
 
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
 
TMS320CDRI300.getRegisterSet( )  // per-instance
index URL

The set of valid register names for this CPU

XDCscript usage meta-domain
inst.getRegisterSet( ) returns Any
 
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sat, 01 Aug 2009 01:24:58 GMT