40 #include <inc/hw_types.h>
44 #ifdef __IAR_SYSTEMS_ICC__
45 #include <intrinsics.h>
56 #undef SetupTrimDevice
57 #define SetupTrimDevice NOROM_SetupTrimDevice
58 #undef SetupAfterColdResetWakeupFromShutDownCfg1
59 #define SetupAfterColdResetWakeupFromShutDownCfg1 NOROM_SetupAfterColdResetWakeupFromShutDownCfg1
60 #undef SetupAfterColdResetWakeupFromShutDownCfg2
61 #define SetupAfterColdResetWakeupFromShutDownCfg2 NOROM_SetupAfterColdResetWakeupFromShutDownCfg2
62 #undef SetupAfterColdResetWakeupFromShutDownCfg3
63 #define SetupAfterColdResetWakeupFromShutDownCfg3 NOROM_SetupAfterColdResetWakeupFromShutDownCfg3
64 #undef SetupGetTrimForAdcShModeEn
65 #define SetupGetTrimForAdcShModeEn NOROM_SetupGetTrimForAdcShModeEn
66 #undef SetupGetTrimForAdcShVbufEn
67 #define SetupGetTrimForAdcShVbufEn NOROM_SetupGetTrimForAdcShVbufEn
68 #undef SetupGetTrimForAmpcompCtrl
69 #define SetupGetTrimForAmpcompCtrl NOROM_SetupGetTrimForAmpcompCtrl
70 #undef SetupGetTrimForAmpcompTh1
71 #define SetupGetTrimForAmpcompTh1 NOROM_SetupGetTrimForAmpcompTh1
72 #undef SetupGetTrimForAmpcompTh2
73 #define SetupGetTrimForAmpcompTh2 NOROM_SetupGetTrimForAmpcompTh2
74 #undef SetupGetTrimForAnabypassValue1
75 #define SetupGetTrimForAnabypassValue1 NOROM_SetupGetTrimForAnabypassValue1
76 #undef SetupGetTrimForDblrLoopFilterResetVoltage
77 #define SetupGetTrimForDblrLoopFilterResetVoltage NOROM_SetupGetTrimForDblrLoopFilterResetVoltage
78 #undef SetupGetTrimForRadcExtCfg
79 #define SetupGetTrimForRadcExtCfg NOROM_SetupGetTrimForRadcExtCfg
80 #undef SetupGetTrimForRcOscLfIBiasTrim
81 #define SetupGetTrimForRcOscLfIBiasTrim NOROM_SetupGetTrimForRcOscLfIBiasTrim
82 #undef SetupGetTrimForRcOscLfRtuneCtuneTrim
83 #define SetupGetTrimForRcOscLfRtuneCtuneTrim NOROM_SetupGetTrimForRcOscLfRtuneCtuneTrim
84 #undef SetupGetTrimForXoscHfCtl
85 #define SetupGetTrimForXoscHfCtl NOROM_SetupGetTrimForXoscHfCtl
86 #undef SetupGetTrimForXoscHfFastStart
87 #define SetupGetTrimForXoscHfFastStart NOROM_SetupGetTrimForXoscHfFastStart
88 #undef SetupGetTrimForXoscHfIbiastherm
89 #define SetupGetTrimForXoscHfIbiastherm NOROM_SetupGetTrimForXoscHfIbiastherm
90 #undef SetupGetTrimForXoscLfRegulatorAndCmirrwrRatio
91 #define SetupGetTrimForXoscLfRegulatorAndCmirrwrRatio NOROM_SetupGetTrimForXoscLfRegulatorAndCmirrwrRatio
92 #undef SetupSignExtendVddrTrimValue
93 #define SetupSignExtendVddrTrimValue NOROM_SetupSignExtendVddrTrimValue
94 #undef SetupSetCacheModeAccordingToCcfgSetting
95 #define SetupSetCacheModeAccordingToCcfgSetting NOROM_SetupSetCacheModeAccordingToCcfgSetting
96 #undef SetupSetAonRtcSubSecInc
97 #define SetupSetAonRtcSubSecInc NOROM_SetupSetAonRtcSubSecInc
107 #define DELAY_20_USEC 0x140
119 #define CPU_DELAY_MICRO_SECONDS( x ) \
120 CPUdelay(((uint32_t)((( x ) * 48.0 ) / 5.0 )) - 1 )
144 uint32_t ui32Fcfg1Revision;
145 uint32_t ui32AonSysResetctl;
152 if ( ui32Fcfg1Revision == 0xFFFFFFFF ) {
153 ui32Fcfg1Revision = 0;
301 uint32_t ccfg_ModeConfReg ;
370 mp1rev = ( HWREG(
FCFG1_BASE + 0x00000314 ) & 0x0000FFFF );
371 if ( mp1rev < 527 ) {
372 uint32_t vtrim_bod = (( HWREG(
FCFG1_BASE + 0x000002BC ) >> 24 ) & 0xF );
373 uint32_t vtrim_udig = (( HWREG(
FCFG1_BASE + 0x000002BC ) >> 16 ) & 0xF );
374 if ( vtrim_bod > 0 ) {
377 if ( vtrim_udig != 7 ) {
378 if ( vtrim_udig == 6 ) {
381 vtrim_udig = (( vtrim_udig + 2 ) & 0xF );
434 int32_t i32VddrSleepTrim;
435 int32_t i32VddrSleepDelta;
448 i32VddrSleepDelta = ((((int32_t)ccfg_ModeConfReg )
450 >> ( 32 - CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_W ));
452 i32VddrSleepTrim = ( i32VddrSleepTrim + i32VddrSleepDelta + 1 );
453 if ( i32VddrSleepTrim > 21 ) i32VddrSleepTrim = 21;
454 if ( i32VddrSleepTrim < -10 ) i32VddrSleepTrim = -10;
539 ( 0x20 | ( ui32Trim << 1 ));
548 ( 0x10 | ( ui32Trim ));
567 ( 0x60 | ( ui32Trim << 1 ));
578 ( 0x80 | ( ui32Trim << 3 ));
590 ( 0xFC00 | ( ui32Trim << 2 ));
613 uint32_t fcfg1OscConf;
615 uint32_t currentHfClock;
616 uint32_t ccfgExtLfClk;
745 uint32_t ui32Fcfg1Value ;
746 uint32_t ui32XoscHfRow ;
747 uint32_t ui32XoscHfCol ;
748 int32_t i32CustomerDeltaAdjust ;
749 uint32_t ui32TrimValue ;
757 ui32XoscHfRow = (( ui32Fcfg1Value &
760 ui32XoscHfCol = (( ui32Fcfg1Value &
764 i32CustomerDeltaAdjust = 0;
772 i32CustomerDeltaAdjust = ((int32_t)ccfg_ModeConfReg << 16 ) >> 24;
774 while ( i32CustomerDeltaAdjust < 0 ) {
776 if ( ui32XoscHfCol == 0 ) {
777 ui32XoscHfCol = 0xFFFF;
779 if ( ui32XoscHfRow == 0 ) {
784 i32CustomerDeltaAdjust++;
786 while ( i32CustomerDeltaAdjust > 0 ) {
787 ui32XoscHfCol = ( ui32XoscHfCol << 1 ) | 1;
788 if ( ui32XoscHfCol > 0xFFFF ) {
790 ui32XoscHfRow = ( ui32XoscHfRow << 1 ) | 1;
791 if ( ui32XoscHfRow > 0xF ) {
793 ui32XoscHfCol = 0xFFFF;
796 i32CustomerDeltaAdjust--;
803 return (ui32TrimValue);
815 uint32_t ui32TrimValue;
831 return(ui32TrimValue);
843 uint32_t ui32TrimValue;
852 return(ui32TrimValue);
863 uint32_t ui32TrimValue;
864 uint32_t ui32Fcfg1Value;
870 ui32TrimValue = ((ui32Fcfg1Value &
874 ui32TrimValue |= (((ui32Fcfg1Value &
878 ui32TrimValue |= (((ui32Fcfg1Value &
882 ui32TrimValue |= (((ui32Fcfg1Value &
887 return(ui32TrimValue);
898 uint32_t ui32TrimValue;
899 uint32_t ui32Fcfg1Value;
905 ui32TrimValue = (((ui32Fcfg1Value &
909 ui32TrimValue |= (((ui32Fcfg1Value &
913 ui32TrimValue |= (((ui32Fcfg1Value &
917 ui32TrimValue |= (((ui32Fcfg1Value &
922 return(ui32TrimValue);
933 uint32_t ui32TrimValue ;
934 uint32_t ui32Fcfg1Value ;
935 uint32_t ibiasOffset ;
938 int32_t deltaAdjust ;
945 ibiasOffset = ( ui32Fcfg1Value &
948 ibiasInit = ( ui32Fcfg1Value &
958 deltaAdjust += (int32_t)ibiasOffset;
959 if ( deltaAdjust < 0 ) {
965 ibiasOffset = (uint32_t)deltaAdjust;
968 deltaAdjust += (int32_t)ibiasInit;
969 if ( deltaAdjust < 0 ) {
975 ibiasInit = (uint32_t)deltaAdjust;
980 ui32TrimValue |= (((ui32Fcfg1Value &
984 ui32TrimValue |= (((ui32Fcfg1Value &
988 ui32TrimValue |= (((ui32Fcfg1Value &
993 if ( ui32Fcfg1Revision >= 0x00000022 ) {
994 ui32TrimValue |= ((( ui32Fcfg1Value &
1000 return(ui32TrimValue);
1011 uint32_t dblrLoopFilterResetVoltageValue = 0;
1013 if ( ui32Fcfg1Revision >= 0x00000020 ) {
1019 return ( dblrLoopFilterResetVoltageValue );
1030 uint32_t getTrimForAdcShModeEnValue = 1;
1032 if ( ui32Fcfg1Revision >= 0x00000022 ) {
1038 return ( getTrimForAdcShModeEnValue );
1049 uint32_t getTrimForAdcShVbufEnValue = 1;
1051 if ( ui32Fcfg1Revision >= 0x00000022 ) {
1057 return ( getTrimForAdcShVbufEnValue );
1068 uint32_t getTrimForXoschfCtlValue = 0;
1071 if ( ui32Fcfg1Revision >= 0x00000020 ) {
1073 getTrimForXoschfCtlValue =
1078 getTrimForXoschfCtlValue |=
1083 getTrimForXoschfCtlValue |=
1089 return ( getTrimForXoschfCtlValue );
1100 uint32_t ui32XoscHfFastStartValue ;
1107 return ( ui32XoscHfFastStartValue );
1118 uint32_t getTrimForRadcExtCfgValue = 0x403F8000;
1121 if ( ui32Fcfg1Revision >= 0x00000020 ) {
1123 getTrimForRadcExtCfgValue =
1128 getTrimForRadcExtCfgValue |=
1133 getTrimForRadcExtCfgValue |=
1139 return ( getTrimForRadcExtCfgValue );
1150 uint32_t trimForRcOscLfIBiasTrimValue = 0;
1152 if ( ui32Fcfg1Revision >= 0x00000022 ) {
1158 return ( trimForRcOscLfIBiasTrimValue );
1170 uint32_t trimForXoscLfRegulatorAndCmirrwrRatioValue = 0;
1172 if ( ui32Fcfg1Revision >= 0x00000022 ) {
1179 return ( trimForXoscLfRegulatorAndCmirrwrRatioValue );
1196 int32_t i32SignedVddrVal = ui32VddrTrimVal;
1197 if ( i32SignedVddrVal > 0x15 ) {
1198 i32SignedVddrVal -= 0x20;
1200 return ( i32SignedVddrVal );
1224 uint32_t vimsCtlMode0 ;
static void SysCtrlAonSync(void)
Sync all accesses to the AON register interface.
#define IOC_PORT_AON_CLK32K
uint32_t SetupGetTrimForAmpcompTh1(void)
Returns the trim value to be used for the AMPCOMP_TH1 register in OSC_DIG.
uint32_t SetupGetTrimForRcOscLfRtuneCtuneTrim(void)
Returns the trim value to be used for the RCOSCLF_RTUNE_TRIM and the RCOSCLF_CTUNE_TRIM bit fields in...
uint32_t SetupGetTrimForAmpcompTh2(void)
Returns the trim value to be used for the AMPCOMP_TH2 register in OSC_DIG.
uint32_t SetupGetTrimForDblrLoopFilterResetVoltage(uint32_t ui32Fcfg1Revision)
Returns the trim value from FCFG1 to be used as DBLR_LOOP_FILTER_RESET_VOLTAGE setting.
void SetupAfterColdResetWakeupFromShutDownCfg3(uint32_t ccfg_ModeConfReg)
Third part of configuration required when waking up from shutdown.
uint32_t SetupGetTrimForAdcShVbufEn(uint32_t ui32Fcfg1Revision)
Returns the trim value from FCFG1 to be used as ADC_SH_VBUF_EN setting.
#define AUX_WUC_POWER_DOWN
void AUXWUCPowerCtrl(uint32_t ui32PowerMode)
Control the power to the AUX domain.
uint32_t OSCClockSourceGet(uint32_t ui32SrcClk)
Get the source clock settings.
void DDI16BitfieldWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask, uint32_t ui32Shift, uint16_t ui32Data)
Write a bitfield via the DDI using 16-bit maskable write.
uint32_t SetupGetTrimForRadcExtCfg(uint32_t ui32Fcfg1Revision)
Returns the trim value to be used for the RADCEXTCFG register in OSC_DIG.
void SetupSetAonRtcSubSecInc(uint32_t subSecInc)
Doing the tricky stuff needed to enter new RTCSUBSECINC value.
uint32_t SetupGetTrimForRcOscLfIBiasTrim(uint32_t ui32Fcfg1Revision)
Returns the FCFG1 OSC_CONF_ATESTLF_RCOSCLF_IBIAS_TRIM.
void SetupTrimDevice(void)
Performs the necessary trim of the device which is not done in boot code.
void ThisCodeIsBuiltForCC26xxHwRev22AndLater_HaltIfViolated(void)
Verifies that current chip is built for CC26xx HwRev 2.2 or later and never returns if violated...
void SetupAfterColdResetWakeupFromShutDownCfg1(uint32_t ccfg_ModeConfReg)
First part of configuration required when waking up from shutdown.
static void TrimAfterColdResetWakeupFromShutDownWakeupFromPowerDown(void)
Trims to be applied when coming from POWER_DOWN (also called when coming from SHUTDOWN and PIN_RESET)...
uint32_t SetupGetTrimForXoscLfRegulatorAndCmirrwrRatio(uint32_t ui32Fcfg1Revision)
Returns XOSCLF_REGULATOR_TRIM and XOSCLF_CMIRRWR_RATIO as one packet spanning bits [5:0] in the retur...
int32_t SetupSignExtendVddrTrimValue(uint32_t ui32VddrTrimVal)
Sign extend the VDDR_TRIM setting (special format ranging from -10 to +21)
uint32_t SetupGetTrimForAnabypassValue1(uint32_t ccfg_ModeConfReg)
Returns the trim value to be used for the ANABYPASS_VALUE1 register in OSC_DIG.
void SetupSetCacheModeAccordingToCcfgSetting(void)
Set correct VIMS_MODE according to CCFG setting (CACHE or GPRAM)
uint32_t SetupGetTrimForAdcShModeEn(uint32_t ui32Fcfg1Revision)
Returns the trim value from FCFG1 to be used as ADC_SH_MODE_EN setting.
uint32_t SetupGetTrimForAmpcompCtrl(uint32_t ui32Fcfg1Revision)
Returns the trim value to be used for the AMPCOMP_CTRL register in OSC_DIG.
void IOCPortConfigureSet(uint32_t ui32IOId, uint32_t ui32PortId, uint32_t ui32IOConfig)
Set the configuration of an IO port.
static void TrimAfterColdResetWakeupFromShutDown(uint32_t ui32Fcfg1Revision)
Trims to be applied when coming from SHUTDOWN (also called when coming from PIN_RESET).
void DDI32RegWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val)
Write a 32 bit value to a register in the DDI slave.
uint32_t SetupGetTrimForXoscHfFastStart(void)
Returns the trim value to be used as OSC_DIG:CTL1.XOSC_HF_FAST_START.
void OSCClockSourceSet(uint32_t ui32SrcClk, uint32_t ui32Osc)
Configure the oscillator input to the a source clock.
void SetupAfterColdResetWakeupFromShutDownCfg2(uint32_t ui32Fcfg1Revision, uint32_t ccfg_ModeConfReg)
Second part of configuration required when waking up from shutdown.
uint32_t SetupGetTrimForXoscHfCtl(uint32_t ui32Fcfg1Revision)
Returns the trim value to be used for the XOSCHFCTL register in OSC_DIG.
static void TrimAfterColdReset(void)
Trims to be applied when coming from PIN_RESET.
uint32_t SetupGetTrimForXoscHfIbiastherm(void)
Returns the trim value to be used for the XOSC_HF_IBIASTHERM bit field in the ANABYPASS_VALUE2 regist...
static void AONWUCJtagPowerOff(void)
Request power off of the JTAG domain.