The module configuration structure for DMAN3 implementation. It is set at design time by the system integrator to ensure optimal sharing of DMA resources for the execution environment. More...
#include <dman3.h>
Data Fields | |
Uns * | qdmaPaRamBase |
Physical base address of the PARAM0 in the EDMA3/QDMA hardware whose resources are being managed by DMAN3. | |
Uns | maxPaRamEntries |
Total number of PARAM Table entries on the hardware (eg, for IVA2 this is 128, for Himalaya, this is 256). | |
Uns | paRamBaseIndex |
Represents the first PARAM TABLE ENTRY NUMBER that is assigned by configuration for exclusive DMAN3 allocation. | |
Uns | numPaRamEntries |
Number of PARAM Table entries starting at DMAN3_PARAM_BASE_INDEX assigned by configuration for exclusive DMAN3 allocation. | |
Uns | maxQdmaChannels |
The total number of Physical QDMA channels available on the hardware. | |
Uns | numQdmaChannels |
The number of Physical QDMA channels that are assigned to DMAN3 via configuration. | |
Uns * | qdmaChannels |
Array of size DMAN3_NUM_QDMA_CHANNELS that will contain the channel numbers of the Physical QDMA channels assigned to DMAN3 via configuration. | |
Uns | tccAllocationMaskH |
32-bit "high" bitmask representing configuration provided list of TCCs for exclusive DMAN3 allocation. | |
Uns | tccAllocationMaskL |
32-bit "low" bitmask representing configuration provided list of TCCs for exclusive DMAN3 allocation. | |
xdc_runtime_IHeap_Handle | heapInternal |
Memory Heap descriptor for dynamic allocation of DMAN3 objects that must be allocated in L1D Internal RAM. | |
xdc_runtime_IHeap_Handle | heapExternal |
Memory Heap for dynamic allocation of private DMAN3 data structures that can be allocated in external memory. | |
unsigned char | numTccGroup [20] |
Array containing the number of TCCs that will be assigned to the algorithm groups for sharing. | |
unsigned short | numPaRamGroup [20] |
Array containing the number of PaRams that will be assigned to the algorithm groups for sharing. | |
Bool | idma3Internal |
Flag to indicate that the internal memory heap should be used for dynamic allocation of IDMA3 objects. | |
DMAN3_ScratchAllocFxn | scratchAllocFxn |
Function for dynamic allocation of IDMA3 objects 'env' from shared scratch memory. | |
DMAN3_ScratchFreeFxn | scratchFreeFxn |
Function for freeing IDMA3 objects 'env' from shared scratch memory. | |
Uns | nullPaRamIndex |
Index of a reserved PaRam entry that will not be used for any DMA transfers. This PaRam will be used to set QCHMAP register to, when there is no activity on the corresponding QDMA channel. | |
Uns | maxTCs |
The total number of Transfer Controllers available on the hardware (eg, 2 for DaVinci, 4 for Himalaya). | |
Uns * | qdmaQueueMap |
Represents the mapping of the QDMA channels owned by DMAN3 to the event queue. | |
Uns * | queueTCMap |
Represents the mapping of individual hardware Event queues to transfer controllers. | |
Uns * | queuePri |
Represents the priority assigned to each of the Event Queues (and hence the Transfer Controllers). | |
Bool | allowUnshared |
Flag indicating whether DMAN3 should allow algorithms to ask for more resources than configured into their scratch group. |
The module configuration structure for DMAN3 implementation. It is set at design time by the system integrator to ensure optimal sharing of DMA resources for the execution environment.
Physical base address of the PARAM0 in the EDMA3/QDMA hardware whose resources are being managed by DMAN3.
DMAN3_QDMA_PARAM_BASE
Total number of PARAM Table entries on the hardware (eg, for IVA2 this is 128, for Himalaya, this is 256).
DMAN3_MAX_PARAM_ENTRIES
Represents the first PARAM TABLE ENTRY NUMBER that is assigned by configuration for exclusive DMAN3 allocation.
DMAN3_PARAM_BASE_INDEX
Number of PARAM Table entries starting at DMAN3_PARAM_BASE_INDEX assigned by configuration for exclusive DMAN3 allocation.
DMAN3_NUM_CONTIGUOUS_PARAM_ENTRIES
The total number of Physical QDMA channels available on the hardware.
DMAN3_MAX_QDMA_CHANNELS
The number of Physical QDMA channels that are assigned to DMAN3 via configuration.
DMAN3_NUM_QDMA_CHANNELS
Array of size DMAN3_NUM_QDMA_CHANNELS that will contain the channel numbers of the Physical QDMA channels assigned to DMAN3 via configuration.
DMAN3_QDMA_CHANNELS[]
32-bit "high" bitmask representing configuration provided list of TCCs for exclusive DMAN3 allocation.
tccAllocationMaskH
) is configured so that a '1' in bit position 'i' indicates the TCC '32 + i' is assigned to DMAN3.DMAN3_TCC_FREEMASK_H
32-bit "low" bitmask representing configuration provided list of TCCs for exclusive DMAN3 allocation.
tccAllocationMaskL
) is configured so that a '1' in bit position 'i' indicates the TCC 'i' is assigned to DMAN3.DMAN3_TCC_FREEMASK_L
xdc_runtime_IHeap_Handle DMAN3_Params::heapInternal |
Memory Heap descriptor for dynamic allocation of DMAN3 objects that must be allocated in L1D Internal RAM.
heapInternal
is not defined then any IDMA3 protocol that requests IDMA3_INTERNAL type 'env' memory will fail.xdc_runtime_IHeap_Handle DMAN3_Params::heapExternal |
Memory Heap for dynamic allocation of private DMAN3 data structures that can be allocated in external memory.
heapExternal
is not defined then DMAN3 attempts to use heapInternal
. As a consequence at least one of them must be defined.unsigned char DMAN3_Params::numTccGroup[20] |
Array containing the number of TCCs that will be assigned to the algorithm groups for sharing.
unsigned short DMAN3_Params::numPaRamGroup[20] |
Array containing the number of PaRams that will be assigned to the algorithm groups for sharing.
Flag to indicate that the internal memory heap should be used for dynamic allocation of IDMA3 objects.
heapExternal
. idma3Internal
is non-zero, IDMA3 objects will be allocated in the heap specified by heapInternal
. Function for dynamic allocation of IDMA3 objects 'env' from shared scratch memory.
scratchAllocFxn
is NULL then the 'env' will be allocated from persistent memory. scratchFreeFxn
!= NULL, then this function must not be NULL.scratchAllocFxn
to DSKT2_allocScratch(). Function for freeing IDMA3 objects 'env' from shared scratch memory.
scratchAllocFxn
is NULL then the 'env' will be freed from persistent memory. scratchAllocFxn
!= NULL, then this function must not be NULL. scratchFreeFxn
to DSKT2_freeScratch(). Index of a reserved PaRam entry that will not be used for any DMA transfers. This PaRam will be used to set QCHMAP register to, when there is no activity on the corresponding QDMA channel.
The total number of Transfer Controllers available on the hardware (eg, 2 for DaVinci, 4 for Himalaya).
Represents the mapping of the QDMA channels owned by DMAN3 to the event queue.
Represents the mapping of individual hardware Event queues to transfer controllers.
Represents the priority assigned to each of the Event Queues (and hence the Transfer Controllers).
Flag indicating whether DMAN3 should allow algorithms to ask for more resources than configured into their scratch group.