Completion status
[Instance Wide Interface]

Data Structures
struct	EDMA3_RM_GblErrCallbackParams
	Global Error Callback parameters. More...
Typedefs
typedef void(*	EDMA3_RM_GblErrCallback )(EDMA3_RM_GlobalError deviceStatus, unsigned int instanceId, void *gblerrData)
	Global Error callback - caters to module events like bus error etc which are not channel specific. Runs in ISR context.
Enumerations
enum	EDMA3_RM_TccStatus {   EDMA3_RM_XFER_COMPLETE = 1,   EDMA3_RM_E_CC_DMA_EVT_MISS = 2,   EDMA3_RM_E_CC_QDMA_EVT_MISS = 3 }
	This enum defines the channel specific status codes of an EDMA3 transfer. It is returned while calling the channel specific callback function to tell the status. More...
enum	EDMA3_RM_GlobalError {   EDMA3_RM_E_CC_QUE_THRES_EXCEED = 1,   EDMA3_RM_E_CC_TCC = 2,   EDMA3_RM_E_TC_MEM_LOCATION_READ_ERROR = 3,   EDMA3_RM_E_TC_MEM_LOCATION_WRITE_ERROR = 4,   EDMA3_RM_E_TC_INVALID_ADDR = 5,   EDMA3_RM_E_TC_TR_ERROR = 6 }
	This enum defines the global (not specific to any channel) error codes of completion of an EDMA3 transfer. More...

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Detailed Description

This group defines the error codes of completion of an EDMA3 transfer.

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Typedef Documentation

typedef void(* EDMA3_RM_GblErrCallback)(EDMA3_RM_GlobalError deviceStatus, unsigned int instanceId, void *gblerrData)

Global Error callback - caters to module events like bus error etc which are not channel specific. Runs in ISR context.

gblerrData is application provided data when open'ing the Resource Manager.

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Enumeration Type Documentation

enum EDMA3_RM_GlobalError

This enum defines the global (not specific to any channel) error codes of completion of an EDMA3 transfer.

Enumerator:

EDMA3_RM_E_CC_QUE_THRES_EXCEED	Threshold exceed:- for all event queues. These get latched in EDMA3CC error register (CCERR). This error has a direct relation with the setting of EDMA3_RM_GblConfigParams.evtQueueWaterMarkLvl
EDMA3_RM_E_CC_TCC	TCC error:- for outstanding transfer requests expected to return completion code (TCCHEN or TCINTEN bit in OPT is set to 1) exceeding the maximum limit of 63. This also gets latched in the CCERR.
EDMA3_RM_E_TC_MEM_LOCATION_READ_ERROR	Transfer Controller has reported an error Detection of a Read error signaled by the source or destination address
EDMA3_RM_E_TC_MEM_LOCATION_WRITE_ERROR	Detection of a Write error signaled by the source or destination address
EDMA3_RM_E_TC_INVALID_ADDR	Attempt to read or write to an invalid address in the configuration memory map.
EDMA3_RM_E_TC_TR_ERROR	Detection of a FIFO mode TR violating the FIFO mode transfer rules (the source/destination addresses and source/destination indexes must be aligned to 32 bytes).

enum EDMA3_RM_TccStatus

This enum defines the channel specific status codes of an EDMA3 transfer. It is returned while calling the channel specific callback function to tell the status.

Enumerator:

EDMA3_RM_XFER_COMPLETE	DMA Transfer successfully completed (true completion mode) or submitted to the TC (early completion mode).
EDMA3_RM_E_CC_DMA_EVT_MISS	Channel Controller has reported an error DMA missed events:- for all 64 DMA channels. These get latched in the event missed registers (EMR/EMRH).
EDMA3_RM_E_CC_QDMA_EVT_MISS	QDMA missed events:- for all QDMA channels. These get latched in the QDMA event missed register (QEMR).