EDMA3 Resources Management
[EDMA3 Interrupt Manager Interface]

Data Structures
struct	EDMA3_RM_ParamentryRegs
	EDMA3 PaRAM Set. More...
struct	EDMA3_RM_PaRAMRegs
	EDMA3 PaRAM Set in User Configurable format. More...
Defines
#define	EDMA3_RM_DMA_CHANNEL_ANY   (1011u)
#define	EDMA3_RM_QDMA_CHANNEL_ANY   (1012u)
#define	EDMA3_RM_TCC_ANY   (1013u)
#define	EDMA3_RM_PARAM_ANY   (1014u)
#define	EDMA3_RM_CH_NO_PARAM_MAP   (1015u)
#define	EDMA3_RM_CH_NO_TCC_MAP   (1016u)
Enumerations
enum	EDMA3_RM_HW_CHANNEL_EVENT {   EDMA3_RM_HW_CHANNEL_EVENT_0 = 0,   EDMA3_RM_HW_CHANNEL_EVENT_1,   EDMA3_RM_HW_CHANNEL_EVENT_2,   EDMA3_RM_HW_CHANNEL_EVENT_3,   EDMA3_RM_HW_CHANNEL_EVENT_4,   EDMA3_RM_HW_CHANNEL_EVENT_5,   EDMA3_RM_HW_CHANNEL_EVENT_6,   EDMA3_RM_HW_CHANNEL_EVENT_7,   EDMA3_RM_HW_CHANNEL_EVENT_8,   EDMA3_RM_HW_CHANNEL_EVENT_9,   EDMA3_RM_HW_CHANNEL_EVENT_10,   EDMA3_RM_HW_CHANNEL_EVENT_11,   EDMA3_RM_HW_CHANNEL_EVENT_12,   EDMA3_RM_HW_CHANNEL_EVENT_13,   EDMA3_RM_HW_CHANNEL_EVENT_14,   EDMA3_RM_HW_CHANNEL_EVENT_15,   EDMA3_RM_HW_CHANNEL_EVENT_16,   EDMA3_RM_HW_CHANNEL_EVENT_17,   EDMA3_RM_HW_CHANNEL_EVENT_18,   EDMA3_RM_HW_CHANNEL_EVENT_19,   EDMA3_RM_HW_CHANNEL_EVENT_20,   EDMA3_RM_HW_CHANNEL_EVENT_21,   EDMA3_RM_HW_CHANNEL_EVENT_22,   EDMA3_RM_HW_CHANNEL_EVENT_23,   EDMA3_RM_HW_CHANNEL_EVENT_24,   EDMA3_RM_HW_CHANNEL_EVENT_25,   EDMA3_RM_HW_CHANNEL_EVENT_26,   EDMA3_RM_HW_CHANNEL_EVENT_27,   EDMA3_RM_HW_CHANNEL_EVENT_28,   EDMA3_RM_HW_CHANNEL_EVENT_29,   EDMA3_RM_HW_CHANNEL_EVENT_30,   EDMA3_RM_HW_CHANNEL_EVENT_31,   EDMA3_RM_HW_CHANNEL_EVENT_32,   EDMA3_RM_HW_CHANNEL_EVENT_33,   EDMA3_RM_HW_CHANNEL_EVENT_34,   EDMA3_RM_HW_CHANNEL_EVENT_35,   EDMA3_RM_HW_CHANNEL_EVENT_36,   EDMA3_RM_HW_CHANNEL_EVENT_37,   EDMA3_RM_HW_CHANNEL_EVENT_38,   EDMA3_RM_HW_CHANNEL_EVENT_39,   EDMA3_RM_HW_CHANNEL_EVENT_40,   EDMA3_RM_HW_CHANNEL_EVENT_41,   EDMA3_RM_HW_CHANNEL_EVENT_42,   EDMA3_RM_HW_CHANNEL_EVENT_43,   EDMA3_RM_HW_CHANNEL_EVENT_44,   EDMA3_RM_HW_CHANNEL_EVENT_45,   EDMA3_RM_HW_CHANNEL_EVENT_46,   EDMA3_RM_HW_CHANNEL_EVENT_47,   EDMA3_RM_HW_CHANNEL_EVENT_48,   EDMA3_RM_HW_CHANNEL_EVENT_49,   EDMA3_RM_HW_CHANNEL_EVENT_50,   EDMA3_RM_HW_CHANNEL_EVENT_51,   EDMA3_RM_HW_CHANNEL_EVENT_52,   EDMA3_RM_HW_CHANNEL_EVENT_53,   EDMA3_RM_HW_CHANNEL_EVENT_54,   EDMA3_RM_HW_CHANNEL_EVENT_55,   EDMA3_RM_HW_CHANNEL_EVENT_56,   EDMA3_RM_HW_CHANNEL_EVENT_57,   EDMA3_RM_HW_CHANNEL_EVENT_58,   EDMA3_RM_HW_CHANNEL_EVENT_59,   EDMA3_RM_HW_CHANNEL_EVENT_60,   EDMA3_RM_HW_CHANNEL_EVENT_61,   EDMA3_RM_HW_CHANNEL_EVENT_62,   EDMA3_RM_HW_CHANNEL_EVENT_63 }
	DMA Channels assigned to different Hardware Events. They should be used while requesting a specific DMA channel. One possible usage is to maintain a SoC specific file, which will contain the mapping of these hardware events to the respective peripherals for better understanding and lesser probability of errors. Also, if any event associated with a particular peripheral gets changed, only that SoC specific file needs to be changed. More...
enum	EDMA3_RM_QdmaTrigWord {   EDMA3_RM_QDMA_TRIG_OPT = 0,   EDMA3_RM_QDMA_TRIG_SRC = 1,   EDMA3_RM_QDMA_TRIG_ACNT_BCNT = 2,   EDMA3_RM_QDMA_TRIG_DST = 3,   EDMA3_RM_QDMA_TRIG_SRC_DST_BIDX = 4,   EDMA3_RM_QDMA_TRIG_LINK_BCNTRLD = 5,   EDMA3_RM_QDMA_TRIG_SRC_DST_CIDX = 6,   EDMA3_RM_QDMA_TRIG_CCNT = 7,   EDMA3_RM_QDMA_TRIG_DEFAULT = 7 }
	QDMA Trigger Word. More...
enum	EDMA3_RM_Cntrlr_PhyAddr {   EDMA3_RM_CC_PHY_ADDR = 0,   EDMA3_RM_TC0_PHY_ADDR,   EDMA3_RM_TC1_PHY_ADDR,   EDMA3_RM_TC2_PHY_ADDR,   EDMA3_RM_TC3_PHY_ADDR,   EDMA3_RM_TC4_PHY_ADDR,   EDMA3_RM_TC5_PHY_ADDR,   EDMA3_RM_TC6_PHY_ADDR,   EDMA3_RM_TC7_PHY_ADDR }
	CC/TC Physical Address. More...
enum	EDMA3_RM_IoctlCmd {   EDMA3_RM_IOCTL_MIN_IOCTL = 0,   EDMA3_RM_IOCTL_SET_PARAM_CLEAR_OPTION,   EDMA3_RM_IOCTL_GET_PARAM_CLEAR_OPTION,   EDMA3_RM_IOCTL_SET_GBL_REG_MODIFY_OPTION,   EDMA3_RM_IOCTL_GET_GBL_REG_MODIFY_OPTION,   EDMA3_RM_IOCTL_MAX_IOCTL }
	EDMA3 Resource Manager IOCTL commands. More...
Functions
EDMA3_RM_Result	EDMA3_RM_allocResource (EDMA3_RM_Handle hEdmaResMgr, EDMA3_RM_ResDesc *resObj)
	This API is used to allocate specified EDMA3 Resources like DMA/QDMA channel, PaRAM Set or TCC.
EDMA3_RM_Result	EDMA3_RM_freeResource (EDMA3_RM_Handle hEdmaResMgr, const EDMA3_RM_ResDesc *resObj)
	This API is used to free previously allocated EDMA3 Resources like DMA/QDMA channel, PaRAM Set or TCC.
EDMA3_RM_Result	EDMA3_RM_allocContiguousResource (EDMA3_RM_Handle hEdmaResMgr, EDMA3_RM_ResDesc *firstResIdObj, unsigned int numResources)
	Allocate a contiguous region of specified EDMA3 Resource like DMA channel, QDMA channel, PaRAM Set or TCC.
EDMA3_RM_Result	EDMA3_RM_freeContiguousResource (EDMA3_RM_Handle hEdmaResMgr, EDMA3_RM_ResDesc *firstResIdObj, unsigned int numResources)
	Free a contiguous region of specified EDMA3 Resource like DMA channel, QDMA channel, PaRAM Set or TCC, previously allocated.
EDMA3_RM_Result	EDMA3_RM_allocLogicalChannel (EDMA3_RM_Handle hEdmaResMgr, EDMA3_RM_ResDesc *lChObj, unsigned int *pParam, unsigned int *pTcc)
	Request a DMA/QDMA/Link channel.
EDMA3_RM_Result	EDMA3_RM_freeLogicalChannel (EDMA3_RM_Handle hEdmaResMgr, EDMA3_RM_ResDesc *lChObj)
	This API is used to free the specified channel (DMA/QDMA/Link) and its associated resources (PaRAM Set, TCC etc).
EDMA3_RM_Result	EDMA3_RM_mapEdmaChannel (EDMA3_RM_Handle hEdmaResMgr, unsigned int channelId, unsigned int paRAMId)
	Bind the resources DMA Channel and PaRAM Set. Both the DMA channel and the PaRAM set should be previously allocated. If they are not, this API will result in error.
EDMA3_RM_Result	EDMA3_RM_mapQdmaChannel (EDMA3_RM_Handle hEdmaResMgr, unsigned int channelId, unsigned int paRAMId, EDMA3_RM_QdmaTrigWord trigWord)
	Bind the resources QDMA Channel and PaRAM Set. Also, Set the trigger word for the QDMA channel. Both the QDMA channel and the PaRAM set should be previously allocated. If they are not, this API will result in error.
EDMA3_RM_Result	EDMA3_RM_setCCRegister (EDMA3_RM_Handle hEdmaResMgr, unsigned int regOffset, unsigned int newRegValue)
	Set the Channel Controller (CC) Register value.
EDMA3_RM_Result	EDMA3_RM_getCCRegister (EDMA3_RM_Handle hEdmaResMgr, unsigned int regOffset, unsigned int *regValue)
	Get the Channel Controller (CC) Register value.
EDMA3_RM_Result	EDMA3_RM_waitAndClearTcc (EDMA3_RM_Handle hEdmaResMgr, unsigned int tccNo)
	Wait for a transfer completion interrupt to occur and clear it.
EDMA3_RM_Result	EDMA3_RM_checkAndClearTcc (EDMA3_RM_Handle hEdmaResMgr, unsigned int tccNo, unsigned short *tccStatus)
	Returns the status of a previously initiated transfer.
EDMA3_RM_Result	EDMA3_RM_setPaRAM (EDMA3_RM_Handle hEdmaResMgr, EDMA3_RM_ResDesc *lChObj, const EDMA3_RM_PaRAMRegs *newPaRAM)
	Copy the user specified PaRAM Set onto the PaRAM Set associated with the logical channel (DMA/QDMA/Link).
EDMA3_RM_Result	EDMA3_RM_getPaRAM (EDMA3_RM_Handle hEdmaResMgr, EDMA3_RM_ResDesc *lChObj, EDMA3_RM_PaRAMRegs *currPaRAM)
	Retrieve existing PaRAM set associated with specified logical channel (DMA/QDMA/Link).
EDMA3_RM_Result	EDMA3_RM_getPaRAMPhyAddr (EDMA3_RM_Handle hEdmaResMgr, EDMA3_RM_ResDesc *lChObj, unsigned int *paramPhyAddr)
	Get the PaRAM Set Physical Address associated with a logical channel.
EDMA3_RM_Result	EDMA3_RM_getBaseAddress (EDMA3_RM_Handle hEdmaResMgr, EDMA3_RM_Cntrlr_PhyAddr controllerId, unsigned int *phyAddress)
	Get the Channel Controller or Transfer Controller (n) Physical Address.
EDMA3_RM_Result	EDMA3_RM_getGblConfigParams (unsigned int phyCtrllerInstId, EDMA3_RM_GblConfigParams *gblCfgParams)
	Get the SoC specific configuration structure for the EDMA3 Hardware.
EDMA3_RM_Result	EDMA3_RM_getInstanceInitCfg (EDMA3_RM_Handle hEdmaResMgr, EDMA3_RM_InstanceInitConfig *instanceInitConfig)
	Get the RM Instance specific configuration structure for different EDMA3 resources' usage (owned resources, reserved resources etc).
EDMA3_RM_Result	EDMA3_RM_Ioctl (EDMA3_RM_Handle hEdmaResMgr, EDMA3_RM_IoctlCmd cmd, void *cmdArg, void *param)
	EDMA3 Resource Manager IOCTL.

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Detailed Description

Resource Management part of the EDMA3 Resource Manager.

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Define Documentation

#define EDMA3_RM_CH_NO_PARAM_MAP   (1015u)

This define is used to specify that a DMA channel is NOT tied to any PaRAM Set and hence any available PaRAM Set could be used for that DMA channel. It could be used in dmaChannelPaRAMMap [EDMA3_MAX_DMA_CH], in global configuration structure EDMA3_RM_GblConfigParams.

This value should mandatorily be used to mark DMA channels with no initial mapping to specific PaRAM Sets.

Referenced by EDMA3_RM_allocLogicalChannel(), and EDMA3_RM_open().

#define EDMA3_RM_CH_NO_TCC_MAP   (1016u)

This define is used to specify that the DMA/QDMA channel is not tied to any TCC and hence any available TCC could be used for that DMA/QDMA channel. It could be used in dmaChannelTccMap [EDMA3_MAX_DMA_CH], in global configuration structure EDMA3_RM_GblConfigParams.

This value should mandatorily be used to mark DMA channels with no initial mapping to specific TCCs.

Referenced by EDMA3_RM_allocLogicalChannel().

#define EDMA3_RM_DMA_CHANNEL_ANY   (1011u)

Used to specify any available DMA Channel while requesting one. Used in the API EDMA3_RM_allocLogicalChannel (). DMA channel from the pool of (owned && non_reserved && available_right_now) DMA channels will be chosen and returned.

Referenced by EDMA3_RM_allocLogicalChannel().

#define EDMA3_RM_PARAM_ANY   (1014u)

Used to specify any available PaRAM Set while requesting one. Used in the API EDMA3_RM_allocLogicalChannel(), for both DMA/QDMA and Link channels. PaRAM Set from the pool of (owned && non_reserved && available_right_now) PaRAM Sets will be chosen and returned.

Referenced by EDMA3_RM_allocLogicalChannel().

#define EDMA3_RM_QDMA_CHANNEL_ANY   (1012u)

Used to specify any available QDMA Channel while requesting one. Used in the API EDMA3_RM_allocLogicalChannel(). QDMA channel from the pool of (owned && non_reserved && available_right_now) QDMA channels will be chosen and returned.

Referenced by EDMA3_RM_allocLogicalChannel().

#define EDMA3_RM_TCC_ANY   (1013u)

Used to specify any available TCC while requesting one. Used in the API EDMA3_RM_allocLogicalChannel(), for both DMA and QDMA channels. TCC from the pool of (owned && non_reserved && available_right_now) TCCs will be chosen and returned.

Referenced by EDMA3_RM_allocLogicalChannel().

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Enumeration Type Documentation

enum EDMA3_RM_Cntrlr_PhyAddr

CC/TC Physical Address.

Use this enum to get the physical address of the Channel Controller or the Transfer Controller. The address returned could be used by the advanced usres to set/get some specific registers direclty.

Enumerator:

EDMA3_RM_CC_PHY_ADDR	Channel Controller Physical Address
EDMA3_RM_TC0_PHY_ADDR	Transfer Controller 0 Physical Address
EDMA3_RM_TC1_PHY_ADDR	Transfer Controller 1 Physical Address
EDMA3_RM_TC2_PHY_ADDR	Transfer Controller 2 Physical Address
EDMA3_RM_TC3_PHY_ADDR	Transfer Controller 3 Physical Address
EDMA3_RM_TC4_PHY_ADDR	Transfer Controller 4 Physical Address
EDMA3_RM_TC5_PHY_ADDR	Transfer Controller 5 Physical Address
EDMA3_RM_TC6_PHY_ADDR	Transfer Controller 6 Physical Address
EDMA3_RM_TC7_PHY_ADDR	Transfer Controller 7 Physical Address

enum EDMA3_RM_HW_CHANNEL_EVENT

DMA Channels assigned to different Hardware Events. They should be used while requesting a specific DMA channel. One possible usage is to maintain a SoC specific file, which will contain the mapping of these hardware events to the respective peripherals for better understanding and lesser probability of errors. Also, if any event associated with a particular peripheral gets changed, only that SoC specific file needs to be changed.

for eg, the sample SoC specific file "soc.h" can have these defines:

define EDMA3_RM_HW_CHANNEL_MCBSP_TX EDMA3_RM_HW_CHANNEL_EVENT_2 define EDMA3_RM_HW_CHANNEL_MCBSP_RX EDMA3_RM_HW_CHANNEL_EVENT_3

These defines will be used by the MCBSP driver. The same event EDMA3_RM_HW_CHANNEL_EVENT_2/3 could be mapped to some other peripheral also.

Enumerator:

EDMA3_RM_HW_CHANNEL_EVENT_0	Channel assigned to EDMA3 Event 0
EDMA3_RM_HW_CHANNEL_EVENT_1	Channel assigned to EDMA3 Event 1
EDMA3_RM_HW_CHANNEL_EVENT_2	Channel assigned to EDMA3 Event 2
EDMA3_RM_HW_CHANNEL_EVENT_3	Channel assigned to EDMA3 Event 3
EDMA3_RM_HW_CHANNEL_EVENT_4	Channel assigned to EDMA3 Event 4
EDMA3_RM_HW_CHANNEL_EVENT_5	Channel assigned to EDMA3 Event 5
EDMA3_RM_HW_CHANNEL_EVENT_6	Channel assigned to EDMA3 Event 6
EDMA3_RM_HW_CHANNEL_EVENT_7	Channel assigned to EDMA3 Event 7
EDMA3_RM_HW_CHANNEL_EVENT_8	Channel assigned to EDMA3 Event 8
EDMA3_RM_HW_CHANNEL_EVENT_9	Channel assigned to EDMA3 Event 9
EDMA3_RM_HW_CHANNEL_EVENT_10	Channel assigned to EDMA3 Event 10
EDMA3_RM_HW_CHANNEL_EVENT_11	Channel assigned to EDMA3 Event 11
EDMA3_RM_HW_CHANNEL_EVENT_12	Channel assigned to EDMA3 Event 12
EDMA3_RM_HW_CHANNEL_EVENT_13	Channel assigned to EDMA3 Event 13
EDMA3_RM_HW_CHANNEL_EVENT_14	Channel assigned to EDMA3 Event 14
EDMA3_RM_HW_CHANNEL_EVENT_15	Channel assigned to EDMA3 Event 15
EDMA3_RM_HW_CHANNEL_EVENT_16	Channel assigned to EDMA3 Event 16
EDMA3_RM_HW_CHANNEL_EVENT_17	Channel assigned to EDMA3 Event 17
EDMA3_RM_HW_CHANNEL_EVENT_18	Channel assigned to EDMA3 Event 18
EDMA3_RM_HW_CHANNEL_EVENT_19	Channel assigned to EDMA3 Event 19
EDMA3_RM_HW_CHANNEL_EVENT_20	Channel assigned to EDMA3 Event 20
EDMA3_RM_HW_CHANNEL_EVENT_21	Channel assigned to EDMA3 Event 21
EDMA3_RM_HW_CHANNEL_EVENT_22	Channel assigned to EDMA3 Event 22
EDMA3_RM_HW_CHANNEL_EVENT_23	Channel assigned to EDMA3 Event 23
EDMA3_RM_HW_CHANNEL_EVENT_24	Channel assigned to EDMA3 Event 24
EDMA3_RM_HW_CHANNEL_EVENT_25	Channel assigned to EDMA3 Event 25
EDMA3_RM_HW_CHANNEL_EVENT_26	Channel assigned to EDMA3 Event 26
EDMA3_RM_HW_CHANNEL_EVENT_27	Channel assigned to EDMA3 Event 27
EDMA3_RM_HW_CHANNEL_EVENT_28	Channel assigned to EDMA3 Event 28
EDMA3_RM_HW_CHANNEL_EVENT_29	Channel assigned to EDMA3 Event 29
EDMA3_RM_HW_CHANNEL_EVENT_30	Channel assigned to EDMA3 Event 30
EDMA3_RM_HW_CHANNEL_EVENT_31	Channel assigned to EDMA3 Event 31
EDMA3_RM_HW_CHANNEL_EVENT_32	Channel assigned to EDMA3 Event 32
EDMA3_RM_HW_CHANNEL_EVENT_33	Channel assigned to EDMA3 Event 33
EDMA3_RM_HW_CHANNEL_EVENT_34	Channel assigned to EDMA3 Event 34
EDMA3_RM_HW_CHANNEL_EVENT_35	Channel assigned to EDMA3 Event 35
EDMA3_RM_HW_CHANNEL_EVENT_36	Channel assigned to EDMA3 Event 36
EDMA3_RM_HW_CHANNEL_EVENT_37	Channel assigned to EDMA3 Event 37
EDMA3_RM_HW_CHANNEL_EVENT_38	Channel assigned to EDMA3 Event 38
EDMA3_RM_HW_CHANNEL_EVENT_39	Channel assigned to EDMA3 Event 39
EDMA3_RM_HW_CHANNEL_EVENT_40	Channel assigned to EDMA3 Event 40
EDMA3_RM_HW_CHANNEL_EVENT_41	Channel assigned to EDMA3 Event 41
EDMA3_RM_HW_CHANNEL_EVENT_42	Channel assigned to EDMA3 Event 42
EDMA3_RM_HW_CHANNEL_EVENT_43	Channel assigned to EDMA3 Event 43
EDMA3_RM_HW_CHANNEL_EVENT_44	Channel assigned to EDMA3 Event 44
EDMA3_RM_HW_CHANNEL_EVENT_45	Channel assigned to EDMA3 Event 45
EDMA3_RM_HW_CHANNEL_EVENT_46	Channel assigned to EDMA3 Event 46
EDMA3_RM_HW_CHANNEL_EVENT_47	Channel assigned to EDMA3 Event 47
EDMA3_RM_HW_CHANNEL_EVENT_48	Channel assigned to EDMA3 Event 48
EDMA3_RM_HW_CHANNEL_EVENT_49	Channel assigned to EDMA3 Event 49
EDMA3_RM_HW_CHANNEL_EVENT_50	Channel assigned to EDMA3 Event 50
EDMA3_RM_HW_CHANNEL_EVENT_51	Channel assigned to EDMA3 Event 51
EDMA3_RM_HW_CHANNEL_EVENT_52	Channel assigned to EDMA3 Event 52
EDMA3_RM_HW_CHANNEL_EVENT_53	Channel assigned to EDMA3 Event 53
EDMA3_RM_HW_CHANNEL_EVENT_54	Channel assigned to EDMA3 Event 54
EDMA3_RM_HW_CHANNEL_EVENT_55	Channel assigned to EDMA3 Event 55
EDMA3_RM_HW_CHANNEL_EVENT_56	Channel assigned to EDMA3 Event 56
EDMA3_RM_HW_CHANNEL_EVENT_57	Channel assigned to EDMA3 Event 57
EDMA3_RM_HW_CHANNEL_EVENT_58	Channel assigned to EDMA3 Event 58
EDMA3_RM_HW_CHANNEL_EVENT_59	Channel assigned to EDMA3 Event 59
EDMA3_RM_HW_CHANNEL_EVENT_60	Channel assigned to EDMA3 Event 60
EDMA3_RM_HW_CHANNEL_EVENT_61	Channel assigned to EDMA3 Event 61
EDMA3_RM_HW_CHANNEL_EVENT_62	Channel assigned to EDMA3 Event 62
EDMA3_RM_HW_CHANNEL_EVENT_63	Channel assigned to EDMA3 Event 63

enum EDMA3_RM_IoctlCmd

EDMA3 Resource Manager IOCTL commands.

Enumerator:

EDMA3_RM_IOCTL_SET_PARAM_CLEAR_OPTION	PaRAM Sets will be cleared OR will not be cleared during allocation, depending upon this option. For e.g., To clear the PaRAM Sets during allocation, cmdArg = (void *)1; To NOT clear the PaRAM Sets during allocation, cmdArg = (void *)0; For all other values, it will return error. By default, PaRAM Sets will be cleared during allocation. Note: Since this enum can change the behavior how the resources are initialized during their allocation, user is adviced to not use this command while allocating the resources. User should first change the behavior of resources' initialization and then should use start allocating resources.
EDMA3_RM_IOCTL_GET_PARAM_CLEAR_OPTION	To check whether PaRAM Sets will be cleared or not during allocation. If the value read is '1', it means that PaRAM Sets are getting cleared during allocation. If the value read is '0', it means that PaRAM Sets are NOT getting cleared during allocation. For e.g., unsigned int *isParamClearingDone = (unsigned int *)cmdArg; (*isParamClearingDone) = paramClearingRequired;
EDMA3_RM_IOCTL_SET_GBL_REG_MODIFY_OPTION	Global EDMA3 registers (DCHMAP/QCHMAP) and PaRAM Sets will be modified OR will not be modified during EDMA3_RM_allocLogicalChannel (), depending upon this option. For e.g., To modify the Registers or PaRAM Sets during allocation, cmdArg = (void *)1; To NOT modify the Registers or PaRAM Sets during allocation, cmdArg = (void *)0; For all other values, it will return error. By default, Registers or PaRAM Sets will be programmed during allocation. Note: Since this enum can change the behavior how the resources are initialized during their allocation, user is adviced to not use this command while allocating the resources. User should first change the behavior of resources' initialization and then should use start allocating resources.
EDMA3_RM_IOCTL_GET_GBL_REG_MODIFY_OPTION	To check whether Global EDMA3 registers (DCHMAP/QCHMAP) and PaRAM Sets will be programmed or not during allocation (EDMA3_RM_allocLogicalChannel ()). If the value read is '1', it means that the registers/PaRAMs are getting programmed during allocation. If the value read is '0', it means that the registers/PaRAMs are NOT getting programmed during allocation. For e.g., unsigned int *isParamClearingDone = (unsigned int *)cmdArg; (*isParamClearingDone) = paramClearingRequired;

enum EDMA3_RM_QdmaTrigWord

QDMA Trigger Word.

Use this enum to set the QDMA trigger word to any of the 8 DWords(unsigned int) within a Parameter RAM set

Enumerator:

EDMA3_RM_QDMA_TRIG_OPT	Set the OPT field (Offset Address 0h Bytes) as the QDMA trigger word
EDMA3_RM_QDMA_TRIG_SRC	Set the SRC field (Offset Address 4h Bytes) as the QDMA trigger word
EDMA3_RM_QDMA_TRIG_ACNT_BCNT	Set the (ACNT + BCNT) field (Offset Address 8h Bytes) as the QDMA trigger word
EDMA3_RM_QDMA_TRIG_DST	Set the DST field (Offset Address Ch Bytes) as the QDMA trigger word
EDMA3_RM_QDMA_TRIG_SRC_DST_BIDX	Set the (SRCBIDX + DSTBIDX) field (Offset Address 10h Bytes) as the QDMA trigger word
EDMA3_RM_QDMA_TRIG_LINK_BCNTRLD	Set the (LINK + BCNTRLD) field (Offset Address 14h Bytes) as the QDMA trigger word
EDMA3_RM_QDMA_TRIG_SRC_DST_CIDX	Set the (SRCCIDX + DSTCIDX) field (Offset Address 18h Bytes) as the QDMA trigger word
EDMA3_RM_QDMA_TRIG_CCNT	Set the (CCNT + RSVD) field (Offset Address 1Ch Bytes) as the QDMA trigger word
EDMA3_RM_QDMA_TRIG_DEFAULT	Default Trigger Word

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Function Documentation

EDMA3_RM_Result EDMA3_RM_allocContiguousResource	(	EDMA3_RM_Handle	hEdmaResMgr,
		EDMA3_RM_ResDesc *	firstResIdObj,
		unsigned int	numResources
	)

Allocate a contiguous region of specified EDMA3 Resource like DMA channel, QDMA channel, PaRAM Set or TCC.

This API is used to allocate a contiguous region of specified EDMA3 Resources like DMA channel, QDMA channel, PaRAM Set or TCC.

User can specify a particular resource Id to start with and go up to the number of resources requested. The specific resource id to start from could be passed in 'firstResIdObject->resId' and the number of resources requested in 'numResources'.

User can also request ANY available resource(s) of the type 'firstResIdObject->type' by specifying 'firstResIdObject->resId' as EDMA3_RM_RES_ANY.

ANY types of resources are those resources when user doesn't care about the actual resource allocated; user just wants a resource of the type specified. One use-case is to perform memory-to-memory data transfer operation. This operation can be performed using any available DMA or QDMA channel. User doesn't need any specific channel for the same.

To allocate specific contiguous resources, first this API checks whether those requested resources are OWNED by the Resource Manager instance. Then it checks the current availability of those resources.

To allocate ANY available contiguous resources, this API tries to allocate resources from the pool of (owned && non_reserved && available_right_now) resources.

After allocating DMA/QDMA channels or TCCs, the same resources are enabled in the shadow region specific register (DRAE/DRAEH/QRAE). Allocated PaRAM Sets are initialized to NULL before this API returns.

Parameters:

	hEdmaResMgr	[IN] Handle to the previously opened Resource Manager Instance.
	firstResIdObj	[IN] Handle to the first resource descriptor object, which needs to be allocated. firstResIdObject->resId could be a valid resource id in case user wants to allocate specific resources OR it could be EDMA3_RM_RES_ANY in case user wants only the required number of resources and doesn't care about which resources were allocated.
	numResources	[IN] Number of contiguous resources user wants to allocate.

Returns:

EDMA3_RM_SOK or EDMA3_RM Error Code

Note:

This function acquires a RM Instance specific semaphore to prevent simultaneous access to the global pool of resources. It is re-entrant, but should not be called from the user callback function (ISR context).

Take the instance specific semaphore, to prevent simultaneous access to the shared resources.

Enable the DMA channel in the DRAE registers also.

Enable the DMA channel in the DRAEH registers also.

Enable the QDMA channel in the QRAE register also.

Enable the Interrupt channel in the DRAE/DRAEH registers also. Also, If the region id coming from this RM instance is same as the Master RM Instance's region id, only then we will be getting the interrupts on the same side. So save the TCC in the allocatedTCCs[] array.

Also, make the actual PARAM Set NULL, checking the flag whether it is required or not.

Take the instance specific semaphore, to prevent simultaneous access to the shared resources.

We have to search three different arrays, namely ownedResoures, avlblResources and resvdResources, to find the 'common' contiguous resources. For this, take an 'AND' of all three arrays in one single array and use your algorithm on that array.

Try to allocate 'numResources' contiguous resources of type RES_ANY.

If result != EDMA3_RM_SOK, resource allocation failed. Else resources successfully allocated.

Check the Resource Allocation Result 'result' first. If Resource Allocation has resulted in an error, return it (having more priority than semResult. Else, return semResult.

Resource Allocation successful, return semResult for returning semaphore.

References EDMA3_RM_Instance::avlblDmaChannels, EDMA3_RM_Instance::avlblPaRAMSets, EDMA3_RM_Instance::avlblQdmaChannels, EDMA3_RM_Instance::avlblTccs, EDMA3_RM_E_INVALID_PARAM, EDMA3_RM_E_RES_NOT_OWNED, EDMA3_RM_E_SPECIFIED_RES_NOT_AVAILABLE, EDMA3_RM_RES_ANY, EDMA3_RM_RES_DMA_CHANNEL, EDMA3_RM_RES_PARAM_SET, EDMA3_RM_RES_QDMA_CHANNEL, EDMA3_RM_RES_TCC, EDMA3_RM_Obj::gblCfgParams, EDMA3_RM_GblConfigParams::globalRegs, EDMA3_RM_Instance::initParam, EDMA3_RM_GblConfigParams::numDmaChannels, EDMA3_RM_GblConfigParams::numPaRAMSets, EDMA3_RM_GblConfigParams::numQdmaChannels, EDMA3_RM_GblConfigParams::numTccs, EDMA3_RM_InstanceInitConfig::ownDmaChannels, EDMA3_RM_InstanceInitConfig::ownPaRAMSets, EDMA3_RM_InstanceInitConfig::ownQdmaChannels, EDMA3_RM_InstanceInitConfig::ownTccs, EDMA3_RM_Instance::paramInitRequired, EDMA3_RM_Instance::pResMgrObjHandle, EDMA3_RM_Param::regionId, EDMA3_RM_ResDesc::resId, EDMA3_RM_InstanceInitConfig::resvdDmaChannels, EDMA3_RM_InstanceInitConfig::resvdPaRAMSets, EDMA3_RM_InstanceInitConfig::resvdQdmaChannels, EDMA3_RM_InstanceInitConfig::resvdTccs, EDMA3_RM_Param::rmInstInitConfig, EDMA3_RM_Param::rmSemHandle, EDMA3_RM_Instance::shadowRegs, and EDMA3_RM_ResDesc::type.

EDMA3_RM_Result EDMA3_RM_allocLogicalChannel	(	EDMA3_RM_Handle	hEdmaResMgr,
		EDMA3_RM_ResDesc *	lChObj,
		unsigned int *	pParam,
		unsigned int *	pTcc
	)

Request a DMA/QDMA/Link channel.

This API is used to allocate a logical channel (DMA/QDMA/Link) along with the associated resources. For DMA and QDMA channels, TCC and PaRAM Set are also allocated along with the requested channel. For Link channel, ONLY a PaRAM Set is allocated.

Note: To free the logical channel allocated by this API, user should call EDMA3_RM_freeLogicalChannel () ONLY to de-allocate all the allocated resources and remove certain mappings.

User can request a specific logical channel by passing the channel id in 'lChObj->resId' and channel type in 'lChObj->type'. Note that the channel id is the same as the actual resource id. For e.g. in the case of QDMA channels, valid channel ids are from 0 to 7 only.

User can also request ANY available logical channel of the type 'lChObj->type' by specifying 'lChObj->resId' as: a) EDMA3_RM_DMA_CHANNEL_ANY: For DMA channels b) EDMA3_RM_QDMA_CHANNEL_ANY: For QDMA channels, and c) EDMA3_RM_PARAM_ANY: For Link channels. Normally user should use this value to request link channels (PaRAM Sets used for linking purpose only), unless he wants to use some specific link channels (PaRAM Sets) which is also allowed.

This API internally uses EDMA3_RM_allocResource () to allocate the desired resources (DMA/QDMA channel, PaRAM Set and TCC).

For DMA/QDMA channels, after allocating all the EDMA3 resources, this API sets the TCC field of the OPT PaRAM Word with the allocated TCC.

For DMA channel, it also sets the DCHMAP register, if required.

For QDMA channel, it sets the QCHMAP register and CCNT as trigger word and enables the QDMA channel by writing to the QEESR register.

Parameters:

	hEdmaResMgr	[IN] Handle to the previously opened Resource Manager Instance.
	lChObj	[IN/OUT] Handle to the requested logical channel object, which needs to be allocated. It could be a specific logical channel or ANY available logical channel of the requested type. In case user passes a specific resource Id, lChObj value is left unchanged. In case user requests ANY available resource, the allocated resource id is returned in lChObj->resId.
	pParam	[IN/OUT] PaRAM Set for a particular logical (DMA/QDMA) channel. Not used if user requested for a Link channel. In case user passes a specific PaRAM Set value, pParam value is left unchanged. In case user requests ANY available PaRAM Set by passing 'EDMA3_RM_PARAM_ANY' in pParam, the allocated one is returned in pParam.
	pTcc	[IN/OUT] TCC for a particular logical (DMA/QDMA) channel. Not used if user requested for a Link channel. In case user passes a specific TCC value, pTcc value is left unchanged. In case user requests ANY available TCC by passing 'EDMA3_RM_TCC_ANY' in pTcc, the allocated one is returned in pTcc.

Returns:

EDMA3_RM_SOK or EDMA_RM Error Code

Note:

This function internally calls EDMA3_RM_allocResource (), which acquires a RM Instance specific semaphore to prevent simultaneous access to the global pool of resources. It is re-entrant for unique logical channel values, but SHOULD NOT be called from the user callback function (ISR context).

This API is used to allocate a logical channel (DMA/QDMA/Link) along with the associated resources. For DMA and QDMA channels, TCC and PaRAM Set are also allocated along with the requested channel. For Link channel, ONLY a PaRAM Set is allocated.

Note: To free the logical channel allocated by this API, user should call EDMA3_RM_freeLogicalChannel () ONLY to de-allocate all the allocated resources and remove certain mappings.

User can request a specific logical channel by passing the channel id in 'lChObj->resId' and channel type in 'lChObj->type'. Note that the channel id is the same as the actual resource id. For e.g. in the case of QDMA channels, valid channel ids are from 0 to 7 only.

User can also request ANY available logical channel of the type 'lChObj->type' by specifying 'lChObj->resId' as: a) EDMA3_RM_DMA_CHANNEL_ANY: For DMA channels b) EDMA3_RM_QDMA_CHANNEL_ANY: For QDMA channels, and c) EDMA3_RM_PARAM_ANY: For Link channels. Normally user should use this value to request link channels (PaRAM Sets used for linking purpose only), unless he wants to use some specific link channels (PaRAM Sets) which is also allowed.

This API internally uses EDMA3_RM_allocResource () to allocate the desired resources (DMA/QDMA channel, PaRAM Set and TCC).

For DMA/QDMA channels, after allocating all the EDMA3 resources, this API sets the TCC field of the OPT PaRAM Word with the allocated TCC.

For DMA channel, it also sets the DCHMAP register, if required.

For QDMA channel, it sets the QCHMAP register and CCNT as trigger word and enables the QDMA channel by writing to the QEESR register.

Parameters:

	hEdmaResMgr	[IN] Handle to the previously opened Resource Manager Instance.
	lChObj	[IN/OUT] Handle to the requested logical channel object, which needs to be allocated. It could be a specific logical channel or ANY available logical channel of the requested type. In case user passes a specific resource Id, lChObj value is left unchanged. In case user requests ANY available resource, the allocated resource id is returned in lChObj->resId.
	pParam	[IN/OUT] PaRAM Set for a particular logical (DMA/QDMA) channel. Not used if user requested for a Link channel. In case user passes a specific PaRAM Set value, pParam value is left unchanged. In case user requests ANY available PaRAM Set, the allocated one is returned in pParam.
	pTcc	[IN/OUT] TCC for a particular logical (DMA/QDMA) channel. Not used if user requested for a Link channel. In case user passes a specific TCC value, pTcc value is left unchanged. In case user requests ANY available TCC, the allocated one is returned in pTcc

Returns:

EDMA3_RM_SOK or EDMA_RM Error Code

Note:

This function internally calls EDMA3_RM_allocResource (), which acquires a RM Instance specific semaphore to prevent simultaneous access to the global pool of resources. It is re-entrant for unique logical channel values, but SHOULD NOT be called from the user callback function (ISR context).

If the request is for a DMA or QDMA channel, check the pParam and pTcc objects also. For the Link channel request, they could be NULL.

Check the PaRAM Set user has specified for this DMA channel. Two cases exist: a) DCHMAP exists: Any PaRAM Set can be used b) DCHMAP does not exist: Should not be possible only if the channel allocated (ANY) and PaRAM requested are same.

If some PaRAM set is statically mapped to the returned channel number, use that.

Channel mapping does not exist. If the PaRAM Set requested is the same as dma channel allocated (coincidentally), it is fine. Else return error.

Free the previously allocated DMA channel also.

Check the PaRAM Set user has specified for this DMA channel. Two cases exist: a) DCHMAP exists: Any PaRAM Set can be used b) DCHMAP does not exist: Should not be possible only if the channel allocated (ANY) and PaRAM requested are same.

If some PaRAM set is statically mapped to the returned channel number, use that.

Channel mapping does not exist. If the PaRAM Set requested is the same as dma channel allocated (coincidentally), it is fine. Else return error.

Free the previously allocated DMA channel also.

Check the PaRAM Set user has specified for this QDMA channel. If he has specified any particular PaRAM Set, use that.

Check the PaRAM Set user has specified for this QDMA channel. If he has specified any particular PaRAM Set, use that.

Remove any linking. Before doing that, check whether it is permitted or not.

For DMA/QDMA channels, we still have to allocate more resources like TCC, PaRAM Set etc. For Link channel, only the PaRAMSet is required and that has been allocated so no further operations required.

PaRAM Set allocation succeeded. Save the PaRAM Set first.

Check first whether the global registers and the allocated PaRAM Set can be modified or not. If yes, do the needful. Else leave this for the user.

Do the mapping between DMA channel and PaRAM Set. Do this for the EDMA3 Controllers which have a register for mapping DMA Channel to a particular PaRAM Set.

TCC allocation failed, free the previously allocated PaRAM Set and DMA channel.

PaRAM Set allocation failed, free the previously allocated DMA channel also.

PaRAM Set allocation succeeded. Save the PaRAM Set first.

Check first whether the global registers and the allocated PaRAM Set can be modified or not. If yes, do the needful. Else leave this for the user.

TCC allocation failed, free the previously allocated PaRAM Set and QDMA channel.

PaRAM Set allocation failed, free the previously allocated QDMA channel also.

References EDMA3_RM_GblConfigParams::dmaChannelPaRAMMap, EDMA3_RM_GblConfigParams::dmaChannelTccMap, EDMA3_RM_GblConfigParams::dmaChPaRAMMapExists, EDMA3_RM_allocResource(), EDMA3_RM_CH_NO_PARAM_MAP, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_DMA_CH_MAX_VAL, EDMA3_RM_DMA_CHANNEL_ANY, EDMA3_RM_E_INVALID_PARAM, EDMA3_RM_freeResource(), EDMA3_RM_LINK_CH_MAX_VAL, EDMA3_RM_LINK_CH_MIN_VAL, EDMA3_RM_PARAM_ANY, EDMA3_RM_QDMA_CH_MIN_VAL, EDMA3_RM_QDMA_CHANNEL_ANY, EDMA3_RM_QDMA_TRIG_DEFAULT, EDMA3_RM_RES_ANY, EDMA3_RM_RES_DMA_CHANNEL, EDMA3_RM_RES_PARAM_SET, EDMA3_RM_RES_QDMA_CHANNEL, EDMA3_RM_RES_TCC, EDMA3_RM_TCC_ANY, EDMA3_RM_Obj::gblCfgParams, EDMA3_RM_GblConfigParams::globalRegs, EDMA3_RM_ChBoundResources::paRAMId, EDMA3_RM_Obj::phyCtrllerInstId, EDMA3_RM_Instance::pResMgrObjHandle, EDMA3_RM_Instance::regModificationRequired, EDMA3_RM_ResDesc::resId, EDMA3_RM_Instance::shadowRegs, EDMA3_RM_ChBoundResources::tcc, and EDMA3_RM_ResDesc::type.

EDMA3_RM_Result EDMA3_RM_allocResource	(	EDMA3_RM_Handle	hEdmaResMgr,
		EDMA3_RM_ResDesc *	resObj
	)

This API is used to allocate specified EDMA3 Resources like DMA/QDMA channel, PaRAM Set or TCC.

Note: To free the resources allocated by this API, user should call EDMA3_RM_freeResource () ONLY to de-allocate all the allocated resources.

User can either request a specific resource by passing the resource id in 'resObj->resId' OR request ANY available resource of the type 'resObj->type'.

ANY types of resources are those resources when user doesn't care about the actual resource allocated; user just wants a resource of the type specified. One use-case is to perform memory-to-memory data transfer operation. This operation can be performed using any available DMA or QDMA channel. User doesn't need any specific channel for the same.

To allocate a specific resource, first this API checks whether that resource is OWNED by the Resource Manager instance. Then it checks the current availability of that resource.

To allocate ANY available resource, this API tries to allocate a resource from the pool of (owned && non_reserved && available_right_now) resources.

After allocating a DMA/QDMA channel or TCC, the same resource is enabled in the shadow region specific register (DRAE/DRAEH/QRAE).

Allocated PaRAM Set is initialized to NULL before this API returns if user has requested for one.

Parameters:

	hEdmaResMgr	[IN] Handle to the previously opened Resource Manager Instance.
	resObj	[IN/OUT] Handle to the resource descriptor object, which needs to be allocated. In case user passes a specific resource Id, resObj value is left unchanged. In case user requests ANY available resource, the allocated resource id is returned in resObj.

Returns:

EDMA3_RM_SOK or EDMA3_RM Error Code

Note:

This function acquires a RM Instance specific semaphore to prevent simultaneous access to the global pool of resources. It is re-entrant, but should not be called from the user callback function (ISR context).

Take the instance specific semaphore, to prevent simultaneous access to the shared resources.

Check if the register modification flag is set or not.

Enable the DMA channel in the DRAE/DRAEH registers also.

Check if the register modification flag is set or not.

Enable the DMA channel in the DRAE registers also.

Enable the DMA channel in the DRAEH registers also.

Check if the register modification flag is set or not.

Enable the QDMA channel in the QRAE register also.

Check if the register modification flag is set or not.

Enable the QDMA channel in the QRAE register also.

Check if the register modification flag is set or not.

Enable the Interrupt channel in the DRAE/DRAEH registers also. Also, If the region id coming from this RM instance is same as the Master RM Instance's region id, only then we will be getting the interrupts on the same side. So save the TCC in the allocatedTCCs[] array.

Do not modify this global array if the register modificatio flag is not set. Reason being is based on this flag, the IPR/ICR or error bit is cleared in the completion or error handler ISR.

Do not modify this global array if the register modificatio flag is not set. Reason being is based on this flag, the IPR/ICR or error bit is cleared in the completion or error handler ISR.

Check if the register modification flag is set or not.

Enable the Interrupt channel in the DRAE/DRAEH registers also. Also, If the region id coming from this RM instance is same as the Master RM Instance's region id, only then we will be getting the interrupts on the same side. So save the TCC in the allocatedTCCs[] array.

Do not modify this global array if the register modification flag is not set. Reason being is based on this flag, the IPR/ICR or error bit is cleared in the completion or error handler ISR.

Do not modify this global array if the register modificatio flag is not set. Reason being is based on this flag, the IPR/ICR or error bit is cleared in the completion or error handler ISR.

Also, make the actual PARAM Set NULL, checking the flag whether it is required or not.

Also, make the actual PARAM Set NULL, checking the flag whether it is required or not.

Check the Resource Allocation Result 'result' first. If Resource Allocation has resulted in an error, return it (having more priority than semResult. Else, return semResult.

Resource Allocation successful, return semResult for returning semaphore.

References EDMA3_RM_Instance::avlblDmaChannels, EDMA3_RM_Instance::avlblPaRAMSets, EDMA3_RM_Instance::avlblQdmaChannels, EDMA3_RM_Instance::avlblTccs, EDMA3_RM_E_ALL_RES_NOT_AVAILABLE, EDMA3_RM_E_INVALID_PARAM, EDMA3_RM_E_RES_NOT_OWNED, EDMA3_RM_E_SPECIFIED_RES_NOT_AVAILABLE, EDMA3_RM_RES_ANY, EDMA3_RM_RES_DMA_CHANNEL, EDMA3_RM_RES_PARAM_SET, EDMA3_RM_RES_QDMA_CHANNEL, EDMA3_RM_RES_TCC, EDMA3_RM_Obj::gblCfgParams, EDMA3_RM_GblConfigParams::globalRegs, EDMA3_RM_Instance::initParam, EDMA3_RM_GblConfigParams::numDmaChannels, EDMA3_RM_GblConfigParams::numPaRAMSets, EDMA3_RM_GblConfigParams::numQdmaChannels, EDMA3_RM_GblConfigParams::numTccs, EDMA3_RM_InstanceInitConfig::ownDmaChannels, EDMA3_RM_InstanceInitConfig::ownPaRAMSets, EDMA3_RM_InstanceInitConfig::ownQdmaChannels, EDMA3_RM_InstanceInitConfig::ownTccs, EDMA3_RM_Instance::paramInitRequired, EDMA3_RM_Instance::pResMgrObjHandle, EDMA3_RM_Param::regionId, EDMA3_RM_Instance::regModificationRequired, EDMA3_RM_ResDesc::resId, EDMA3_RM_InstanceInitConfig::resvdDmaChannels, EDMA3_RM_InstanceInitConfig::resvdPaRAMSets, EDMA3_RM_InstanceInitConfig::resvdQdmaChannels, EDMA3_RM_InstanceInitConfig::resvdTccs, EDMA3_RM_Param::rmInstInitConfig, EDMA3_RM_Param::rmSemHandle, EDMA3_RM_Instance::shadowRegs, and EDMA3_RM_ResDesc::type.

Referenced by EDMA3_RM_allocLogicalChannel().

EDMA3_RM_Result EDMA3_RM_checkAndClearTcc	(	EDMA3_RM_Handle	hEdmaResMgr,
		unsigned int	tccNo,
		unsigned short *	tccStatus
	)

Returns the status of a previously initiated transfer.

This is a non-blocking function that returns the status of a previously initiated transfer, based on the IPR/IPRH bit. This bit corresponds to the tccNo specified by the user. It clears the corresponding bit, if SET, while returning also.

Parameters:

	hEdmaResMgr	[IN] Handle to the previously opened Resource Manager Instance.
	tccNo	[IN] TCC, specific to which the function checks the status of the IPR/IPRH bit.
	tccStatus	[IN/OUT] Status of the transfer is returned here. Returns "TRUE" if the transfer has completed (IPR/IPRH bit SET), "FALSE" if the transfer has not completed successfully (IPR/IPRH bit NOT SET).

Returns:

EDMA3_RM_SOK or EDMA3_RM Error Code

Note:

This function is re-entrant for different tccNo.

References EDMA3_RM_E_INVALID_PARAM, EDMA3_RM_Obj::gblCfgParams, EDMA3_RM_GblConfigParams::globalRegs, EDMA3_RM_Instance::initParam, EDMA3_RM_GblConfigParams::numTccs, EDMA3_RM_Instance::pResMgrObjHandle, and EDMA3_RM_Param::regionId.

EDMA3_RM_Result EDMA3_RM_freeContiguousResource	(	EDMA3_RM_Handle	hEdmaResMgr,
		EDMA3_RM_ResDesc *	firstResIdObj,
		unsigned int	numResources
	)

Free a contiguous region of specified EDMA3 Resource like DMA channel, QDMA channel, PaRAM Set or TCC, previously allocated.

This API frees a contiguous region of specified EDMA3 Resources like DMA channel, QDMA channel, PaRAM Set or TCC, which have been previously allocated. In case of an error during the freeing of any specific resource, user can check the 'firstResIdObj' object to know the last resource id whose freeing has failed. In case of success, there is no need to check this object.

Parameters:

	hEdmaResMgr	[IN] Handle to the previously opened Resource Manager Instance.
	firstResIdObj	[IN/OUT] Handle to the first resource descriptor object, which needs to be freed. In case of an error while freeing any particular resource, the last resource id whose freeing has failed is returned in this resource descriptor object.
	numResources	[IN] Number of contiguous resources allocated previously which user wants to release

Note:

This is a re-entrant function which internally calls EDMA3_RM_freeResource() for resource de-allocation.

References EDMA3_RM_E_INVALID_PARAM, EDMA3_RM_freeResource(), EDMA3_RM_RES_DMA_CHANNEL, EDMA3_RM_RES_PARAM_SET, EDMA3_RM_RES_QDMA_CHANNEL, EDMA3_RM_RES_TCC, EDMA3_RM_Obj::gblCfgParams, EDMA3_RM_GblConfigParams::numDmaChannels, EDMA3_RM_GblConfigParams::numPaRAMSets, EDMA3_RM_GblConfigParams::numQdmaChannels, EDMA3_RM_GblConfigParams::numTccs, EDMA3_RM_Instance::pResMgrObjHandle, EDMA3_RM_ResDesc::resId, and EDMA3_RM_ResDesc::type.

EDMA3_RM_Result EDMA3_RM_freeLogicalChannel	(	EDMA3_RM_Handle	hEdmaResMgr,
		EDMA3_RM_ResDesc *	lChObj
	)

This API is used to free the specified channel (DMA/QDMA/Link) and its associated resources (PaRAM Set, TCC etc).

This API internally uses EDMA3_RM_freeResource () to free the desired resources.

For DMA/QDMA channels, it also clears the DCHMAP/QCHMAP registers

Parameters:

	hEdmaResMgr	[IN] Handle to the previously opened Resource Manager Instance.
	lChObj	[IN] Handle to the logical channel object, which needs to be freed

Returns:

EDMA3_RM_SOK or EDMA_RM Error Code

Note:

This is a re-entrant function which internally calls EDMA3_RM_freeResource () for resource de-allocation.

Validate DMA channel id first. It should be a valid channel id.

Perfectly valid channel id. Clear some channel specific registers, if it is permitted.

Try to free the DMA Channel now. DMA Channel should be freed only in the end because while freeing, DRAE registers will be RESET. After that, no shadow region specific DMA channel register can be modified. So reset that DRAE register ONLY in the end.

Calculate QDMA Logical Channel Id first. User has given the actual QDMA channel id. So we have to convert it to make the logical QDMA channel id first.

Validate QDMA channel id first. It should be a valid channel id.

Perfectly valid channel id. Clear some channel specific registers, if it is permitted.

Try to free the QDMA Channel now. QDMA Channel should be freed only in the end because while freeing, QRAE registers will be RESET. After that, no shadow region specific QDMA channel register can be modified. So reset that QDRAE register ONLY in the end.

References EDMA3_RM_Instance::avlblDmaChannels, EDMA3_RM_Instance::avlblQdmaChannels, EDMA3_RM_GblConfigParams::dmaChPaRAMMapExists, EDMA3_RM_E_INVALID_PARAM, EDMA3_RM_freeResource(), EDMA3_RM_LINK_CH_MAX_VAL, EDMA3_RM_LINK_CH_MIN_VAL, EDMA3_RM_QDMA_CH_MIN_VAL, EDMA3_RM_RES_DMA_CHANNEL, EDMA3_RM_RES_PARAM_SET, EDMA3_RM_RES_QDMA_CHANNEL, EDMA3_RM_RES_TCC, EDMA3_RM_Obj::gblCfgParams, EDMA3_RM_GblConfigParams::globalRegs, EDMA3_RM_Instance::initParam, EDMA3_RM_InstanceInitConfig::ownDmaChannels, EDMA3_RM_InstanceInitConfig::ownQdmaChannels, EDMA3_RM_ChBoundResources::paRAMId, EDMA3_RM_Obj::phyCtrllerInstId, EDMA3_RM_Instance::pResMgrObjHandle, EDMA3_RM_Instance::regModificationRequired, EDMA3_RM_ResDesc::resId, EDMA3_RM_Param::rmInstInitConfig, EDMA3_RM_Instance::shadowRegs, EDMA3_RM_ChBoundResources::tcc, and EDMA3_RM_ResDesc::type.

EDMA3_RM_Result EDMA3_RM_freeResource	(	EDMA3_RM_Handle	hEdmaResMgr,
		const EDMA3_RM_ResDesc *	resObj
	)

This API is used to free previously allocated EDMA3 Resources like DMA/QDMA channel, PaRAM Set or TCC.

To free a specific resource, first this API checks whether that resource is OWNED by the Resource Manager Instance. Then it checks whether that resource has been allocated by the Resource Manager instance or not.

After freeing a DMA/QDMA channel or TCC, the same resource is disabled in the shadow region specific register (DRAE/DRAEH/QRAE).

Parameters:

	hEdmaResMgr	[IN] Handle to the previously opened Resource Manager Instance.
	resObj	[IN] Handle to the resource descriptor object, which needs to be freed.

Returns:

EDMA3_RM_SOK or EDMA3_RM Error Code

Note:

This function disables the global interrupts to prevent simultaneous access to the global pool of resources. It is re-entrant.

Check if the register modification flag is set or not.

DMA Channel is freed. Reset the bit specific to the DMA channel in the DRAE/DRAEH register also.

Check if the register modification flag is set or not.

QDMA Channel is freed. Reset the bit specific to the QDMA channel in the QRAE register also.

Check if the register modification flag is set or not.

Interrupt Channel is freed. Reset the bit specific to the Interrupt channel in the DRAE/DRAEH register also. Also, if we have earlier saved this TCC in allocatedTCCs[] array, remove it from there too.

References EDMA3_RM_Instance::avlblDmaChannels, EDMA3_RM_Instance::avlblPaRAMSets, EDMA3_RM_Instance::avlblQdmaChannels, EDMA3_RM_Instance::avlblTccs, EDMA3_RM_E_INVALID_PARAM, EDMA3_RM_E_RES_ALREADY_FREE, EDMA3_RM_E_RES_NOT_OWNED, EDMA3_RM_RES_DMA_CHANNEL, EDMA3_RM_RES_PARAM_SET, EDMA3_RM_RES_QDMA_CHANNEL, EDMA3_RM_RES_TCC, EDMA3_RM_Obj::gblCfgParams, EDMA3_RM_GblConfigParams::globalRegs, EDMA3_RM_Instance::initParam, EDMA3_RM_InstanceInitConfig::ownDmaChannels, EDMA3_RM_InstanceInitConfig::ownPaRAMSets, EDMA3_RM_InstanceInitConfig::ownQdmaChannels, EDMA3_RM_InstanceInitConfig::ownTccs, EDMA3_RM_Obj::phyCtrllerInstId, EDMA3_RM_Instance::pResMgrObjHandle, EDMA3_RM_Param::regionId, EDMA3_RM_Instance::regModificationRequired, EDMA3_RM_ResDesc::resId, EDMA3_RM_Param::rmInstInitConfig, and EDMA3_RM_ResDesc::type.

Referenced by EDMA3_RM_allocLogicalChannel(), EDMA3_RM_freeContiguousResource(), and EDMA3_RM_freeLogicalChannel().

EDMA3_RM_Result EDMA3_RM_getBaseAddress	(	EDMA3_RM_Handle	hEdmaResMgr,
		EDMA3_RM_Cntrlr_PhyAddr	controllerId,
		unsigned int *	phyAddress
	)

Get the Channel Controller or Transfer Controller (n) Physical Address.

Parameters:

	hEdmaResMgr	[IN] Handle to the previously opened Resource Manager Instance.
	controllerId	[IN] Channel Controller or Transfer Controller (n) for which the physical address is required.
	phyAddress	[IN/OUT] Physical address is returned here.

Returns:

EDMA3_RM_SOK or EDMA3_RM Error Code

Note:

This function is re-entrant.

Since the TCs enum start from 1, and TCs start from 0, subtract 1 from the enum to get the actual address.

References EDMA3_RM_CC_PHY_ADDR, EDMA3_RM_E_INVALID_PARAM, EDMA3_RM_Obj::gblCfgParams, EDMA3_RM_GblConfigParams::globalRegs, EDMA3_RM_GblConfigParams::numTcs, EDMA3_RM_Instance::pResMgrObjHandle, and EDMA3_RM_GblConfigParams::tcRegs.

EDMA3_RM_Result EDMA3_RM_getCCRegister	(	EDMA3_RM_Handle	hEdmaResMgr,
		unsigned int	regOffset,
		unsigned int *	regValue
	)

Get the Channel Controller (CC) Register value.

Parameters:

	hEdmaResMgr	[IN] Handle to the previously opened Resource Manager Instance.
	regOffset	[IN] CC Register offset whose value is needed. It should be word-aligned.
	regValue	[IN/OUT] Fetched CC Register Value

Returns:

EDMA3_RM_SOK or EDMA3_RM Error Code

Note:

This function is re-entrant.

References EDMA3_RM_E_INVALID_PARAM, EDMA3_RM_Obj::gblCfgParams, EDMA3_RM_GblConfigParams::globalRegs, and EDMA3_RM_Instance::pResMgrObjHandle.

EDMA3_RM_Result EDMA3_RM_getGblConfigParams	(	unsigned int	phyCtrllerInstId,
		EDMA3_RM_GblConfigParams *	gblCfgParams
	)

Get the SoC specific configuration structure for the EDMA3 Hardware.

This API is used to fetch the global SoC specific configuration structure for the EDMA3 Hardware. It is useful for the user who has not passed this information during EDMA3_RM_create() and taken the default configuration coming along with the package.

Parameters:

	phyCtrllerInstId	[IN] EDMA3 Controller Instance Id (Hardware instance id, starting from 0).
	gblCfgParams	[IN/OUT] SoC specific configuration structure for the EDMA3 Hardware will be returned here.

Returns:

EDMA3_RM_SOK or EDMA3_RM Error Code

Note:

This function is re-entrant.

References EDMA3_RM_E_INVALID_PARAM.

EDMA3_RM_Result EDMA3_RM_getInstanceInitCfg	(	EDMA3_RM_Handle	hEdmaResMgr,
		EDMA3_RM_InstanceInitConfig *	instanceInitConfig
	)

Get the RM Instance specific configuration structure for different EDMA3 resources' usage (owned resources, reserved resources etc).

This API is used to fetch the Resource Manager Instance specific configuration structure, for a specific shadow region. It is useful for the user who has not passed this information during EDMA3_RM_opn() and taken the default configuration coming along with the package. EDMA3 resources, owned and reserved by this RM instance, will be returned from this API.

Parameters:

	hEdmaResMgr	[IN] Handle to the previously opened Resource Manager Instance.
	instanceInitConfig	[IN/OUT] RM Instance specific configuration structure will be returned here.

Returns:

EDMA3_RM_SOK or EDMA3_RM Error Code

Note:

This function is re-entrant.

References EDMA3_RM_E_INVALID_PARAM, EDMA3_RM_Obj::phyCtrllerInstId, and EDMA3_RM_Instance::pResMgrObjHandle.

EDMA3_RM_Result EDMA3_RM_getPaRAM	(	EDMA3_RM_Handle	hEdmaResMgr,
		EDMA3_RM_ResDesc *	lChObj,
		EDMA3_RM_PaRAMRegs *	currPaRAM
	)

Retrieve existing PaRAM set associated with specified logical channel (DMA/QDMA/Link).

Parameters:

	hEdmaResMgr	[IN] Handle to the previously opened Resource Manager Instance.
	lChObj	[IN] Logical Channel object for which the PaRAM set is requested. User should pass the resource type and id in this object.
	currPaRAM	[IN/OUT] User gets the existing PaRAM here.

Returns:

EDMA3_RM_SOK or EDMA3_RM Error Code

Note:

This function is re-entrant.

User has passed the actual param set value here. Use this value only

References EDMA3_RM_DMA_CH_MAX_VAL, EDMA3_RM_E_INVALID_PARAM, EDMA3_RM_QDMA_CH_MIN_VAL, EDMA3_RM_RES_DMA_CHANNEL, EDMA3_RM_RES_PARAM_SET, EDMA3_RM_RES_QDMA_CHANNEL, EDMA3_RM_Obj::gblCfgParams, EDMA3_RM_GblConfigParams::globalRegs, EDMA3_RM_ChBoundResources::paRAMId, EDMA3_RM_Obj::phyCtrllerInstId, EDMA3_RM_Instance::pResMgrObjHandle, EDMA3_RM_ResDesc::resId, and EDMA3_RM_ResDesc::type.

EDMA3_RM_Result EDMA3_RM_getPaRAMPhyAddr	(	EDMA3_RM_Handle	hEdmaResMgr,
		EDMA3_RM_ResDesc *	lChObj,
		unsigned int *	paramPhyAddr
	)

Get the PaRAM Set Physical Address associated with a logical channel.

This function returns the PaRAM Set Phy Address (unsigned 32 bits). The returned address could be used by the advanced users to program the PaRAM Set directly without using any APIs.

Least significant 16 bits of this address could be used to program the LINK field in the PaRAM Set. Users which program the LINK field directly SHOULD use this API to get the associated PaRAM Set address with the LINK channel.

Parameters:

	hEdmaResMgr	[IN] Handle to the previously opened Resource Manager Instance.
	lChObj	[IN] Logical Channel object for which the PaRAM set physical address is required. User should pass the resource type and id in this object.
	paramPhyAddr	[IN/OUT] PaRAM Set physical address is returned here.

Returns:

EDMA3_RM_SOK or EDMA3_RM Error Code

Note:

This function is re-entrant.

User has passed the actual param set value here. Use this value only

References EDMA3_RM_DMA_CH_MAX_VAL, EDMA3_RM_E_INVALID_PARAM, EDMA3_RM_QDMA_CH_MIN_VAL, EDMA3_RM_RES_DMA_CHANNEL, EDMA3_RM_RES_PARAM_SET, EDMA3_RM_RES_QDMA_CHANNEL, EDMA3_RM_Obj::gblCfgParams, EDMA3_RM_GblConfigParams::globalRegs, EDMA3_RM_ChBoundResources::paRAMId, EDMA3_RM_Obj::phyCtrllerInstId, EDMA3_RM_Instance::pResMgrObjHandle, EDMA3_RM_ResDesc::resId, and EDMA3_RM_ResDesc::type.

EDMA3_RM_Result EDMA3_RM_Ioctl	(	EDMA3_RM_Handle	hEdmaResMgr,
		EDMA3_RM_IoctlCmd	cmd,
		void *	cmdArg,
		void *	param
	)

EDMA3 Resource Manager IOCTL.

This function provides IOCTL functionality for EDMA3 Resource Manager

Parameters:

	hEdmaResMgr	[IN] Handle to the previously opened Resource Manager Instance.
	cmd	[IN] IOCTL command to be performed
	cmdArg	[IN/OUT] IOCTL command argument (if any)
	param	[IN/OUT] Device/Cmd specific argument.

Returns:

EDMA3_RM_SOK or EDMA3_RM Error Code

Note:

For 'EDMA3_RM_IOCTL_GET_PARAM_CLEAR_OPTION', this function is re-entrant. For 'EDMA3_RM_IOCTL_SET_PARAM_CLEAR_OPTION', this function is re-entrant for different Resource Manager Instances (handles).

This function provides IOCTL functionality for EDMA3 Resource Manager

Parameters:

	hEdmaResMgr	[IN] Handle to the previously opened Resource Manager Instance.
	cmd	[IN] IOCTL command to be performed
	cmdArg	[IN/OUT] IOCTL command argument (if any)
	param	[IN/OUT] Device/Cmd specific argument

Returns:

EDMA3_RM_SOK or EDMA3_RM Error Code

Set/Reset the flag which is being used to do the global registers and PaRAM modification.

Get the flag which is being used to do the global registers and PaRAM modification.

References EDMA3_RM_E_INVALID_PARAM, EDMA3_RM_IOCTL_GET_GBL_REG_MODIFY_OPTION, EDMA3_RM_IOCTL_GET_PARAM_CLEAR_OPTION, EDMA3_RM_IOCTL_SET_GBL_REG_MODIFY_OPTION, EDMA3_RM_IOCTL_SET_PARAM_CLEAR_OPTION, EDMA3_RM_Instance::paramInitRequired, and EDMA3_RM_Instance::regModificationRequired.

EDMA3_RM_Result EDMA3_RM_mapEdmaChannel	(	EDMA3_RM_Handle	hEdmaResMgr,
		unsigned int	channelId,
		unsigned int	paRAMId
	)

Bind the resources DMA Channel and PaRAM Set. Both the DMA channel and the PaRAM set should be previously allocated. If they are not, this API will result in error.

This API sets the DCHMAP register for a specific DMA channel. This register is used to specify the PaRAM Set associated with that particular DMA Channel.

Parameters:

	hEdmaResMgr	[IN] Handle to the previously opened Resource Manager Instance.
	channelId	[IN] Previously allocated DMA Channel on which Transfer will occur.
	paRAMId	[IN] Previously allocated PaRAM Set which needs to be associated with the dma channel.

Returns:

EDMA3_RM_SOK or EDMA_RM Error Code

Note:

This API is useful only for the EDMA3 Controllers which have a register for mapping a DMA Channel to a particular PaRAM Set (DCHMAP register). On platforms where this feature is not supported, this API returns error code: EDMA3_RM_E_FEATURE_UNSUPPORTED. This function is re-entrant for unique channelId. It is non-re-entrant for same channelId values.

Do this for the EDMA3 Controllers which have a register for mapping DMA Channel to a particular PaRAM Set. So check dmaChPaRAMMapExists first.

References EDMA3_RM_Instance::avlblDmaChannels, EDMA3_RM_Instance::avlblPaRAMSets, EDMA3_RM_GblConfigParams::dmaChPaRAMMapExists, EDMA3_RM_E_FEATURE_UNSUPPORTED, EDMA3_RM_E_INVALID_PARAM, EDMA3_RM_E_RES_NOT_ALLOCATED, EDMA3_RM_Obj::gblCfgParams, EDMA3_RM_GblConfigParams::globalRegs, EDMA3_RM_Instance::initParam, EDMA3_RM_GblConfigParams::numDmaChannels, EDMA3_RM_GblConfigParams::numPaRAMSets, EDMA3_RM_InstanceInitConfig::ownDmaChannels, EDMA3_RM_InstanceInitConfig::ownPaRAMSets, EDMA3_RM_Instance::pResMgrObjHandle, and EDMA3_RM_Param::rmInstInitConfig.

EDMA3_RM_Result EDMA3_RM_mapQdmaChannel	(	EDMA3_RM_Handle	hEdmaResMgr,
		unsigned int	channelId,
		unsigned int	paRAMId,
		EDMA3_RM_QdmaTrigWord	trigWord
	)

Bind the resources QDMA Channel and PaRAM Set. Also, Set the trigger word for the QDMA channel. Both the QDMA channel and the PaRAM set should be previously allocated. If they are not, this API will result in error.

This API sets the QCHMAP register for a specific QDMA channel. This register is used to specify the PaRAM Set associated with that particular QDMA Channel along with the trigger word.

Parameters:

	hEdmaResMgr	[IN] Handle to the previously opened Resource Manager Instance.
	channelId	[IN] Previously allocated QDMA Channel on which Transfer will occur.
	paRAMId	[IN] Previously allocated PaRAM Set, which needs to be associated with channelId
	trigWord	[IN] The Trigger Word for the channel. Trigger Word is the word in the PaRAM Register Set which - when written to by CPU -will start the QDMA transfer automatically

Returns:

EDMA3_RM_SOK or EDMA3_RM Error Code

Note:

This function is re-entrant for unique channelId. It is non-re-entrant for same channelId values.

References EDMA3_RM_Instance::avlblPaRAMSets, EDMA3_RM_Instance::avlblQdmaChannels, EDMA3_RM_E_INVALID_PARAM, EDMA3_RM_E_RES_NOT_ALLOCATED, EDMA3_RM_QDMA_TRIG_CCNT, EDMA3_RM_QDMA_TRIG_OPT, EDMA3_RM_Obj::gblCfgParams, EDMA3_RM_GblConfigParams::globalRegs, EDMA3_RM_Instance::initParam, EDMA3_RM_GblConfigParams::numPaRAMSets, EDMA3_RM_GblConfigParams::numQdmaChannels, EDMA3_RM_InstanceInitConfig::ownPaRAMSets, EDMA3_RM_InstanceInitConfig::ownQdmaChannels, EDMA3_RM_Instance::pResMgrObjHandle, and EDMA3_RM_Param::rmInstInitConfig.

EDMA3_RM_Result EDMA3_RM_setCCRegister	(	EDMA3_RM_Handle	hEdmaResMgr,
		unsigned int	regOffset,
		unsigned int	newRegValue
	)

Set the Channel Controller (CC) Register value.

Parameters:

	hEdmaResMgr	[IN] Handle to the previously opened Resource Manager Instance.
	regOffset	[IN] CC Register offset whose value needs to be set. It should be word-aligned.
	newRegValue	[IN] New CC Register Value

Returns:

EDMA3_RM_SOK or EDMA3_RM Error Code

Note:

This function is non re-entrant for users using the same Resource Manager handle. Before modifying a register, it tries to acquire a semaphore (RM instance specific), to protect simultaneous modification of the same register by two different users. After the successful change, it releases the semaphore. For users using different RM handles, this function is re-entrant.

Take the instance specific semaphore, to prevent simultaneous access to the shared resources.

References EDMA3_RM_E_INVALID_PARAM, EDMA3_RM_Obj::gblCfgParams, EDMA3_RM_GblConfigParams::globalRegs, EDMA3_RM_Instance::initParam, EDMA3_RM_Instance::pResMgrObjHandle, and EDMA3_RM_Param::rmSemHandle.

EDMA3_RM_Result EDMA3_RM_setPaRAM	(	EDMA3_RM_Handle	hEdmaResMgr,
		EDMA3_RM_ResDesc *	lChObj,
		const EDMA3_RM_PaRAMRegs *	newPaRAM
	)

Copy the user specified PaRAM Set onto the PaRAM Set associated with the logical channel (DMA/QDMA/Link).

This API takes a PaRAM Set as input and copies it onto the actual PaRAM Set associated with the logical channel. OPT field of the PaRAM Set is written first and the CCNT field is written last.

Caution: It should be used carefully when programming the QDMA channels whose trigger words are not CCNT field.

Parameters:

	hEdmaResMgr	[IN] Handle to the previously opened Resource Manager Instance.
	lChObj	[IN] Logical Channel object for which new PaRAM set is specified. User should pass the resource type and id in this object.
	newPaRAM	[IN] PaRAM set to be copied onto existing one

Returns:

EDMA3_RM_SOK or EDMA3_RM Error Code

Note:

This function is re-entrant for unique lChObj values. It is non- re-entrant for same lChObj value.

User has passed the actual param set value here. Use this value only

References EDMA3_RM_DMA_CH_MAX_VAL, EDMA3_RM_E_INVALID_PARAM, EDMA3_RM_QDMA_CH_MIN_VAL, EDMA3_RM_RES_DMA_CHANNEL, EDMA3_RM_RES_PARAM_SET, EDMA3_RM_RES_QDMA_CHANNEL, EDMA3_RM_Obj::gblCfgParams, EDMA3_RM_GblConfigParams::globalRegs, EDMA3_RM_ChBoundResources::paRAMId, EDMA3_RM_Obj::phyCtrllerInstId, EDMA3_RM_Instance::pResMgrObjHandle, EDMA3_RM_ResDesc::resId, and EDMA3_RM_ResDesc::type.

EDMA3_RM_Result EDMA3_RM_waitAndClearTcc	(	EDMA3_RM_Handle	hEdmaResMgr,
		unsigned int	tccNo
	)

Wait for a transfer completion interrupt to occur and clear it.

This is a blocking function that returns when the IPR/IPRH bit corresponding to the tccNo specified, is SET. It clears the corresponding bit while returning also.

This function waits for the specific bit indefinitely in a tight loop, with out any delay in between. USE IT CAUTIOUSLY.

Parameters:

	hEdmaResMgr	[IN] Handle to the previously opened Resource Manager Instance.
	tccNo	[IN] TCC, specific to which the function waits on a IPR/IPRH bit.

Returns:

EDMA3_RM_SOK or EDMA3_RM Error Code

Note:

This function is re-entrant for different tccNo.

Bit found SET, transfer is completed, clear the pending interrupt and return.

Bit found SET, transfer is completed, clear the pending interrupt and return.

References EDMA3_RM_E_INVALID_PARAM, EDMA3_RM_Obj::gblCfgParams, EDMA3_RM_GblConfigParams::globalRegs, EDMA3_RM_Instance::initParam, EDMA3_RM_GblConfigParams::numTccs, EDMA3_RM_Instance::pResMgrObjHandle, and EDMA3_RM_Param::regionId.