module ti.sysbios.family.arm.ducati.Core |
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Core Identification Module
The Core module is used to define which core within a dual core
"Ducati" subsystem an application is being built for.
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#include <ti/sysbios/family/arm/ducati/Core.h>
Functions |
UInt | |
Functions common to all ICore modules |
UInt | |
macro UInt | |
Void | |
Functions common to all target modules |
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Defines |
#define | |
#define | |
#define | |
Constants |
extern const SizeT | |
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extern const UInt | |
extern const UInt | |
extern const UInt | |
extern const Bool | |
DETAILS
The Core module is used to define which core within a dual core
"Ducati" subsystem an application is being built for.
At runtime, a comparison is made between the configured Core.id
and the value of PID0 (at address 0xe00fffe0). If they do not
agree, an Error is raised.
Use of this module has the side effect of configuring default
interrupt vector table placements for Core 0 and Core 1 if
they haven't already been specified by the
Hwi.vectorTableAddress
config parameter.
Core 0's default vector table placement is at 0x400.
Core 1's default vector table placement is at 0x800.
const Core_HWI_SCHEDULER_LOCK |
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Hwi scheduler lock bits
#define Core_HWI_SCHEDULER_LOCK (UInt)0x0001
const Core_SWI_SCHEDULER_LOCK |
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Swi scheduler lock bits
#define Core_SWI_SCHEDULER_LOCK (UInt)0x0002
const Core_TASK_SCHEDULER_LOCK |
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Task scheduler lock bits
#define Core_TASK_SCHEDULER_LOCK (UInt)0x0004
config Core_E_mismatchedIds // module-wide |
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Error raised if Core.id does not match the contents
of PID0 (at 0xE00FFFE0)
extern const Error_Id Core_E_mismatchedIds;
config Core_core1HwiStackSize // module-wide |
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Core 1's interrupt stack size, default is Program.stack
extern const SizeT Core_core1HwiStackSize;
config Core_id // module-wide |
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Non SMP Ducati Core ID, default is Core 0
extern const UInt Core_id;
DETAILS
Used for making static decisions based on Core ID
config Core_ipuId // module-wide |
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Core's IPU ID, default is IPU 1
extern const UInt Core_ipuId;
DETAILS
Used to identify core belongs to which IPU sub-system.
This field has only 2 possible valid values, 1 or 2.
config Core_numCores // module-wide |
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number of Cores in SMP environment
extern const UInt Core_numCores;
config Core_syncExits // module-wide |
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synchronize exits for all cores
extern const Bool Core_syncExits;
DETAILS
If flag set to true, then the first core that exits
(calls BIOS_exit), interrupts the other core and
waits for it to exit.
Core_getId() // module-wide |
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return the current core id
Core_getIpuId() // module-wide |
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return the current core's IPU id
Core_hwiEnable() // module-wide |
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Locally enable interrupts
macro UInt Core_hwiEnable();
RETURNS
opaque key for use by Hwi_restore() or Core_hwiRestore()
DETAILS
Core_hwiEnable locally enables hardware interrupts on the current Core
and returns an opaque key indicating whether interrupts were enabled or
disabled on entry to Core_hwiEnable().
The actual value of the key is target/device specific and is meant
to be passed to Hwi_restore() or Core_hwiRestore().
Core_interruptCore() // module-wide |
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Cause an interrupt on a particular core
Void Core_interruptCore(UInt coreId);
Module-Wide Built-Ins |
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// Get this module's unique id
Bool Core_Module_startupDone();
// Test if this module has completed startup
// The heap from which this module allocates memory
Bool Core_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Core_Module_getMask();
// Returns the diagnostics mask for this module
Void Core_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
var Core = xdc.useModule('ti.sysbios.family.arm.ducati.Core');
module-wide constants & types
module-wide config parameters
msg: "E_mismatchedIds: Core_Id: %d does not match hardware core Id: %d"
};
generated on Thu, 25 May 2017 22:09:58 GMT