6. Processor Variants Supported by tiarmclang

The tiarmclang compiler toolchain supports development of applications that are to be loaded and run on one of the following Arm Cortex processor variants (applicable -mcpu and floating-point support options are listed for each):

• Cortex-m0

  -mcpu=cortex-m0
  

• Cortex-m0plus

  -mcpu=cortex-m0plus
  

• Cortex-m3

  -mcpu=cortex-m3
  

• Cortex-m4

  With FPv4SPD16 support:

  -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16
  

  Without FPv4SPD16 support:

  -mcpu=cortex-m4 -mfloat-abi=soft
  

• Cortex-m33

  With FPv5SPD16 support:

  -mcpu=cortex-m33 -mfloat-abi=hard -mfpu=fpv5-sp-d16
  

  Without FPv5SPD16 support:

  -mcpu=cortex-m33 -mfloat-abi=soft
  

  Note

  -mcpu=cortex-m33+nodsp - Disabling DSP Instructions on Cortex-M33

  Adding the +nodsp extension to the -mcpu=cortex-m33 option will instruct the compiler to avoid generating DSP instructions when compiling code to be run on a Cortex-M33 device configured to disable the execution of DSP instructions.

  To build a simple application intended to run on a Cortex-M33 device configured to disallow the execution of DSP instructions, specify the -mcpu=cortex-m33+nodsp option on the tiarmclang command-line, like so:

  %> tiarmclang -mcpu=cortex-m33+nodsp -O3 myapp.c -o myapp.out -Wl,mylnk.cmd
  

  If, at link-time, an object file compiled for a Cortex-M33 with DSP instructions disabled is combined with an object file or library compiled for a Cortex-M33 with DSP instructions enabled, the linker will emit an error diagnostic reporting an incompatibility between the input object files.

• Cortex-m55

  With FPARMv8FULLFP16D16 support:

  -mcpu=cortex-m55 -mfloat-abi=hard -mfpu=fp-armv8-fullfp16-d16
  

  Without FPARMv8FULLFP16D16 support:

  -mcpu=cortex-m55 -mfloat-abi=soft
  

• Cortex-m85

  With FPARMv8FULLFP16D16 support:

  -mcpu=cortex-m85 -mfloat-abi=hard -mfpu=fp-armv8-fullfp16-d16
  

  Without FPARMv8FULLFP16D16 support:

  -mcpu=cortex-m85 -mfloat-abi=soft
  

Note

Enabling the Use of Custom Datapath Extension (CDE) Intrinsics

A TI Arm Cortex-M33, M55, or M85 device may be equipped with a coprocessor that is able to execute custom datapath extension (CDE) instructions via intrinsics that are defined in arm_cde.h, which is included in the tiarmclang compiler tools installation.

To enable the use of CDE intrinsics in a C/C++ source file, you must include the arm_cde.h header file in your compilation unit prior to the first reference to a CDE intrinsic.

You must also enable the use of CDE intrinsics via an option on the compiler command-line. The recommended way to do this is to append the +cdecp0 extension to the -mcpu option argument as follows:

-mcpu=cortex-m33+cdecp0

Alternatively, the use of CDE intrinsics can also be enabled by specifying one of the following -march compiler options:

-march=thumbv8m.main+cdecp0
-march=thumbv8-m.main+cdecp0
-march=thumbv8.1m.main+cdecp0
-march=thumbv8.1-m.main+cdecp0

The tiarmclang compiler will allow encoding a CDE instruction to be executed on any coprocessor numbered 0 through 7, but currently, all known TI devices that are equipped with a coprocessor only have one coprocessor, numbered 0. Hence the use of the -cdecp0 extension.

For more information about the CDE intrinsics that are supported, please see Custom Datapath Extension (CDE) Intrinsics.

• Cortex-r4

  Thumb mode with VFPv3D16

  -mcpu=cortex-r4 -mthumb -mfloat-abi=hard -mfpu=vfpv3-d16
  

  Thumb mode without VFPv3D16

  -mcpu=cortex-r4 -mthumb -mfloat-abi=soft
  

  Arm mode with VFPv3D16

  -mcpu=cortex-r4 -marm -mfloat-abi=hard -mfpu=vfpv3-d16
  

  Arm mode without VFPv3D16

  -mcpu=cortex-r4 -marm -mfloat-abi=soft
  

• Cortex-r5

  Thumb mode with VFPv3D16

  -mcpu=cortex-r5 -mthumb -mfloat-abi=hard -mfpu=vfpv3-d16
  

  Thumb mode without VFPv3D16

  -mcpu=cortex-r5 -mthumb -mfloat-abi=soft
  

  Arm mode with VFPv3D16

  -mcpu=cortex-r5 -marm -mfloat-abi=hard -mfpu=vfpv3-d16
  

  Arm mode without VFPv3D16

  -mcpu=cortex-r5 -marm -mfloat-abi=soft
  

The tiarmclang compiler will default to the Cortex-M4 (“-mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16”) processor if you do not explicitly specify an -mcpu or -march option on the compiler command-line.