CLB Module¶

The Configurable Logic Block (CLB) API provides a set of functions to configure the CLB. The CLB is a collection of configurable blocks that can be interconnected using software to implement custom digital logic functions.

The CLB is able to enhance existing peripherals through a set of crossbar interconnections, which provides a high level of connectivity to existing control peripherals such as enhanced pulse width modulators (ePWM), enhanced capture modules (eCAP), and enhanced quadrature encoder pulse modules (eQEP). The crossbars also allow the CLB to be connected to external GPIO pins.

In this way, the CLB can be configured to interact with device peripherals to perform small logical functions such as simple PWM generators, or to implement custom serial data exchange protocols.

group clb_api

Defines

CLB_LOGICCTL 0x0100U¶

CLB_DATAEXCH 0x0200U¶

CLB_ADDR_COUNTER_0_LOAD 0x0U¶

CLB_ADDR_COUNTER_1_LOAD 0x1U¶

CLB_ADDR_COUNTER_2_LOAD 0x2U¶

CLB_ADDR_COUNTER_0_MATCH1 0x4U¶

CLB_ADDR_COUNTER_1_MATCH1 0x5U¶

CLB_ADDR_COUNTER_2_MATCH1 0x6U¶

CLB_ADDR_COUNTER_0_MATCH2 0x8U¶

CLB_ADDR_COUNTER_1_MATCH2 0x9U¶

CLB_ADDR_COUNTER_2_MATCH2 0xAU¶

CLB_ADDR_HLC_R0 0xCU¶

CLB_ADDR_HLC_R1 0xDU¶

CLB_ADDR_HLC_R2 0xEU¶

CLB_ADDR_HLC_R3 0xFU¶

CLB_ADDR_HLC_BASE 0x20U¶

CLB_NUM_HLC_INSTR 31U¶

CLB_FIFO_SIZE 4U¶

CLB_LOCK_KEY 0x5A5AU¶

CLB_LCL_MUX_SEL_MISC_INPUT_SEL_M 0x20U¶

CLB_LCL_MUX_SEL_MISC_INPUT_SEL_S 28U¶

CLB_LCL_MUX_SEL_MISC_INPUT_SEL_BITM (uint32_t)1U¶

CLB_OUTPUT_00 0x00000001U¶

Mask for CLB OUTPUT ENABLE/DISABLE 0.

Values that can be passed to control the CLB output enable signal. It can be passed to CLB_setOutputMask() as the outputMask parameter.

CLB_OUTPUT_01 0x00000002U¶: Mask for CLB OUTPUT ENABLE/DISABLE 1.

CLB_OUTPUT_02 0x00000004U¶: Mask for CLB OUTPUT ENABLE/DISABLE 2.

CLB_OUTPUT_03 0x00000008U¶: Mask for CLB OUTPUT ENABLE/DISABLE 3.

CLB_OUTPUT_04 0x00000010U¶: Mask for CLB OUTPUT ENABLE/DISABLE 4.

CLB_OUTPUT_05 0x00000020U¶: Mask for CLB OUTPUT ENABLE/DISABLE 5.

CLB_OUTPUT_06 0x00000040U¶: Mask for CLB OUTPUT ENABLE/DISABLE 6.

CLB_OUTPUT_07 0x00000080U¶: Mask for CLB OUTPUT ENABLE/DISABLE 7.

CLB_OUTPUT_08 0x00000100U¶: Mask for CLB OUTPUT ENABLE/DISABLE 8.

CLB_OUTPUT_09 0x00000200U¶: Mask for CLB OUTPUT ENABLE/DISABLE 9.

CLB_OUTPUT_10 0x00000400U¶: Mask for CLB OUTPUT ENABLE/DISABLE 10.

CLB_OUTPUT_11 0x00000800U¶: Mask for CLB OUTPUT ENABLE/DISABLE 11.

CLB_OUTPUT_12 0x00001000U¶: Mask for CLB OUTPUT ENABLE/DISABLE 12.

CLB_OUTPUT_13 0x00002000U¶: Mask for CLB OUTPUT ENABLE/DISABLE 13.

CLB_OUTPUT_14 0x00004000U¶: Mask for CLB OUTPUT ENABLE/DISABLE 14.

CLB_OUTPUT_15 0x00008000U¶: Mask for CLB OUTPUT ENABLE/DISABLE 15.

CLB_OUTPUT_16 0x00010000U¶: Mask for CLB OUTPUT ENABLE/DISABLE 16.

CLB_OUTPUT_17 0x00020000U¶: Mask for CLB OUTPUT ENABLE/DISABLE 17.

CLB_OUTPUT_18 0x00040000U¶: Mask for CLB OUTPUT ENABLE/DISABLE 18.

CLB_OUTPUT_19 0x00080000U¶: Mask for CLB OUTPUT ENABLE/DISABLE 19.

CLB_OUTPUT_20 0x00100000U¶: Mask for CLB OUTPUT ENABLE/DISABLE 20.

CLB_OUTPUT_21 0x00200000U¶: Mask for CLB OUTPUT ENABLE/DISABLE 21.

CLB_OUTPUT_22 0x00400000U¶: Mask for CLB OUTPUT ENABLE/DISABLE 22.

CLB_OUTPUT_23 0x00800000U¶: Mask for CLB OUTPUT ENABLE/DISABLE 23.

CLB_OUTPUT_24 0x01000000U¶: Mask for CLB OUTPUT ENABLE/DISABLE 24.

CLB_OUTPUT_25 0x02000000U¶: Mask for CLB OUTPUT ENABLE/DISABLE 25.

CLB_OUTPUT_26 0x04000000U¶: Mask for CLB OUTPUT ENABLE/DISABLE 26.

CLB_OUTPUT_27 0x08000000U¶: Mask for CLB OUTPUT ENABLE/DISABLE 27.

CLB_OUTPUT_28 0x10000000U¶: Mask for CLB OUTPUT ENABLE/DISABLE 28.

CLB_OUTPUT_29 0x20000000U¶: Mask for CLB OUTPUT ENABLE/DISABLE 29.

CLB_OUTPUT_30 0x40000000U¶: Mask for CLB OUTPUT ENABLE/DISABLE 30.

CLB_OUTPUT_31 0x80000000U¶: Mask for CLB OUTPUT ENABLE/DISABLE 31.

Enums

enum CLB_Inputs¶

Values that can be passed to select CLB input signal.

Values:

enumerator CLB_IN0 = 0¶: Input 0.

enumerator CLB_IN1 = 1¶: Input 1.

enumerator CLB_IN2 = 2¶: Input 2.

enumerator CLB_IN3 = 3¶: Input 3.

enumerator CLB_IN4 = 4¶: Input 4.

enumerator CLB_IN5 = 5¶: Input 5.

enumerator CLB_IN6 = 6¶: Input 6.

enumerator CLB_IN7 = 7¶: Input 7.

enum CLB_Outputs¶

Values that can be passed to select CLB output signal. It can be passed to CLB_configOutputLUT() as the outID parameter.

Values:

enumerator CLB_OUT0 = 0¶: Output 0.

enumerator CLB_OUT1 = 1¶: Output 1.

enumerator CLB_OUT2 = 2¶: Output 2.

enumerator CLB_OUT3 = 3¶: Output 3.

enumerator CLB_OUT4 = 4¶: Output 4.

enumerator CLB_OUT5 = 5¶: Output 5.

enumerator CLB_OUT6 = 6¶: Output 6.

enumerator CLB_OUT7 = 7¶: Output 7.

enum CLB_Counters¶

Values that can be passed to select CLB counter. It can be passed to CLB_configCounterLoadMatch() as the counterID parameter.

Values:

enumerator CLB_CTR0 = 0¶: Counter 0.

enumerator CLB_CTR1 = 1¶: Counter 1.

enumerator CLB_CTR2 = 2¶: Counter 2.

enum CLB_Register¶

Values that can be passed to CLB_getRegister() as the registerID parameter.

Values:

enumerator CLB_REG_HLC_R0 = 0x30U¶: HLC R0 register.

enumerator CLB_REG_HLC_R1 = 0x32U¶: HLC R1 register.

enumerator CLB_REG_HLC_R2 = 0x34U¶: HLC R2 register.

enumerator CLB_REG_HLC_R3 = 0x36U¶: HLC R3 register.

enumerator CLB_REG_CTR_C0 = 0x38U¶: Counter 0 register.

enumerator CLB_REG_CTR_C1 = 0x3AU¶: Counter 1 register.

enumerator CLB_REG_CTR_C2 = 0x3CU¶: Counter 2 register.

enum CLB_FilterType¶

Values that can be passed to CLB_selectInputFilter() as the filterType parameter.

Values:

enumerator CLB_FILTER_NONE = 0¶: No filtering.

enumerator CLB_FILTER_RISING_EDGE = 1¶: Rising edge detect.

enumerator CLB_FILTER_FALLING_EDGE = 2¶: Falling edge detect.

enumerator CLB_FILTER_ANY_EDGE = 3¶: Any edge detect.

enum CLB_GPInputMux¶

Values that can be passed to CLB_configGPInputMux() as the gpMuxCfg parameter.

Values:

enumerator CLB_GP_IN_MUX_EXTERNAL = 0¶: Use external input path.

enumerator CLB_GP_IN_MUX_GP_REG = 1¶: Use CLB_GP_REG bit value as input.

enum CLB_LocalInputMux¶

Values that can be passed to CLB_configLocalInputMux() as the localMuxCfg parameter.

Values:

enumerator CLB_LOCAL_IN_MUX_GLOBAL_IN = 0¶: Global input mux selection.

enumerator CLB_LOCAL_IN_MUX_EPWM_DCAEVT1 = 1¶: EPWMx DCAEVT1.

enumerator CLB_LOCAL_IN_MUX_EPWM_DCAEVT2 = 2¶: EPWMx DCAEVT2.

enumerator CLB_LOCAL_IN_MUX_EPWM_DCBEVT1 = 3¶: EPWMx DCBEVT1.

enumerator CLB_LOCAL_IN_MUX_EPWM_DCBEVT2 = 4¶: EPWMx DCBEVT2.

enumerator CLB_LOCAL_IN_MUX_EPWM_DCAH = 5¶: EPWMx DCAH.

enumerator CLB_LOCAL_IN_MUX_EPWM_DCAL = 6¶: EPWMx DCAL.

enumerator CLB_LOCAL_IN_MUX_EPWM_DCBH = 7¶: EPWMx DCBH.

enumerator CLB_LOCAL_IN_MUX_EPWM_DCBL = 8¶: EPWMx DCBL.

enumerator CLB_LOCAL_IN_MUX_EPWM_OST = 9¶: EPWMx OST.

enumerator CLB_LOCAL_IN_MUX_EPWM_CBC = 10¶: EPWMx CBC.

enumerator CLB_LOCAL_IN_MUX_ECAP_ECAPIN = 11¶: ECAPx ECAPIN.

enumerator CLB_LOCAL_IN_MUX_ECAP_ECAP_OUT = 12¶: ECAPx ECAP_OUT.

enumerator CLB_LOCAL_IN_MUX_ECAP_ECAP_OUT_EN = 13¶: ECAPx ECAP_OUT_EN.

enumerator CLB_LOCAL_IN_MUX_ECAP_CEVT1 = 14¶: ECAPx CEVT1.

enumerator CLB_LOCAL_IN_MUX_ECAP_CEVT2 = 15¶: ECAPx CEVT2.

enumerator CLB_LOCAL_IN_MUX_ECAP_CEVT3 = 16¶: ECAPx CEVT3.

enumerator CLB_LOCAL_IN_MUX_ECAP_CEVT4 = 17¶: ECAPx CEVT4.

enumerator CLB_LOCAL_IN_MUX_EQEP_EQEPA = 18¶: EQEPx EQEPA.

enumerator CLB_LOCAL_IN_MUX_EQEP_EQEPB = 19¶: EQEPx EQEPB.

enumerator CLB_LOCAL_IN_MUX_EQEP_EQEPI = 20¶: EQEPx EQEPI.

enumerator CLB_LOCAL_IN_MUX_EQEP_EQEPS = 21¶: EQEPx EQEPS.

enumerator CLB_LOCAL_IN_MUX_CPU1_TBCLKSYNC = 22¶: CPU1.TBCLKSYNC.

enumerator CLB_LOCAL_IN_MUX_CPU1_HALT = 24¶: CPU1.HALT.

enum CLB_GlobalInputMux¶

Values that can be passed to CLB_configGlobalInputMux() as the globalMuxCfg parameter.

Values:

enumerator CLB_GLOBAL_IN_MUX_EPWM1A = 0¶: EPWM1A.

enumerator CLB_GLOBAL_IN_MUX_EPWM1A_OE = 1¶: EPWM1A trip output.

enumerator CLB_GLOBAL_IN_MUX_EPWM1B = 2¶: EPWM1B.

enumerator CLB_GLOBAL_IN_MUX_EPWM1B_OE = 3¶: EPWM1B trip output.

enumerator CLB_GLOBAL_IN_MUX_EPWM1_CTR_ZERO = 4¶: EPWM1 TBCTR = Zero.

enumerator CLB_GLOBAL_IN_MUX_EPWM1_CTR_PRD = 5¶: EPWM1 TBCTR = TBPRD.

enumerator CLB_GLOBAL_IN_MUX_EPWM1_CTRDIR = 6¶: EPWM1 CTRDIR.

enumerator CLB_GLOBAL_IN_MUX_EPWM1_TBCLK = 7¶: EPWM1 TBCLK.

enumerator CLB_GLOBAL_IN_MUX_EPWM1_CTR_CMPA = 8¶: EPWM1 TBCTR = CMPA.

enumerator CLB_GLOBAL_IN_MUX_EPWM1_CTR_CMPB = 9¶: EPWM1 TBCTR = CMPB.

enumerator CLB_GLOBAL_IN_MUX_EPWM1_CTR_CMPC = 10¶: EPWM1 TBCTR = CMPC.

enumerator CLB_GLOBAL_IN_MUX_EPWM1_CTR_CMPD = 11¶: EPWM1 TBCTR = CMPD.

enumerator CLB_GLOBAL_IN_MUX_EPWM1A_AQ = 12¶: EPWM1A AQ submodule output.

enumerator CLB_GLOBAL_IN_MUX_EPWM1B_AQ = 13¶: EPWM1B AQ submodule output.

enumerator CLB_GLOBAL_IN_MUX_EPWM1A_DB = 14¶: EPWM1A DB submodule output.

enumerator CLB_GLOBAL_IN_MUX_EPWM1B_DB = 15¶: EPWM1B DB submodule output.

enumerator CLB_GLOBAL_IN_MUX_EPWM2A = 16¶: EPWM2A.

enumerator CLB_GLOBAL_IN_MUX_EPWM2A_OE = 17¶: EPWM2A trip output.

enumerator CLB_GLOBAL_IN_MUX_EPWM2B = 18¶: EPWM2B.

enumerator CLB_GLOBAL_IN_MUX_EPWM2B_OE = 19¶: EPWM2B trip output.

enumerator CLB_GLOBAL_IN_MUX_EPWM2_CTR_ZERO = 20¶: EPWM2 TBCTR = Zero.

enumerator CLB_GLOBAL_IN_MUX_EPWM2_CTR_PRD = 21¶: EPWM2 TBCTR = TBPRD.

enumerator CLB_GLOBAL_IN_MUX_EPWM2_CTRDIR = 22¶: EPWM2 CTRDIR.

enumerator CLB_GLOBAL_IN_MUX_EPWM2_TBCLK = 23¶: EPWM2 TBCLK.

enumerator CLB_GLOBAL_IN_MUX_EPWM2_CTR_CMPA = 24¶: EPWM2 TBCTR = CMPA.

enumerator CLB_GLOBAL_IN_MUX_EPWM2_CTR_CMPB = 25¶: EPWM2 TBCTR = CMPB.

enumerator CLB_GLOBAL_IN_MUX_EPWM2_CTR_CMPC = 26¶: EPWM2 TBCTR = CMPC.

enumerator CLB_GLOBAL_IN_MUX_EPWM2_CTR_CMPD = 27¶: EPWM2 TBCTR = CMPD.

enumerator CLB_GLOBAL_IN_MUX_EPWM2A_AQ = 28¶: EPWM2A AQ submodule output.

enumerator CLB_GLOBAL_IN_MUX_EPWM2B_AQ = 29¶: EPWM2B AQ submodule output.

enumerator CLB_GLOBAL_IN_MUX_EPWM2A_DB = 30¶: EPWM2A DB submodule output.

enumerator CLB_GLOBAL_IN_MUX_EPWM2B_DB = 31¶: EPWM2B DB submodule output.

enumerator CLB_GLOBAL_IN_MUX_EPWM3A = 32¶: EPWM3A.

enumerator CLB_GLOBAL_IN_MUX_EPWM3A_OE = 33¶: EPWM3A trip output.

enumerator CLB_GLOBAL_IN_MUX_EPWM3B = 34¶: EPWM3B.

enumerator CLB_GLOBAL_IN_MUX_EPWM3B_OE = 35¶: EPWM3B trip output.

enumerator CLB_GLOBAL_IN_MUX_EPWM3_CTR_ZERO = 36¶: EPWM3 TBCTR = Zero.

enumerator CLB_GLOBAL_IN_MUX_EPWM3_CTR_PRD = 37¶: EPWM3 TBCTR = TBPRD.

enumerator CLB_GLOBAL_IN_MUX_EPWM3_CTRDIR = 38¶: EPWM3 CTRDIR.

enumerator CLB_GLOBAL_IN_MUX_EPWM3_TBCLK = 39¶: EPWM3 TBCLK.

enumerator CLB_GLOBAL_IN_MUX_EPWM3_CTR_CMPA = 40¶: EPWM3 TBCTR = CMPA.

enumerator CLB_GLOBAL_IN_MUX_EPWM3_CTR_CMPB = 41¶: EPWM3 TBCTR = CMPB.

enumerator CLB_GLOBAL_IN_MUX_EPWM3_CTR_CMPC = 42¶: EPWM3 TBCTR = CMPC.

enumerator CLB_GLOBAL_IN_MUX_EPWM3_CTR_CMPD = 43¶: EPWM3 TBCTR = CMPD.

enumerator CLB_GLOBAL_IN_MUX_EPWM3A_AQ = 44¶: EPWM3A AQ submodule output.

enumerator CLB_GLOBAL_IN_MUX_EPWM3B_AQ = 45¶: EPWM3B AQ submodule output.

enumerator CLB_GLOBAL_IN_MUX_EPWM3A_DB = 46¶: EPWM3A DB submodule output.

enumerator CLB_GLOBAL_IN_MUX_EPWM3B_DB = 47¶: EPWM3B DB submodule output.

enumerator CLB_GLOBAL_IN_MUX_EPWM4A = 48¶: EPWM4A.

enumerator CLB_GLOBAL_IN_MUX_EPWM4A_OE = 49¶: EPWM4A trip output.

enumerator CLB_GLOBAL_IN_MUX_EPWM4B = 50¶: EPWM4B.

enumerator CLB_GLOBAL_IN_MUX_EPWM4B_OE = 51¶: EPWM4B trip output.

enumerator CLB_GLOBAL_IN_MUX_EPWM4_CTR_ZERO = 52¶: EPWM4 TBCTR = Zero.

enumerator CLB_GLOBAL_IN_MUX_EPWM4_CTR_PRD = 53¶: EPWM4 TBCTR = TBPRD.

enumerator CLB_GLOBAL_IN_MUX_EPWM4_CTRDIR = 54¶: EPWM4 CTRDIR.

enumerator CLB_GLOBAL_IN_MUX_EPWM4_TBCLK = 55¶: EPWM4 TBCLK.

enumerator CLB_GLOBAL_IN_MUX_EPWM4_CTR_CMPA = 56¶: EPWM4 TBCTR = CMPA.

enumerator CLB_GLOBAL_IN_MUX_EPWM4_CTR_CMPB = 57¶: EPWM4 TBCTR = CMPB.

enumerator CLB_GLOBAL_IN_MUX_EPWM4_CTR_CMPC = 58¶: EPWM4 TBCTR = CMPC.

enumerator CLB_GLOBAL_IN_MUX_EPWM4_CTR_CMPD = 59¶: EPWM4 TBCTR = CMPD.

enumerator CLB_GLOBAL_IN_MUX_EPWM4A_AQ = 60¶: EPWM4A AQ submodule output.

enumerator CLB_GLOBAL_IN_MUX_EPWM4B_AQ = 61¶: EPWM4B AQ submodule output.

enumerator CLB_GLOBAL_IN_MUX_EPWM4A_DB = 62¶: EPWM4A DB submodule output.

enumerator CLB_GLOBAL_IN_MUX_EPWM4B_DB = 63¶: EPWM4B DB submodule output.

enumerator CLB_GLOBAL_IN_MUX_CLB_AUXSIG0 = 64¶: CLB X-BAR AUXSIG0.

enumerator CLB_GLOBAL_IN_MUX_CLB_AUXSIG1 = 65¶: CLB X-BAR AUXSIG1.

enumerator CLB_GLOBAL_IN_MUX_CLB_AUXSIG2 = 66¶: CLB X-BAR AUXSIG2.

enumerator CLB_GLOBAL_IN_MUX_CLB_AUXSIG3 = 67¶: CLB X-BAR AUXSIG3.

enumerator CLB_GLOBAL_IN_MUX_CLB_AUXSIG4 = 68¶: CLB X-BAR AUXSIG4.

enumerator CLB_GLOBAL_IN_MUX_CLB_AUXSIG5 = 69¶: CLB X-BAR AUXSIG5.

enumerator CLB_GLOBAL_IN_MUX_CLB_AUXSIG6 = 70¶: CLB X-BAR AUXSIG6.

enumerator CLB_GLOBAL_IN_MUX_CLB_AUXSIG7 = 71¶: CLB X-BAR AUXSIG7.

Functions

void CLB_enableCLB(uint32_t base)¶

Checks the CLB base address.

This function determines if a CLB base address is valid.

Parameters

base: is the base address of a CLB tile’s logic config register.

This function enables the CLB via global enable register.

Return

Returns true if the base address is valid and false otherwise. Set global enable.

Parameters

base: is the base address of a CLB tile’s logic config register.

Return: None.

void CLB_disableCLB(uint32_t base)¶

Clear global enable.

This function disables the CLB via global enable register.

Parameters

base: is the base address of a CLB tile’s logic config register.

Return: None.

void CLB_enableLock(uint32_t base)¶

Enable CLB lock.

This function enables the lock bit of the lock register. The lock can only be set once and can only be cleared by a device reset.

Parameters

base: is the base address of a CLB tile’s logic config register.

Return: None.

void CLB_writeInterface(uint32_t base, uint32_t address, uint32_t value)¶

Write value to address.

This function writes the specified value to CLB internal memory.

Parameters

base: is the base address of a CLB tile’s logic config register.
address: is the address of CLB internal memory.
value: is the value to write to specified address.

Return: None.

void CLB_selectInputFilter(uint32_t base, CLB_Inputs inID, CLB_FilterType filterType)¶

Select input filter type.

This function configures the filter selection for the specified input. The

inID parameter can have one enumeration value from CLB_Inputs. The filterType parameter can have one enumeration value from CLB_FilterType.

Parameters

base: is the base address of a CLB tile’s logic config register.
inID: is the specified CLB tile input signal.
filterType: is the selected type of filter applied to the input.

Return: None.

void CLB_enableSynchronization(uint32_t base, CLB_Inputs inID)¶

Enables synchronization of an input signal.

This function enables synchronization on the specified input signal. The

inID parameter can have one enumeration value from CLB_Inputs.

Parameters

base: is the base address of a CLB tile’s logic config register.
inID: is the specified CLB tile input signal.

Return: None.

void CLB_disableSynchronization(uint32_t base, CLB_Inputs inID)¶

Disables synchronization of an input signal.

This function disables synchronization on the specified input signal. The

inID parameter can have one enumeration value from CLB_Inputs.

Parameters

base: is the base address of a CLB tile’s logic config register.
inID: is the specified CLB tile input signal.

Return: None.

void CLB_configGPInputMux(uint32_t base, CLB_Inputs inID, CLB_GPInputMux gpMuxCfg)¶

Configures the general purpose input mux.

This function configures the general purpose input mux. The

gpMuxCfg parameter can select either the use of an external input signal (CLB_GP_IN_MUX_EXTERNAL) or the use of the corresponding CLB_GP_REG bit as an input (CLB_GP_IN_MUX_GP_REG). The inID parameter can have one enumeration value from CLB_Inputs.

Parameters

base: is the base address of a CLB tile’s logic config register.
inID: is the specified CLB tile input signal.
gpMuxCfg: is the mux selection for the general purpose input mux.

See: CLB_setGPREG() to write to the CLB_GP_REG.
Return: None.

void CLB_setGPREG(uint32_t base, uint32_t gpRegVal)¶

Sets the CLB_GP_REG register value.

This function writes to the CLB_GP_REG register. When the general purpose input mux is configured to use CLB_GP_REG, each bit in

gpRegVal corresponds to an input signal (bit 0 to Input 0, bit 1 to Input 1, and so on).

Parameters

base: is the base address of a CLB tile’s logic config register.
gpRegVal: is the value to be written to CLB_GP_REG.

See: CLB_configGPInputMux() to select the CLB_GP_REG as the source for an input signal.
Return: None.

uint32_t CLB_getGPREG(uint32_t base)¶

Gets the CLB_GP_REG register value.

This function writes to the CLB_GP_REG register. When the general purpose input mux is configured to use CLB_GP_REG, each bit in

gpRegVal corresponds to an input signal (bit 0 to Input 0, bit 1 to Input 1, and so on).

Parameters

base: is the base address of a CLB tile’s logic config register.

See: CLB_configGPInputMux() to select the CLB_GP_REG as the source for an input signal.
Return: CLB_GP_REG value.

void CLB_configLocalInputMux(uint32_t base, CLB_Inputs inID, CLB_LocalInputMux localMuxCfg)¶

Configures the local input mux.

This function configures the local input mux for the specified input signal.

Parameters

base: is the base address of a CLB tile’s logic config register.
inID: is the specified CLB tile input signal.
localMuxCfg: is the mux selection for the local input mux.

The inID parameter can have one enumeration value from CLB_Inputs. The localMuxCfg parameter can have one enumeration value from CLB_LocalInputMux.

Note: The local input mux options’ peripheral sources depend on which instance of the CLB (base) you are using. For example, for CLB1 the EPWM signal selections come from EPWM1 but for CLB2 they come from EPWM2. See your technical reference manual for details.
Return: None.

void CLB_configGlobalInputMux(uint32_t base, CLB_Inputs inID, CLB_GlobalInputMux globalMuxCfg)¶

Configures the global input mux.

This function configures the global input mux for the specified input signal. The

inID parameter can have one enumeration value from CLB_Inputs. The globalMuxCfg parameter can have one enumeration value from CLB_GlobalInputMux.

Parameters

base: is the base address of a CLB tile’s logic config register.
inID: is the specified CLB tile input signal.
globalMuxCfg: is the mux selection for the global input mux.

Note: The global input mux options’ peripheral sources depend on which instance of the CLB (base) you are using. For example, for CLB1 the EPWM signal selections come from EPWM1 but for CLB2 they come from EPWM2. See your technical reference manual for details.
Return: None.

void CLB_setOutputMask(uint32_t base, uint32_t outputMask, bool enable)¶

Controls the output enable.

This function is used to enable and disable CLB outputs by writing a mask to CLB_OUT_EN. Each bit corresponds to a CLB output. When a bit is 1, the corresponding output is enabled; when a bit is 0, the output is disabled.

Parameters

base: is the base address of a CLB tile’s logic config register.
outputMask: is a mask of the outputs to be enabled.
enable: is a switch to decide if the CLB outputs need to be enabled or not.

The outputMask parameter takes a logical OR of any of the CLB_OUTPUT_0x values that correspond to the CLB OUTPUT ENABLE for the respective outputs. The enable parameter can have one of the values from: false: Disable the respective CLB outputs true: Enable the respective CLB outputs

Note: Note that the 8 CLB outputs are replicated to create more output paths. See your technical reference manual for more details. If no further modifications are expected, then it is advised to set the block writes bit of the MISC_ACCESS_CTRL Register. This will prevent accidental writes.
Return: None.

uint16_t CLB_getInterruptTag(uint32_t base)¶

Reads the interrupt tag register.

Return

Returns the value in the interrupt tag register which is a 6-bit constant set by the HLC.

Parameters

base: is the base address of a CLB tile’s logic config register.

void CLB_clearInterruptTag(uint32_t base)¶

Clears the interrupt tag register.

This function clears the interrupt tag register, setting it to 0.

Parameters

base: is the base address of a CLB tile’s logic config register.

Return: None.

void CLB_selectLUT4Inputs(uint32_t base, uint32_t lut4In0, uint32_t lut4In1, uint32_t lut4In2, uint32_t lut4In3)¶

Selects LUT4 inputs.

This function configures the LUT4 block’s input signals.

Parameters

base: is the base address of a CLB tile’s logic config register.
lut4In0: is the value for LUT4 input signal 0. Generated by tool as TILEx_CFG_LUT4_IN0.
lut4In1: is the value for LUT4 input signal 1. Generated by tool as TILEx_CFG_LUT4_IN1.
lut4In2: is the value for LUT4 input signal 2. Generated by tool as TILEx_CFG_LUT4_IN2.
lut4In3: is the value for LUT4 input signal 3. Generated by tool as TILEx_CFG_LUT4_IN3.

Return: None.

void CLB_configLUT4Function(uint32_t base, uint32_t lut4Fn10, uint32_t lut4Fn2)¶

Configures LUT4 functions.

This function configures the LUT4 block’s equations.

Parameters

base: is the base address of a CLB tile’s logic config register.
lut4Fn10: is the equation value for LUT4 blocks 0 and 1. Generated by tool as TILEx_CFG_LUT4_FN10.
lut4Fn2: is the equation value for LUT4 block2. Generated by tool as TILEx_CFG_LUT4_FN2.

Return: None.

void CLB_selectFSMInputs(uint32_t base, uint32_t external0, uint32_t external1, uint32_t extra0, uint32_t extra1)¶

Selects FSM inputs.

This function configures the FSM block’s external inputs and extra external inputs.

Parameters

base: is the base address of a CLB tile’s logic config register.
external0: is the value for FSM external 0 input. Generated by tool as TILEx_CFG_FSM_EXT_IN0.
external1: is the value for FSM external 1 input. Generated by tool as TILEx_CFG_FSM_EXT_IN1.
extra0: is the value for FSM extra 0 input. Generated by tool as TILEx_CFG_FSM_EXTRA_IN0.
extra1: is the value for FSM extra 1 input. Generated by tool as TILEx_CFG_FSM_EXTRA_IN1.

Return: None.

void CLB_configFSMLUTFunction(uint32_t base, uint32_t fsmLutFn10, uint32_t fsmLutFn2)¶

Configures FSM LUT function.

This function configures the FSM block’s LUT equations.

Parameters

base: is the base address of a CLB tile’s logic config register.
fsmLutFn10: is the value for FSM 0 & FSM 1 LUT function. Generated by tool as TILEx_CFG_FSM_LUT_FN10.
fsmLutFn2: is the value for FSM 2 LUT function. Generated by tool as TILEx_CFG_FSM_LUT_FN2.

Return: None.

void CLB_configFSMNextState(uint32_t base, uint32_t nextState0, uint32_t nextState1, uint32_t nextState2)¶

Configures FSM next state.

This function configures the FSM’s next state equation.

Parameters

base: is the base address of a CLB tile’s logic config register.
nextState0: is the value for FSM 0’s next state. Generated by tool as TILEx_CFG_FSM_NEXT_STATE_0.
nextState1: is the value for FSM 1’s next state. Generated by tool as TILEx_CFG_FSM_NEXT_STATE_1.
nextState2: is the value for FSM 2’s next state. Generated by tool as TILEx_CFG_FSM_NEXT_STATE_2.

Return: None.

void CLB_selectCounterInputs(uint32_t base, uint32_t reset, uint32_t event, uint32_t mode0, uint32_t mode1)¶

Selects Counter inputs.

This function selects the input signals to the counter block.

Parameters

base: is the base address of a CLB tile’s logic config register.
reset: is the value for counter’s reset inputs. Generated by tool as TILEx_CFG_COUNTER_RESET.
event: is the value for counter’s event inputs. Generated by tool as TILEx_CFG_COUNTER_EVENT.
mode0: is the value for counter’s mode 0 inputs. Generated by tool as TILEx_CFG_COUNTER_MODE_0.
mode1: is the value for counter’s mode 1 inputs. Generated by tool as TILEx_CFG_COUNTER_MODE_1.

Return: None.

void CLB_configMiscCtrlModes(uint32_t base, uint32_t miscCtrl)¶

Configures Counter and FSM modes.

This function configures the counter mode, particularly add/shift, load modes. The function also configures whether the FSM should use state inputs or an extra external input.

Parameters

base: is the base address of a CLB tile’s logic config register.
miscCtrl: is the value to represent counter and FSM modes. Generated by tool as TILEx_CFG_MISC_CONTROL.

Return: None.

void CLB_configOutputLUT(uint32_t base, CLB_Outputs outID, uint32_t outputCfg)¶

Configures Output LUT functions.

This function configures the input signals and equations of the output LUT corresponding to the /e outID parameter.

Parameters

base: is the base address of a CLB tile’s logic config register.
outID: is the specified CLB tile output signal.
outputCfg: is the value for the output LUT signal function and input signal selections. Generated by tool as TILEx_CFG_OUTLUT_n where n is the output number.

Return: None.

void CLB_configHLCEventSelect(uint32_t base, uint32_t eventSel)¶

Configures HLC event selection.

This function configures the event selection for the High Level Controller.

Parameters

base: is the base address of a CLB tile’s logic config register.
eventSel: is the value for HLC event selection. Generated by tool as TILEx_HLC_EVENT_SEL.

Return: None.

void CLB_programHLCInstruction(uint32_t base, uint32_t instructionNum, uint32_t instruction)¶

Program HLC instruction.

This function configures the CLB internal memory corresponding to the specified HLC instruction number with the given instruction.

Parameters

base: is the base address of a CLB tile’s logic config register.
instructionNum: is the index into the HLC instruction memory. For example, a value of 0 corresponds to instruction 0 of event 0, a value of 1 corresponds to instruction 1 of event 0, and so on up to a value of 31 which corresponds to instruction 7 of event 3.
instruction: is the instruction to be programmed. Generated by tool as TILEx_HLCINSTR_n where n is the instruction number.

Return: None.

void CLB_setHLCRegisters(uint32_t base, uint32_t r0Init, uint32_t r1Init, uint32_t r2Init, uint32_t r3Init)¶

Set HLC registers.

This function configures the CLB internal memory corresponding to the HLC registers R0-R3 with the specified values.

Parameters

base: is the base address of a CLB tile’s logic config register.
r0Init: is the value to write to HLC register R0. Generated by tool as TILEx_HLC_R0_INIT.
r1Init: is the value to write to HLC register R1. Generated by tool as TILEx_HLC_R1_INIT.
r2Init: is the value to write to HLC register R2. Generated by tool as TILEx_HLC_R2_INIT.
r3Init: is the value to write to HLC register R3. Generated by tool as TILEx_HLC_R3_INIT.

Return: None.

uint32_t CLB_getRegister(uint32_t base, CLB_Register registerID)¶

Get HLC or counter register values.

Return

Returns the value in the specified HLC register or counter.

Parameters

base: is the base address of a CLB tile’s logic config register.
registerID: is the internal register from which to read. Can be either an HLC register (CLB_REG_HLC_Rn) or a counter value (CLB_REG_CTR_Cn).

uint32_t CLB_getOutputStatus(uint32_t base)¶

Get output status.

Return

Returns the output status of various components within the CLB tile such as a counter match or LUT output. Use the CLB_DBG_OUT_* masks from hw_clb.h to decode the bits.

Parameters

base: is the base address of a CLB tile’s logic config register.

void CLB_configCounterLoadMatch(uint32_t base, CLB_Counters counterID, uint32_t load, uint32_t match1, uint32_t match2)¶

Configures Counter load and match.

This function configures the CLB internal memory corresponding to the counter block’s load and match values.

Parameters

base: is the base address of a CLB tile’s logic config register.
counterID: is the specified counter unit.
load: is the value for counter’s load mode. Generated by tool as TILEx_COUNTER_n_LOAD_VAL where n is the counter number.
match1: is the value for counter’s match 1. Generated by tool as TILEx_COUNTER_n_MATCH1_VAL where n is the counter number.
match2: is the value for counter’s match 2. Generated by tool as TILEx_COUNTER_n_MATCH2_VAL where n is the counter number.

Return: None.

void CLB_clearFIFOs(uint32_t base)¶

Clear FIFO registers.

This function clears the PUSH/PULL FIFOs as well as its pointers.

Parameters

base: is the base address of a CLB tile’s logic config register.

Return: None.

void CLB_writeFIFOs(uint32_t base, const uint32_t pullData[])¶

Configure the FIFO registers.

This function writes to the PULL FIFO. This also clears the FIFOs and its pointer using the

CLB_clearFIFOs() API prior to writing to the FIFO.

Parameters

base: is the base address of a CLB tile’s logic config register.
pullData[]: is a pointer to an array of bytes which needs to be written into the FIFO. The 0th FIFO data is in the 0th index.

Return: None.

void CLB_readFIFOs(uint32_t base, uint32_t pushData[])¶

Read FIFO registers.

This function reads from the PUSH FIFO. The 0th FIFO data would be in the 0th index.

Parameters

base: is the base address of a CLB tile’s logic config register.
pushData[]: is a pointer to an array of bytes which needs to be read from the FIFO.

Return: None.

The code for this module is contained in driverlib/clb.c, with driverlib/clb.h containing the API declarations for use by applications.