C2000Ware Digital Power SDK  5.03.00.00
SPLL_3PH_SRF

Introduction

Data Structures

struct  SPLL_3PH_SRF_LPF_COEFF
 Defines the coefficients for a loop filter. More...
 
struct  SPLL_3PH_SRF
 Defines the SPLL_3PH_SRF structure. More...
 

Functions

static void SPLL_3PH_SRF_init (float32_t grid_freq, float32_t delta_t, SPLL_3PH_SRF *spll_obj)
 Initialize SPLL_3PH_SRF module. More...
 
static void SPLL_3PH_SRF_reset (SPLL_3PH_SRF *spll_obj)
 Reset SPLL_3PH_SRF module. More...
 
static void SPLL_3PH_SRF_run (float32_t v_q, SPLL_3PH_SRF *spll_obj)
 Run SPLL_3PH_SRF module. More...
 

Typedefs

typedef float float32_t
 
typedef long double float64_t
 

Macros

#define C2000_IEEE754_TYPES
 

Software Phase Lock Loop based on synchronous reference frame for Three Phase Grid (SPLL_3PH_SRF) Module

Introduction

The Software Phase Lock Loop based on synchronous reference frame (SPLL_3PH_SRF) API provides a set of functions that implements a software phase lock loop based on based on synchronous reference frame for grid connection to three phase grid.

Software Phase Lock Loop on SRF for Model


It is common to transform three phase time varying system to a dc system, in a rotating reference frame with the help of transforms. Assuming the below equation for the three phase quantities the sequence of the voltages is

\[ V_{a}->V_{b}->V_{c} \]

, and the frequency is ω.



The three phase quantities are first reduced to an orthogonal component system ( alpha, beta also called stationary reference frame), by taking the projections of the three phase quantities on the orthogonal axis. This is called the clark transform:

\[ V_{\alpha\beta 0} = T_{abc->\alpha\beta 0} V_{abc} \]



Now the net voltage vector can be assumed to be making an angle θ with the orthogonal reference frame and rotating at a frequency of ω. Thus the system can be reduced to DC by taking projection of the orthogonal components on the rotating reference frame:

\[ V_{dq0} = T_{\alpha\beta 0->dq0} V_{\alpha\beta 0} \]



Using trigonometric identities:

For the PLL to be almost locked, i.e.

\[\theta \]

is equal to

\[\omega t \]

the quadrature component can be linearized as follows:

\[ v_{q} \approx (\omega t - \theta)\]

As seen in the above analysis the q component is zero for a balanced three phase system. This property is exploited in the phase locked loop for three phase grid connected application. The q component is used as the error signal for the PLL to track to the appropriate phase. First the three phase quantities are transformed into the rotating reference frame and the q component is used as the phase detect. A low pass filter/PI is then used to eliminate steady state error and the output fed to a VCO which generated the angle and sine values.

A functional diagram of a PLL is shown in the figure below, which consists of a phase detect (PD) consisting of park transform, a loop filter(LPF) and a voltage controlled oscillator(VCO):

Phase Lock Loop Basic Structure


The ABC-> DQ0 transform is kept separate from the PLL structure.

Using equations from the SPLL_1ph description above using settling time to be 30ms and the error band to be 5% and damping ratio to be 0.7 we can obtain the natural frequency to be 119.014 and then back substituting we get

\[ K_{p} = 166.6\]

and

\[ K_{i} = 27755.55\]

Back substituting these values into the digital loop filter coefficients we get:

and

Now for 50Khz run rate for the PLL, B0= 166.877556 and B1= -166.322444
An excel file is also provided to tune this values.

API Usage

The following is a sequence of steps that can be followed to use the SPLL_3PH_SRF API library functions in an existing C program. For a set of code examples that illustrates the use of this library, see the examples in the Digial Power SDK.

Before you can using the library you must add the libraries directory path as a searchable directory in the project include options. This can be done by right-clicking on the project in the Project Explorer window, selecting "Properties". In the window that opens, navigate to "Build, C2000 Compiler, Include Options". In the include path
window, click on the green add directory path button on the right and enter the path to the Digital Power SDK libraries directory.

This allows CCS to search the entire directory for library files.

Once that is done you should follow these steps to incorporate the library into a project:

  1. Specify the include file(s)
    #include "spll_3ph_srf.h"

  2. Create and add module structure to project source file, this is typically in the solution.c file for Digital Power SDK examples
    SPLL_3PH_SRF spll_3ph_1;
    Note: In the Digital Power SDK the modules are also externed in the solution.h header file as the module is used by static inline functions defined in the solution.h file.
    extern SPLL_3PH_SRF spll_3ph_1;

  3. Initialize module
    SPLL_3ph_SRF_init(AC_FREQ_HZ,
    (float32_t)(1.0 / ISR_FREQUENCY_HZ),
    &spll_3ph_1);
    spll_3ph_1.lpf_coeff.b0 = 166.877556f;
    spll_3ph_1.lpf_coeff.b1 = -166.322444f;

  4. Using the module
    Note: The run time module is called in the interrupt service routine running at ISR_FREQUENCY by passing the pu value of the measured voltages or currents in pu. The sine and cosine values are also passed to the module, which are typically computed from the PLL angle.
    SPLL_3ph_SRF_run(abc_dq0_pos1.q, &spll_3ph_1);
    grid_angle_radians = spll_3ph_1.theta[1];

API Integration Information

There is only one module in this package, the APIs can be referenced at SPLL_3PH_SRF. The module headers are located at spll_3ph_srf.h.

Macro Definition Documentation

◆ C2000_IEEE754_TYPES

#define C2000_IEEE754_TYPES

Definition at line 47 of file spll_3ph_srf.h.

Typedef Documentation

◆ float32_t

typedef float float32_t

Definition at line 52 of file spll_3ph_srf.h.

◆ float64_t

typedef long double float64_t

Definition at line 53 of file spll_3ph_srf.h.

Function Documentation

◆ SPLL_3PH_SRF_init()

static void SPLL_3PH_SRF_init ( float32_t  grid_freq,
float32_t  delta_t,
SPLL_3PH_SRF spll_obj 
)
inlinestatic

Initialize SPLL_3PH_SRF module.

Parameters
grid_freqThe grid frequency
delta_t1/Frequency of calling the PLL routine
*spll_objThe SPLL_3PH_SRF structure
Returns
None

Definition at line 92 of file spll_3ph_srf.h.

◆ SPLL_3PH_SRF_reset()

static void SPLL_3PH_SRF_reset ( SPLL_3PH_SRF spll_obj)
inlinestatic

Reset SPLL_3PH_SRF module.

Parameters
*spll_objThe SPLL_3PH_SRF structure
Returns
None

Definition at line 114 of file spll_3ph_srf.h.

◆ SPLL_3PH_SRF_run()

static void SPLL_3PH_SRF_run ( float32_t  v_q,
SPLL_3PH_SRF spll_obj 
)
inlinestatic

Run SPLL_3PH_SRF module.

Parameters
v_qQ component of the grid voltage
*spll_objThe SPLL_3PH_SRF structure

Definition at line 133 of file spll_3ph_srf.h.

SPLL_3PH_SRF::lpf_coeff
SPLL_3PH_SRF_LPF_COEFF lpf_coeff
Loop filter coefficients.
Definition: spll_3ph_srf.h:83
float32_t
float float32_t
Definition: power_meas_sine_analyzer.h:54
ABC_DQ0_NEG::q
float32_t q
Output: Q axis component (alpha beta -> d,q,z)
Definition: abc_dq0_neg.h:71
SPLL_3PH_SRF_LPF_COEFF::b0
float32_t b0
Definition: spll_3ph_srf.h:67
SPLL_3PH_SRF
Defines the SPLL_3PH_SRF structure.
Definition: spll_3ph_srf.h:76
SPLL_3PH_SRF::theta
float32_t theta[2]
Grid phase angle.
Definition: spll_3ph_srf.h:81
spll_3ph_srf.h
SPLL_3PH_SRF_LPF_COEFF::b1
float32_t b1
Definition: spll_3ph_srf.h:66