C2000Ware Digital Power SDK  5.03.00.00
SPLL_1PH_SOGI_FLL

Introduction

Data Structures

struct  SPLL_1PH_SOGI_FLL_OSG_COEFF
 Defines the SPLL_1PH_SOGI_FLL_OSG_COEFF structure. More...
 
struct  SPLL_1PH_SOGI_FLL_LPF_COEFF
 Defines the SPLL_1PH_SOGI_FLL_LPF_COEFF structure. More...
 
struct  SPLL_1PH_SOGI_FLL
 Defines the Orthogonal Signal Generator SPLL_1PH_SOGI_FLL structure. More...
 

Functions

static void SPLL_1PH_SOGI_FLL_reset (SPLL_1PH_SOGI_FLL *spll_obj)
 Resets internal data to zero,. More...
 
static void SPLL_1PH_SOGI_FLL_coeff_calc (SPLL_1PH_SOGI_FLL *spll_obj)
 Calculates the SPLL_1PH_SOGI_FLL coefficients. More...
 
static void SPLL_1PH_SOGI_FLL_config (SPLL_1PH_SOGI_FLL *spll_obj, float32_t acFreq, float32_t isrFrequency, float32_t lpf_b0, float32_t lpf_b1, float32_t k, float32_t gamma)
 Configures the SPLL_1PH_SOGI_FLL coefficients. More...
 
static void SPLL_1PH_SOGI_FLL_run (SPLL_1PH_SOGI_FLL *spll_obj, float32_t acValue)
 Runs SPLL_1PH_SOGI_FLL module. More...
 

Typedefs

typedef float float32_t
 
typedef long double float64_t
 

Macros

#define C2000_IEEE754_TYPES
 

Orthogonal Signal Generator SPLL with Frequency Locked Loop (SPLL_1PH_SOGI_FLL) Module

Introduction

The SPLL_1PH_SOGI_FLL API provides a set of functions that implements a software phase lock loop based on orthogonal signal generation using second order generalized integrators and frequency locked loop.

Orthogonal Signal Generator SPLL with FLL Model

This module follows the same basic structure as the SPLL_1PH_SOGI module and adds to the module a frequency adaptive feature through a frequency locked loop. The module implemented was first proposed by Rodriguez,P. ,Luna,A. , Candela,I. ,Teodorescu, R. , and Blaabjerg, F. in 'Grid Synchronization of Power Converters Using Multiple Second Order Generalized Integrators', In Proceedings of IEEE industrial Electronics Conference (IECON'08), November 2008, pp 755-760. An interesting relation was identified in the paper that the quadrature and the error component are in phase when the center frequency is greater than the actual and out of phase when it is lower than the actual. This feature is used to design a frequency locked loop as shown in figure below.

The value of k and γ are identified through simulation.

SOGI Phase Lock Loop with Frequency Locked Loop Structure Model

API Usage

The following is a sequence of steps that can be followed to use the SPLL_1PH_SOGI_FLL API library functions in an existing C program. For a set of code examples that illustrates the use of this library, see the examples in the Digial Power SDK.

Before you can using the library you must add the libraries directory path as a searchable directory in the project include options. This can be done by right-clicking on the project in the Project Explorer window, selecting "Properties". In the window that opens, navigate to "Build, C2000 Compiler, Include Options". In the include path
window, click on the green add directory path button on the right and enter the path to the Digital Power SDK libraries directory.

This allows CCS to search the entire directory for library files.

Once that is done you should follow these steps incorporate this library into your project:

  1. Specify the include file(s)
  2. Create and add module structure to project source file
  3. Initialize module
    Note: The SPLL module is called in the interrupt service routine running at ISR_FREQUENCY by passing the pu value of the measured AC voltage. The sine and cosine values of the AC grid angle can then be obtained from the module's structure elements.
    SPLL_1PH_SOGI_FLL_config(&spll3, GRID_FREQ, ISR_FREQUENCY, (float32_t)(222.2862), (float32_t)(-222.034), (float32_t) 0.5, (float32_t) 20000);
    spll3.k=0.5;
    spll3.gamma=20000;

  4. Using the module
    SPLL_1PH_SOGI_FLL_run(&spll3, ac_vol_sensed);
    spll_sine=spll3.sine;
    spll_cosine=spll3.cosine;

    Note: The functions are typically called in an interrupt source routine (ISR) which is called at the defined rate, ISR_FREQUENCY.

API Integration Information

There is only one module in this package, the APIs can be referenced at SPLL_1PH_SOGI_FLL. The module headers are located at spll_1ph_sogi_fll.h.

Macro Definition Documentation

◆ C2000_IEEE754_TYPES

#define C2000_IEEE754_TYPES

Definition at line 48 of file spll_1ph_sogi_fll.h.

Typedef Documentation

◆ float32_t

typedef float float32_t

Definition at line 53 of file spll_1ph_sogi_fll.h.

◆ float64_t

typedef long double float64_t

Definition at line 54 of file spll_1ph_sogi_fll.h.

Function Documentation

◆ SPLL_1PH_SOGI_FLL_reset()

static void SPLL_1PH_SOGI_FLL_reset ( SPLL_1PH_SOGI_FLL spll_obj)
inlinestatic

Resets internal data to zero,.

Parameters
*spll_objThe SPLL_1PH_SOGI_FLL structure pointer
Returns
None

Definition at line 117 of file spll_1ph_sogi_fll.h.

◆ SPLL_1PH_SOGI_FLL_coeff_calc()

static void SPLL_1PH_SOGI_FLL_coeff_calc ( SPLL_1PH_SOGI_FLL spll_obj)
inlinestatic

Calculates the SPLL_1PH_SOGI_FLL coefficients.

Parameters
*spll_objThe SPLL_1PH_SOGI_FLL structure pointer
Returns
None

Definition at line 157 of file spll_1ph_sogi_fll.h.

◆ SPLL_1PH_SOGI_FLL_config()

static void SPLL_1PH_SOGI_FLL_config ( SPLL_1PH_SOGI_FLL spll_obj,
float32_t  acFreq,
float32_t  isrFrequency,
float32_t  lpf_b0,
float32_t  lpf_b1,
float32_t  k,
float32_t  gamma 
)
inlinestatic

Configures the SPLL_1PH_SOGI_FLL coefficients.

Parameters
*spll_objThe SPLL_1PH_SOGI_FLL structure pointer
acFreqNominal AC frequency for the SPLL Module
isrFrequencyNominal AC frequency for the SPLL Module
lpf_b0B0 coefficient of LPF of SPLL
lpf_b1B1 coefficient of LPF of SPLL
kk parameter for FLL
gammagamma parameter for FLL
Returns
None

Definition at line 188 of file spll_1ph_sogi_fll.h.

◆ SPLL_1PH_SOGI_FLL_run()

static void SPLL_1PH_SOGI_FLL_run ( SPLL_1PH_SOGI_FLL spll_obj,
float32_t  acValue 
)
inlinestatic

Runs SPLL_1PH_SOGI_FLL module.

Parameters
*spll_objThe SPLL_1PH_SOGI_FLL structure pointer
acValueAC grid voltage in per unit (pu)
Returns
None

Definition at line 214 of file spll_1ph_sogi_fll.h.

SPLL_1PH_SOGI_FLL_coeff_calc
static void SPLL_1PH_SOGI_FLL_coeff_calc(SPLL_1PH_SOGI_FLL *spll_obj)
Calculates the SPLL_1PH_SOGI_FLL coefficients.
Definition: spll_1ph_sogi_fll.h:157
SPLL_1PH_SOGI_FLL::k
float32_t k
K parameter for FLL.
Definition: spll_1ph_sogi_fll.h:108
SPLL_1PH_SOGI_FLL::gamma
float32_t gamma
Gamma parameter for FLL.
Definition: spll_1ph_sogi_fll.h:107
float32_t
float float32_t
Definition: power_meas_sine_analyzer.h:54
SPLL_1PH_SOGI_FLL::sine
float32_t sine
Sine value of the PLL angle.
Definition: spll_1ph_sogi_fll.h:102
SPLL_1PH_SOGI_FLL_reset
static void SPLL_1PH_SOGI_FLL_reset(SPLL_1PH_SOGI_FLL *spll_obj)
Resets internal data to zero,.
Definition: spll_1ph_sogi_fll.h:117
SPLL_1PH_SOGI_FLL::cosine
float32_t cosine
Cosine value of the PLL angle.
Definition: spll_1ph_sogi_fll.h:101
spll_1ph_sogi_fll.h
SPLL_1PH_SOGI_FLL_run
static void SPLL_1PH_SOGI_FLL_run(SPLL_1PH_SOGI_FLL *spll_obj, float32_t acValue)
Runs SPLL_1PH_SOGI_FLL module.
Definition: spll_1ph_sogi_fll.h:214
SPLL_1PH_SOGI_FLL_config
static void SPLL_1PH_SOGI_FLL_config(SPLL_1PH_SOGI_FLL *spll_obj, float32_t acFreq, float32_t isrFrequency, float32_t lpf_b0, float32_t lpf_b1, float32_t k, float32_t gamma)
Configures the SPLL_1PH_SOGI_FLL coefficients.
Definition: spll_1ph_sogi_fll.h:188
SPLL_1PH_SOGI_FLL
Defines the Orthogonal Signal Generator SPLL_1PH_SOGI_FLL structure.
Definition: spll_1ph_sogi_fll.h:90