C2000Ware Digital Power SDK  5.03.00.00
SPLL_1PH_NOTCH

Introduction

Data Structures

struct  SPLL_1PH_NOTCH_COEFF
 Defines the SPLL_1PH_NOTCH_COEFF structure. More...
 
struct  SPLL_1PH_NOTCH_LPF_COEFF
 Defines the SPLL_1PH_NOTCH_LPF_COEFF structure. More...
 
struct  SPLL_1PH_NOTCH
 Defines the SPLL_1PH_NOTCH structure. More...
 

Functions

static void SPLL_1PH_NOTCH_reset (SPLL_1PH_NOTCH *spll_obj)
 Resets internal data to zero,. More...
 
static void SPLL_1PH_NOTCH_coeff_calc (SPLL_1PH_NOTCH *spll_obj, float32_t c1, float32_t c2)
 Calculates the coefficients for SPLL_1PH_NOTCH filter. More...
 
static void SPLL_1PH_NOTCH_config (SPLL_1PH_NOTCH *spll_obj, float32_t acFreq, float32_t isrFrequency, float32_t lpf_b0, float32_t lpf_b1, float32_t c1, float32_t c2)
 Configures the SPLL_1PH_NOTCH module. More...
 
static void SPLL_1PH_NOTCH_run (SPLL_1PH_NOTCH *spll_obj, float32_t acValue)
 Runs the SPLL_1PH_NOTCH module. More...
 

Typedefs

typedef float float32_t
 
typedef long double float64_t
 

Macros

#define C2000_IEEE754_TYPES
 

Software Phase Lock Loop for Single Phase Grid with NOTCH filter (SPLL_1PH_NOTCH) Module

Introduction

The Software Phase Lock Loop for Single Phase Grid with NOTCH filter (SPLL_1PH_NOTCH) API provides a set of functions that calculate the instantaneous phase of a single phase grid. It also computes the sine and cosine values of the grid that can then be used in the closed loop control.

Software Phase Lock Loop Model


A functional diagram of a PLL is shown in the Figure 7.2, which consists of a phase detect (PD), a loop filter (LPF) and a voltage controlled oscillator (VCO) block

Phase Lock Loop Basic Structure


A sinusoidal measured value of the grid is given by,

\[ v = v_{grid}sin({\theta_{in}}) = v_{grid}sin({\omega_{grid}}t + {\theta_{grid}}) \]

Now let the VCO output be,

\[ v' = cos({\theta_{out}}) = cos({\omega_{PLL}}t + {\theta_{PLL}}) \]

Phase Detect block multiplies the VCO output and the measured input value to get,

\[ v_{d} = \frac{K_{d}v_{grid}}2 [sin(({\omega_{grid}} - {\omega_{PLL}})t + ({\theta_{grid}} - {\theta_{PLL}})) + sin(({\omega_{grid}} + {\omega_{PLL}})t + ({\theta_{grid}} + {\theta_{PLL}}))] \]

The output of PD block has information of the phase difference. However, it has a high frequency component as well.

Thus the second block the loop filter, which is nothing but a PI controller is used which to low pass filter the high frequency components. Thus the output of the PI is

\[ \overline{v_{d}} = \frac{K_{d}v_{grid}}2 sin(({\omega_{grid}} - {\omega_{PLL}})t + ({\theta_{grid}} - {\theta_{PLL}})) \]

For steady state operation, ignore the $ \omega_{grid}$ - $\omega_{PLL} $ term, and sin(Θ) = Θ the linearized error is given as,

\[ err = \frac{v_{grid}({\theta_{grid}} - {\theta_{PLL}})}2 \]

Small signal analysis is done using the network theory, where the feedback loop is broken to get the open loop transfer equation and then the closed loop transfer function is given by

Closed Loop TF = Open Loop TF / (1+ OpenLoopTF)

Thus the PLL transfer function can be written as follows

Closed loop Phase TF:

\[ H_{o}(s) = \frac{{\theta_{out}}(s)}{{\theta_{in}(s)}} = \frac{LF(s)}{s + LF(s)} = \frac{v_{grid}(k_{p}s + \frac{k_{p}}{T_{i}})}{s^2 + v_{grid}k_{p}s + v_{grid}\frac{k_{p}}T_{i}} \]

Closed loop error transfer function:

\[ E_{o}(s) = \frac{V_{d}(s)}{\theta_{in}(s)} = 1- H_{o}(s) = \frac{s}{s + LF(s)} = \frac{s^2}{s^2 + k_{p}s + \frac{k_{p}}{T_{i}}} \]

The closed loop phase transfer function represents a low pass filter characteristics, which helps in attenuating the higher order harmonics. From the error transfer function it is clear that there are two poles at the origin which means that it is able to track even a constant slope ramp in the input phase angle without any steady state error.

Comparing the closed loop phase transfer function to the generic second order system transfer function

\[ H(s) = \frac{2\zeta\omega_{n}s + {\omega_{n}}^2}{s^2 + 2\zeta\omega_{n}s + {\omega_{n}}^2} \]

Now comparing this with the closed loop phase transfer function, we can get the natural frequency and the damping ration of the linearalized PLL.

\[ \omega_{n} = \sqrt{\frac{v_{grid}K_{p}}{T_{i}}}\]

  

\[ \zeta = \sqrt{\frac{v_{grid}{T_{i}}{K_{p}}}{4}} \]

Note in the PLL the PI serves dual purpose

  1. To filter out high frequency which is at twice the frequency of the carrier/grid
  2. Control response of the PLL to step changes in the grid conditions (i.e. phase leaps, magnitude swells etc.)

Now if the carrier is high enough in frequency, the low pass characteristics of the PI are good enough and one does not have to worry about low frequency passing characteristics of the LPF and only tune for the dynamic response of the PI. However as the grid frequency is very low (50Hz-60Hz) the roll off provided by the PI is not satisfactory enough and introduces high frequency element to the loop filter output, which affects the performance of the PLL.

Therefore a notch filter is used at the output of the Phase Detect block which attenuates the twice the grid frequency component very well. An adaptive notch filter is used to selectively notch the exact frequency in case there are variations in the grid frequency.

Software Phase PLL with Notch Filter


In this case, the PI tuning can be done solely based on dynamic response of the PLL and not worry about the LPF characteristics.

The Loop Filter or PI is implemented as a digital controller with the following equation

\[ ylf[n] = ylf[n-1] * A1 + ynotch[n] * B0 + ynotch[n-1] * B1 \]

Using Z transform, this equation can be written as

\[ \frac{ylf(z)}{ynotch(z)} = \frac{B0 + B1*z^{-1}}{1-z^{-1}} \]

Now the laplace transform of the loop filter from the analog domain is

\[ \frac{ylf(s)}{ynotch(s)} = K_{p} + \frac{K_{i}}s \]

Now using Bi-linear transformation $ s =\frac{2}T(\frac{z-1}{z+1}) $ =>

\[ \frac{ylf(z)}{ynotch(z)} = \frac{(\frac{2*K_{p}+K_{i}*T}{2}) - (\frac{2*K_{p}-K_{i}*T}{2})z^{-1}}{1-z^{-1}} \]

where T = Sampling Time

Now the question is how to select an appropriate value for the proportional and integral gain. Now the step response to a general second order equation i.e.
$ H(s) = \frac{\omega_{n}^2}{s^2 + 2\zeta\omega_{n}s+ {\omega_{n}}^2} $ is given as: $ y(t) = 1 - ce^{-{\sigma}{t}}sin(\omega_{d}t + \phi) $

Ignoring the LHP zero from the above equation, now the settling time is given as the time it takes for the response to settle between an error band, let's say this error is ∂, then

\[ 1-\partial = 1-ce^{-\sigma{t_{s}}} => \partial = ce^{-\sigma{t_s}} => t_{s} = \frac{1}{\sigma} * ln(\frac{c}{\sigma}) \]

Where $ \sigma =\zeta\omega_{n} $ and $ c=\frac{\omega_{n}}{\omega_{d}} $ and $ {\omega_{d}} = \sqrt{1-\zeta^2}{\omega_{n}} $

Now using settling time to be 30ms and the error band to be 5% and damping ratio to be 0.7 we can obtain the natural frequency to be 119.014 and then back substituting we get $K_{p}=166.6$ and $K_{i}=27755.55$

Back substituting these values into the digital loop filter coefficients, we get:
$ B0 = (\frac{2*K_{p}+K_{i}*T}{2})$ and $B1 = -(\frac{2*K_{p}-K_{i}*T}{2}) $

Now for 50Khz run rate for the PLL, B0= 166.877556 and B1= -166.322444

The software module provides the structure for a software based PLL to be used in a single phase grid tied application using the method described in the Software Phase PLL with Notch Filter figure.

Design of the notch filter is achieved using discretizing the notch filter equation from s domain: $ H_{nf}(s) = \frac{s^2 + 2\zeta_{2}\omega_{n}s + \omega_{n}^2}{s^2 + 2\zeta_{1}\omega_{n}s + \omega_{n}^2} $ where $\zeta_{2}<<\zeta{1} $

Using zero order hold i.e. $ s = \frac{(z-1)}{T} $ we get

\[ H_{nf}(s) = \frac{z^2 + (2\zeta_{2}\omega_{n}T - 2)z + (-2\zeta_{2}\omega_{n}T + {\omega_{n}}^2{T^2} + 1)}{z^2 + (2\zeta_{1}\omega_{n}T -2)z + (-2\zeta_{1}\omega_{n}T + {\omega_{n}}^2{T^2} + 1)} = \frac{B_{0}+ B_{1}z^{-1} + B_{2}z^{-2}}{A_{0}+ A_{1}z^{-1} +A_{2}z^{-2}} \]

Hence, the coefficients for the notch filter can be adaptively changed as the grid frequency varies. The coefficients are chosen such that attenuation at twice the grid frequency is steep without affecting other frequencies.

Taking $ \zeta_{2} << \zeta_{1} $, and $ \zeta_{1} =0.00001 $ and $ \zeta_{1} =0.1 $, the response of the notch is as shown below for 50 and 60Hz grid where the coefficients are calculated based on the grid frequency estimate.

API Usage

The following is a sequence of steps that can be followed to use the SPLL_1PH_notch API library functions in an existing C program. For a set of code examples that illustrates the use of this library, see the examples in the Digial Power SDK.

Before you can using the library you must add the libraries directory path as a searchable directory in the project include options. This can be done by right-clicking on the project in the Project Explorer window, selecting "Properties". In the window that opens, navigate to "Build, C2000 Compiler, Include Options". In the include path
window, click on the green add directory path button on the right and enter the path to the Digital Power SDK libraries directory.

  1. Specify the include file(s)
    #include "spll_1ph_notch.h"

  2. Create and add module structure to project source file
  3. Initialize module
    SPLL_1PH_NOTCH_config(&spll2, GRID_FREQ,ISR_FREQUENCY,(float32_t)(222.2862),(float32_t)(-222.034),(float32_t) 0.25,(float32_t) 0.00001);

  4. Using the module
    Note: The SPLL module is called in the interrupt service routine running at ISR_FREQUENCY by passing the pu value of the measured AC voltage. The sine and cosine values of the AC grid angle can then be obtained from the module's structure elements.
    SPLL_1PH_NOTCH_run(&spll2,ac_vol_sensed);
    spll_sine=spll2.sine;
    spll_cosine=spll2.cosine;


    Note: The functions are typically called in an interrupt source routine (ISR) which is called at the defined rate, ISR_FREQUENCY.

API Integration Information

There is only one module in this package, the APIs can be referenced at SPLL_1PH_NOTCH. The module headers are located at spll_1ph_notch.h.

Macro Definition Documentation

◆ C2000_IEEE754_TYPES

#define C2000_IEEE754_TYPES

Definition at line 48 of file spll_1ph_notch.h.

Typedef Documentation

◆ float32_t

typedef float float32_t

Definition at line 53 of file spll_1ph_notch.h.

◆ float64_t

typedef long double float64_t

Definition at line 54 of file spll_1ph_notch.h.

Function Documentation

◆ SPLL_1PH_NOTCH_reset()

static void SPLL_1PH_NOTCH_reset ( SPLL_1PH_NOTCH spll_obj)
inlinestatic

Resets internal data to zero,.

Parameters
*spll_objThe SPLL_1PH_NOTCH structure pointer
Returns
None

Definition at line 106 of file spll_1ph_notch.h.

◆ SPLL_1PH_NOTCH_coeff_calc()

static void SPLL_1PH_NOTCH_coeff_calc ( SPLL_1PH_NOTCH spll_obj,
float32_t  c1,
float32_t  c2 
)
inlinestatic

Calculates the coefficients for SPLL_1PH_NOTCH filter.

Parameters
*spll_objThe SPLL_1PH_NOTCH structure pointer
c1c1 Notch paramater
c2c2 Notch Parameter
Returns
None

Definition at line 136 of file spll_1ph_notch.h.

◆ SPLL_1PH_NOTCH_config()

static void SPLL_1PH_NOTCH_config ( SPLL_1PH_NOTCH spll_obj,
float32_t  acFreq,
float32_t  isrFrequency,
float32_t  lpf_b0,
float32_t  lpf_b1,
float32_t  c1,
float32_t  c2 
)
inlinestatic

Configures the SPLL_1PH_NOTCH module.

Parameters
*spll_objThe SPLL_1PH_NOTCH structure pointer
acFreqNominal AC frequency for the SPLL Module
isrFrequencyNominal AC frequency for the SPLL Module
lpf_b0B0 coefficient of LPF of SPLL
lpf_b1B1 coefficient of LPF of SPLL
c1c1 Notch paramater
c2c2 Notch Parameter
Returns
None

Definition at line 174 of file spll_1ph_notch.h.

◆ SPLL_1PH_NOTCH_run()

static void SPLL_1PH_NOTCH_run ( SPLL_1PH_NOTCH spll_obj,
float32_t  acValue 
)
inlinestatic

Runs the SPLL_1PH_NOTCH module.

Parameters
*spll_objThe SPLL_1PH_NOTCH structure pointer
acValueAC grid voltage in per unit (pu)
Returns
None

Definition at line 199 of file spll_1ph_notch.h.

SPLL_1PH_NOTCH_config
static void SPLL_1PH_NOTCH_config(SPLL_1PH_NOTCH *spll_obj, float32_t acFreq, float32_t isrFrequency, float32_t lpf_b0, float32_t lpf_b1, float32_t c1, float32_t c2)
Configures the SPLL_1PH_NOTCH module.
Definition: spll_1ph_notch.h:174
float32_t
float float32_t
Definition: power_meas_sine_analyzer.h:54
SPLL_1PH_NOTCH::sine
float32_t sine
Sine value of the PLL angle.
Definition: spll_1ph_notch.h:96
SPLL_1PH_NOTCH_run
static void SPLL_1PH_NOTCH_run(SPLL_1PH_NOTCH *spll_obj, float32_t acValue)
Runs the SPLL_1PH_NOTCH module.
Definition: spll_1ph_notch.h:199
SPLL_1PH_NOTCH_coeff_calc
static void SPLL_1PH_NOTCH_coeff_calc(SPLL_1PH_NOTCH *spll_obj, float32_t c1, float32_t c2)
Calculates the coefficients for SPLL_1PH_NOTCH filter.
Definition: spll_1ph_notch.h:136
SPLL_1PH_NOTCH_reset
static void SPLL_1PH_NOTCH_reset(SPLL_1PH_NOTCH *spll_obj)
Resets internal data to zero,.
Definition: spll_1ph_notch.h:106
SPLL_1PH_NOTCH::cosine
float32_t cosine
Cosine value of the PLL angle.
Definition: spll_1ph_notch.h:95
spll_1ph_notch.h
SPLL_1PH_NOTCH
Defines the SPLL_1PH_NOTCH structure.
Definition: spll_1ph_notch.h:87