I2CMSP432E4.h
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1 /*
2  * Copyright (c) 2017, Texas Instruments Incorporated
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  *
9  * * Redistributions of source code must retain the above copyright
10  * notice, this list of conditions and the following disclaimer.
11  *
12  * * Redistributions in binary form must reproduce the above copyright
13  * notice, this list of conditions and the following disclaimer in the
14  * documentation and/or other materials provided with the distribution.
15  *
16  * * Neither the name of Texas Instruments Incorporated nor the names of
17  * its contributors may be used to endorse or promote products derived
18  * from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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29  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
30  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
48 #ifndef ti_drivers_i2c_I2CMSP432E4__include
49 #define ti_drivers_i2c_I2CMSP432E4__include
50 
51 #ifdef __cplusplus
52 extern "C" {
53 #endif
54 
55 #include <stdbool.h>
56 #include <stddef.h>
57 #include <stdint.h>
58 
59 #include <ti/devices/msp432e4/inc/msp432.h>
60 
61 #include <ti/devices/msp432e4/driverlib/gpio.h>
62 #include <ti/devices/msp432e4/driverlib/pin_map.h>
63 
64 #include <ti/drivers/dpl/SemaphoreP.h>
65 #include <ti/drivers/dpl/HwiP.h>
67 #include <ti/drivers/I2C.h>
68 
79 /* Add I2CMSP432E4_STATUS_* macros here */
80 
93 /* Add I2CMSP432E4_CMD_* macros here */
94 
100 #define I2CMSP432E4_PB2_I2C0SCL GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTB, 2, GPIO_PB2_I2C0SCL)
101 
105 #define I2CMSP432E4_PB3_I2C0SDA GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTB, 3, GPIO_PB3_I2C0SDA)
106 
110 #define I2CMSP432E4_PG0_I2C1SCL GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTG, 0, GPIO_PG0_I2C1SCL)
111 
115 #define I2CMSP432E4_PR0_I2C1SCL GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTR, 0, GPIO_PR0_I2C1SCL)
116 
120 #define I2CMSP432E4_PG1_I2C1SDA GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTG, 1, GPIO_PG1_I2C1SDA)
121 
125 #define I2CMSP432E4_PR1_I2C1SDA GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTR, 1, GPIO_PR1_I2C1SDA)
126 
130 #define I2CMSP432E4_PL1_I2C2SCL GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTL, 1, GPIO_PL1_I2C2SCL)
131 
135 #define I2CMSP432E4_PP5_I2C2SCL GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTP, 5, GPIO_PP5_I2C2SCL)
136 
140 #define I2CMSP432E4_PN5_I2C2SCL GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTN, 5, GPIO_PN5_I2C2SCL)
141 
145 #define I2CMSP432E4_PG2_I2C2SCL GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTG, 2, GPIO_PG2_I2C2SCL)
146 
150 #define I2CMSP432E4_PR2_I2C2SCL GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTR, 2, GPIO_PR2_I2C2SCL)
151 
155 #define I2CMSP432E4_PL0_I2C2SDA GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTL, 0, GPIO_PL0_I2C2SDA)
156 
160 #define I2CMSP432E4_PN4_I2C2SDA GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTN, 4, GPIO_PN4_I2C2SDA)
161 
165 #define I2CMSP432E4_PP6_I2C2SDA GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTP, 6, GPIO_PP6_I2C2SDA)
166 
170 #define I2CMSP432E4_PG3_I2C2SDA GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTG, 3, GPIO_PG3_I2C2SDA)
171 
175 #define I2CMSP432E4_PR3_I2C2SDA GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTR, 3, GPIO_PR3_I2C2SDA)
176 
180 #define I2CMSP432E4_PK4_I2C3SCL GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTK, 4, GPIO_PK4_I2C3SCL)
181 
185 #define I2CMSP432E4_PG4_I2C3SCL GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTG, 4, GPIO_PG4_I2C3SCL)
186 
190 #define I2CMSP432E4_PK5_I2C3SDA GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTK, 5, GPIO_PK5_I2C3SDA)
191 
195 #define I2CMSP432E4_PG5_I2C3SDA GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTG, 5, GPIO_PG5_I2C3SDA)
196 
200 #define I2CMSP432E4_PK6_I2C4SCL GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTK, 6, GPIO_PK6_I2C4SCL)
201 
205 #define I2CMSP432E4_PG6_I2C4SCL GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTG, 6, GPIO_PG6_I2C4SCL)
206 
210 #define I2CMSP432E4_PR6_I2C4SCL GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTR, 6, GPIO_PR6_I2C4SCL)
211 
215 #define I2CMSP432E4_PK7_I2C4SDA GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTK, 7, GPIO_PK7_I2C4SDA)
216 
220 #define I2CMSP432E4_PG7_I2C4SDA GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTG, 7, GPIO_PG7_I2C4SDA)
221 
225 #define I2CMSP432E4_PR7_I2C4SDA GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTR, 7, GPIO_PR7_I2C4SDA)
226 
230 #define I2CMSP432E4_PB0_I2C5SCL GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTB, 0, GPIO_PB0_I2C5SCL)
231 
235 #define I2CMSP432E4_PB4_I2C5SCL GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTB, 4, GPIO_PB4_I2C5SCL)
236 
240 #define I2CMSP432E4_PB1_I2C5SDA GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTB, 1, GPIO_PB1_I2C5SDA)
241 
245 #define I2CMSP432E4_PB5_I2C5SDA GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTB, 5, GPIO_PB5_I2C5SDA)
246 
250 #define I2CMSP432E4_PA6_I2C6SCL GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTA, 6, GPIO_PA6_I2C6SCL)
251 
255 #define I2CMSP432E4_PB6_I2C6SCL GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTB, 6, GPIO_PB6_I2C6SCL)
256 
260 #define I2CMSP432E4_PA7_I2C6SDA GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTA, 7, GPIO_PA7_I2C6SDA)
261 
265 #define I2CMSP432E4_PB7_I2C6SDA GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTB, 7, GPIO_PB7_I2C6SDA)
266 
270 #define I2CMSP432E4_PD0_I2C7SCL GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTD, 0, GPIO_PD0_I2C7SCL)
271 
275 #define I2CMSP432E4_PA4_I2C7SCL GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTA, 4, GPIO_PA4_I2C7SCL)
276 
280 #define I2CMSP432E4_PD1_I2C7SDA GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTD, 1, GPIO_PD1_I2C7SDA)
281 
285 #define I2CMSP432E4_PA5_I2C7SDA GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTA, 5, GPIO_PA5_I2C7SDA)
286 
290 #define I2CMSP432E4_PD2_I2C8SCL GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTD, 2, GPIO_PD2_I2C8SCL)
291 
295 #define I2CMSP432E4_PA2_I2C8SCL GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTA, 2, GPIO_PA2_I2C8SCL)
296 
300 #define I2CMSP432E4_PD3_I2C8SDA GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTD, 3, GPIO_PD3_I2C8SDA)
301 
305 #define I2CMSP432E4_PA3_I2C8SDA GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTA, 3, GPIO_PA3_I2C8SDA)
306 
310 #define I2CMSP432E4_PA0_I2C9SCL GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTA, 0, GPIO_PA0_I2C9SCL)
311 
315 #define I2CMSP432E4_PE6_I2C9SCL GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTE, 6, GPIO_PE6_I2C9SCL)
316 
320 #define I2CMSP432E4_PA1_I2C9SDA GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTA, 1, GPIO_PA1_I2C9SDA)
321 
325 #define I2CMSP432E4_PE7_I2C9SDA GPIOMSP432E4_pinConfigMask(GPIOMSP432E4_PORTE, 7, GPIO_PE7_I2C9SDA)
326 
327 
328 /* I2C function table pointer */
330 
337 typedef enum I2CMSP432E4_Mode {
338  I2CMSP432E4_IDLE_MODE = 0, /* I2C is not performing a transaction */
339  I2CMSP432E4_WRITE_MODE, /* I2C is currently performing write operations */
340  I2CMSP432E4_READ_MODE, /* I2C is currently performing read operations */
341  I2CMSP432E4_ERROR = 0xFF /* I2C error has occurred, exit gracefully */
343 
382 typedef struct I2CMSP432E4_HWAttrs_ {
384  uint32_t baseAddr;
386  uint32_t intNum;
388  uint32_t intPriority;
390  uint32_t sclPin;
392  uint32_t sdaPin;
394 
400 typedef struct I2CMSP432E4_Object_ {
401  SemaphoreP_Handle mutex; /* Grants exclusive access to I2C */
402  SemaphoreP_Handle transferComplete; /* Notify finished I2C transfer */
403 
404  I2C_TransferMode transferMode; /* Blocking or Callback mode */
405  I2C_CallbackFxn transferCallbackFxn; /* Callback function pointer */
406 
407  HwiP_Handle hwiHandle; /* Hwi handle */
408 
409  volatile I2CMSP432E4_Mode mode; /* Stores the I2C state */
410 
411  I2C_Transaction *currentTransaction; /* Pointer to current I2C transaction */
412 
413  uint8_t *writeBufIdx; /* Internal inc. writeBuf index */
414  size_t writeCountIdx; /* Internal dec. writeCounter */
415 
416  uint8_t *readBufIdx; /* Internal inc. readBuf index */
417  size_t readCountIdx; /* Internal dec. readCounter */
418 
419  /* I2C transaction pointers for I2C_MODE_CALLBACK */
420  I2C_Transaction *headPtr; /* Head ptr for queued transactions */
421  I2C_Transaction *tailPtr; /* Tail ptr for queued transactions */
422 
423  bool bitRate; /* Bit rate (false=slow, true=fast) */
424  bool isOpen; /* flag to indicate module is open */
426 
427 #ifdef __cplusplus
428 }
429 #endif
430 
431 #endif /* ti_drivers_i2c_I2CMSP432E4__include */
size_t writeCountIdx
Definition: I2CMSP432E4.h:414
I2CMSP432E4 Hardware attributes.
Definition: I2CMSP432E4.h:382
volatile I2CMSP432E4_Mode mode
Definition: I2CMSP432E4.h:409
I2CMSP432E4 Object.
Definition: I2CMSP432E4.h:400
I2C transaction.
Definition: I2C.h:464
uint32_t intNum
Definition: I2CMSP432E4.h:386
I2C_Transaction * tailPtr
Definition: I2CMSP432E4.h:421
uint32_t intPriority
Definition: I2CMSP432E4.h:388
bool bitRate
Definition: I2CMSP432E4.h:423
I2C_TransferMode transferMode
Definition: I2CMSP432E4.h:404
uint32_t sdaPin
Definition: I2CMSP432E4.h:392
enum I2C_TransferMode_ I2C_TransferMode
I2C transfer mode.
I2CMSP432E4_Mode
I2CMSP432E4 mode.
Definition: I2CMSP432E4.h:337
Definition: I2CMSP432E4.h:341
Definition: I2CMSP432E4.h:340
bool isOpen
Definition: I2CMSP432E4.h:424
const I2C_FxnTable I2CMSP432E4_fxnTable
The definition of an I2C function table that contains the required set of functions to control a spec...
Definition: I2C.h:593
uint32_t baseAddr
Definition: I2CMSP432E4.h:384
struct I2CMSP432E4_Object_ I2CMSP432E4_Object
I2CMSP432E4 Object.
MSP432E4 GPIO driver.
uint8_t * writeBufIdx
Definition: I2CMSP432E4.h:413
SemaphoreP_Handle mutex
Definition: I2CMSP432E4.h:401
I2C_CallbackFxn transferCallbackFxn
Definition: I2CMSP432E4.h:405
uint8_t * readBufIdx
Definition: I2CMSP432E4.h:416
struct I2CMSP432E4_HWAttrs_ I2CMSP432E4_HWAttrs
I2CMSP432E4 Hardware attributes.
size_t readCountIdx
Definition: I2CMSP432E4.h:417
SemaphoreP_Handle transferComplete
Definition: I2CMSP432E4.h:402
void(* I2C_CallbackFxn)(I2C_Handle handle, I2C_Transaction *transaction, bool transferStatus)
I2C callback function.
Definition: I2C.h:506
HwiP_Handle hwiHandle
Definition: I2CMSP432E4.h:407
I2C_Transaction * currentTransaction
Definition: I2CMSP432E4.h:411
uint32_t sclPin
Definition: I2CMSP432E4.h:390
I2C_Transaction * headPtr
Definition: I2CMSP432E4.h:420
I2C driver interface.
Definition: I2CMSP432E4.h:339
Definition: I2CMSP432E4.h:338
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