CC26xx Driver Library
[ssi] Synchronous Serial Interface

Functions

void SSIConfigSetExpClk (uint32_t ui32Base, uint32_t ui32SSIClk, uint32_t ui32Protocol, uint32_t ui32Mode, uint32_t ui32BitRate, uint32_t ui32DataWidth)
 Configures the synchronous serial port. More...
 
static void SSIEnable (uint32_t ui32Base)
 Enables the synchronous serial port. More...
 
static void SSIDisable (uint32_t ui32Base)
 Disables the synchronous serial port. More...
 
void SSIDataPut (uint32_t ui32Base, uint32_t ui32Data)
 Puts a data element into the SSI transmit FIFO. More...
 
int32_t SSIDataPutNonBlocking (uint32_t ui32Base, uint32_t ui32Data)
 Puts a data element into the SSI transmit FIFO. More...
 
void SSIDataGet (uint32_t ui32Base, uint32_t *pui32Data)
 Gets a data element from the SSI receive FIFO. More...
 
int32_t SSIDataGetNonBlocking (uint32_t ui32Base, uint32_t *pui32Data)
 Gets a data element from the SSI receive FIFO. More...
 
static bool SSIBusy (uint32_t ui32Base)
 Determines whether the SSI transmitter is busy or not. More...
 
static uint32_t SSIStatus (uint32_t ui32Base)
 Get the status of the SSI data buffers. More...
 
void SSIIntRegister (uint32_t ui32Base, void(*pfnHandler)(void))
 Registers an interrupt handler for the synchronous serial port. More...
 
void SSIIntUnregister (uint32_t ui32Base)
 Unregisters an interrupt handler for the synchronous serial port. More...
 
static void SSIIntEnable (uint32_t ui32Base, uint32_t ui32IntFlags)
 Enables individual SSI interrupt sources. More...
 
static void SSIIntDisable (uint32_t ui32Base, uint32_t ui32IntFlags)
 Disables individual SSI interrupt sources. More...
 
static void SSIIntClear (uint32_t ui32Base, uint32_t ui32IntFlags)
 Clears SSI interrupt sources. More...
 
static uint32_t SSIIntStatus (uint32_t ui32Base, bool bMasked)
 Gets the current interrupt status. More...
 
static void SSIDMAEnable (uint32_t ui32Base, uint32_t ui32DMAFlags)
 Enable SSI DMA operation. More...
 
static void SSIDMADisable (uint32_t ui32Base, uint32_t ui32DMAFlags)
 Disable SSI DMA operation. More...
 

Detailed Description

Function Documentation

static bool SSIBusy ( uint32_t  ui32Base)
inlinestatic

Determines whether the SSI transmitter is busy or not.

Allows the caller to determine whether all transmitted bytes have cleared the transmitter hardware. If false is returned, then the transmit FIFO is empty and all bits of the last transmitted word have left the hardware shift register.

Parameters
ui32Baseis the base address of the SSI port.
Returns
Returns status of the SSI transmit buffer.
  • true : SSI is transmitting.
  • false : SSI transmissions are complete.
378 {
379  // Check the arguments.
380  ASSERT(SSIBaseValid(ui32Base));
381 
382  // Determine if the SSI is busy.
383  return((HWREG(ui32Base + SSI_O_SR) & SSI_SR_BSY) ? true : false);
384 }
#define ASSERT(expr)
Definition: debug.h:74
void SSIConfigSetExpClk ( uint32_t  ui32Base,
uint32_t  ui32SSIClk,
uint32_t  ui32Protocol,
uint32_t  ui32Mode,
uint32_t  ui32BitRate,
uint32_t  ui32DataWidth 
)

Configures the synchronous serial port.

This function configures the synchronous serial port. It sets the SSI protocol, mode of operation, bit rate, and data width.

The ui32Protocol parameter defines the data frame format. The Motorola frame formats imply the following polarity and phase configurations:

Polarity Phase       Mode
  0       0   SSI_FRF_MOTO_MODE_0
  0       1   SSI_FRF_MOTO_MODE_1
  1       0   SSI_FRF_MOTO_MODE_2
  1       1   SSI_FRF_MOTO_MODE_3

The ui32Mode parameter defines the operating mode of the SSI module. The SSI module can operate as a master or slave; if a slave, the SSI can be configured to disable output on its serial output line.

The ui32BitRate parameter defines the bit rate for the SSI. This bit rate must satisfy the following clock ratio criteria:

  • Master mode : FSSI >= 2 * bit rate
  • Slave mode : FSSI >= 12 * bit rate

where FSSI is the frequency of the clock supplied to the SSI module.

The ui32DataWidth parameter defines the width of the data transfers, and can be a value between 4 and 16, inclusive.

Note
The peripheral clock is not necessarily the same as the processor clock. The frequency of the peripheral clock is set by the system control.
Parameters
ui32Basespecifies the SSI module base address.
ui32SSIClkis the rate of the clock supplied to the SSI module.
ui32Protocolspecifies the data transfer protocol. The parameter can be one of the following values:
ui32Modespecifies the mode of operation. The parameter can be one of the following values:
ui32BitRatespecifies the clock rate.
ui32DataWidthspecifies number of bits transferred per frame. Must be a value between 4 and 16, both included.
Returns
None
73 {
74  uint32_t ui32MaxBitRate;
75  uint32_t ui32RegVal;
76  uint32_t ui32PreDiv;
77  uint32_t ui32SCR;
78  uint32_t ui32SPH_SPO;
79 
80  // Check the arguments.
81  ASSERT(SSIBaseValid(ui32Base));
82  ASSERT((ui32Protocol == SSI_FRF_MOTO_MODE_0) ||
83  (ui32Protocol == SSI_FRF_MOTO_MODE_1) ||
84  (ui32Protocol == SSI_FRF_MOTO_MODE_2) ||
85  (ui32Protocol == SSI_FRF_MOTO_MODE_3) ||
86  (ui32Protocol == SSI_FRF_TI) ||
87  (ui32Protocol == SSI_FRF_NMW));
88  ASSERT((ui32Mode == SSI_MODE_MASTER) ||
89  (ui32Mode == SSI_MODE_SLAVE) ||
90  (ui32Mode == SSI_MODE_SLAVE_OD));
91  ASSERT(((ui32Mode == SSI_MODE_MASTER) && (ui32BitRate <= (ui32SSIClk / 2))) ||
92  ((ui32Mode != SSI_MODE_MASTER) && (ui32BitRate <= (ui32SSIClk / 12))));
93  ASSERT((ui32SSIClk / ui32BitRate) <= (254 * 256));
94  ASSERT((ui32DataWidth >= 4) && (ui32DataWidth <= 16));
95 
96  // Set the mode.
97  ui32RegVal = (ui32Mode == SSI_MODE_SLAVE_OD) ? SSI_CR1_SOD : 0;
98  ui32RegVal |= (ui32Mode == SSI_MODE_MASTER) ? 0 : SSI_CR1_MS;
99  HWREG(ui32Base + SSI_O_CR1) = ui32RegVal;
100 
101  // Set the clock predivider.
102  ui32MaxBitRate = ui32SSIClk / ui32BitRate;
103  ui32PreDiv = 0;
104  do
105  {
106  ui32PreDiv += 2;
107  ui32SCR = (ui32MaxBitRate / ui32PreDiv) - 1;
108  }
109  while(ui32SCR > 255);
110  HWREG(ui32Base + SSI_O_CPSR) = ui32PreDiv;
111 
112  // Set protocol and clock rate.
113  ui32SPH_SPO = (ui32Protocol & 3) << 6;
114  ui32Protocol &= SSI_CR0_FRF_M;
115  ui32RegVal = (ui32SCR << 8) | ui32SPH_SPO | ui32Protocol | (ui32DataWidth - 1);
116  HWREG(ui32Base + SSI_O_CR0) = ui32RegVal;
117 }
#define SSI_MODE_SLAVE_OD
Definition: ssi.h:130
#define SSI_FRF_MOTO_MODE_0
Definition: ssi.h:121
#define SSI_FRF_MOTO_MODE_2
Definition: ssi.h:123
#define SSI_FRF_TI
Definition: ssi.h:125
#define ASSERT(expr)
Definition: debug.h:74
#define SSI_MODE_SLAVE
Definition: ssi.h:129
#define SSI_FRF_NMW
Definition: ssi.h:126
#define SSI_FRF_MOTO_MODE_3
Definition: ssi.h:124
#define SSI_FRF_MOTO_MODE_1
Definition: ssi.h:122
#define SSI_MODE_MASTER
Definition: ssi.h:128
void SSIDataGet ( uint32_t  ui32Base,
uint32_t *  pui32Data 
)

Gets a data element from the SSI receive FIFO.

This function gets received data from the receive FIFO of the specified SSI module and places that data into the location specified by the pui32Data parameter.

Note
Only the lower N bits of the value written to pui32Data contain valid data, where N is the data width as configured by SSIConfigSetExpClk(). For example, if the interface is configured for 8-bit data width, only the lower 8 bits of the value written to pui32Data contain valid data.
Parameters
ui32Basespecifies the SSI module base address.
pui32Datais a pointer to a storage location for data that was received over the SSI interface.
Returns
None
174 {
175  // Check the arguments.
176  ASSERT(SSIBaseValid(ui32Base));
177 
178  // Wait until there is data to be read.
179  while(!(HWREG(ui32Base + SSI_O_SR) & SSI_SR_RNE))
180  {
181  }
182 
183  // Read data from SSI.
184  *pui32Data = HWREG(ui32Base + SSI_O_DR);
185 }
#define ASSERT(expr)
Definition: debug.h:74
int32_t SSIDataGetNonBlocking ( uint32_t  ui32Base,
uint32_t *  pui32Data 
)

Gets a data element from the SSI receive FIFO.

This function gets received data from the receive FIFO of the specified SSI module and places that data into the location specified by the ui32Data parameter. If there is no data in the FIFO, then this function returns a zero.

Note
Only the lower N bits of the value written to pui32Data contain valid data, where N is the data width as configured by SSIConfigSetExpClk(). For example, if the interface is configured for 8-bit data width, only the lower 8 bits of the value written to pui32Data contain valid data.
Parameters
ui32Basespecifies the SSI module base address.
pui32Datais a pointer to a storage location for data that was received over the SSI interface.
Returns
Returns the number of elements read from the SSI receive FIFO.

Gets a data element from the SSI receive FIFO

Parameters
ui32Basespecifies the SSI module base address.
pui32Datais a pointer to a storage location for data that was received over the SSI interface.

This function gets received data from the receive FIFO of the specified SSI module and places that data into the location specified by the ui32Data parameter. If there is no data in the FIFO, then this function returns a zero.

Note
Only the lower N bits of the value written to pui32Data contain valid data, where N is the data width as configured by
See also
SSIConfigSetExpClk(). For example, if the interface is configured for 8-bit data width, only the lower 8 bits of the value written to pui32Data contain valid data.
Returns
Returns the number of elements read from the SSI receive FIFO.
211 {
212  // Check the arguments.
213  ASSERT(SSIBaseValid(ui32Base));
214 
215  // Check for data to read.
216  if(HWREG(ui32Base + SSI_O_SR) & SSI_SR_RNE)
217  {
218  *pui32Data = HWREG(ui32Base + SSI_O_DR);
219  return(1);
220  }
221  else
222  {
223  return(0);
224  }
225 }
#define ASSERT(expr)
Definition: debug.h:74
void SSIDataPut ( uint32_t  ui32Base,
uint32_t  ui32Data 
)

Puts a data element into the SSI transmit FIFO.

This function places the supplied data into the transmit FIFO of the specified SSI module.

Note
The upper 32 - N bits of the ui32Data are discarded by the hardware, where N is the data width as configured by SSIConfigSetExpClk(). For example, if the interface is configured for 8-bit data width, the upper 24 bits of ui32Data are discarded.
Parameters
ui32Basespecifies the SSI module base address.
ui32Datais the data to be transmitted over the SSI interface.
Returns
None
152 {
153  // Check the arguments.
154  ASSERT(SSIBaseValid(ui32Base));
155  ASSERT((ui32Data & (0xfffffffe << (HWREG(ui32Base + SSI_O_CR0) &
156  SSI_CR0_DSS_M))) == 0);
157 
158  // Wait until there is space.
159  while(!(HWREG(ui32Base + SSI_O_SR) & SSI_SR_TNF))
160  {
161  }
162 
163  // Write the data to the SSI.
164  HWREG(ui32Base + SSI_O_DR) = ui32Data;
165 }
#define ASSERT(expr)
Definition: debug.h:74
int32_t SSIDataPutNonBlocking ( uint32_t  ui32Base,
uint32_t  ui32Data 
)

Puts a data element into the SSI transmit FIFO.

This function places the supplied data into the transmit FIFO of the specified SSI module. If there is no space in the FIFO, then this function returns a zero.

Note
The upper 32 - N bits of the ui32Data are discarded by the hardware, where N is the data width as configured by SSIConfigSetExpClk(). For example, if the interface is configured for 8-bit data width, the upper 24 bits of ui32Data are discarded.
Parameters
ui32Basespecifies the SSI module base address.
ui32Datais the data to be transmitted over the SSI interface.
Returns
Returns the number of elements written to the SSI transmit FIFO.
126 {
127  // Check the arguments.
128  ASSERT(SSIBaseValid(ui32Base));
129  ASSERT((ui32Data & (0xfffffffe << (HWREG(ui32Base + SSI_O_CR0) &
130  SSI_CR0_DSS_M))) == 0);
131 
132  // Check for space to write.
133  if(HWREG(ui32Base + SSI_O_SR) & SSI_SR_TNF)
134  {
135  HWREG(ui32Base + SSI_O_DR) = ui32Data;
136  return(1);
137  }
138  else
139  {
140  return(0);
141  }
142 }
#define ASSERT(expr)
Definition: debug.h:74
static void SSIDisable ( uint32_t  ui32Base)
inlinestatic

Disables the synchronous serial port.

This function disables operation of the synchronous serial port.

Parameters
ui32Basespecifies the SSI module base address.
Returns
None
264 {
265  // Check the arguments.
266  ASSERT(SSIBaseValid(ui32Base));
267 
268  // Read-modify-write the enable bit.
269  HWREG(ui32Base + SSI_O_CR1) &= ~(SSI_CR1_SSE);
270 }
#define ASSERT(expr)
Definition: debug.h:74
static void SSIDMADisable ( uint32_t  ui32Base,
uint32_t  ui32DMAFlags 
)
inlinestatic

Disable SSI DMA operation.

This function is used to disable SSI DMA features that were enabled by SSIDMAEnable(). The specified SSI DMA features are disabled.

Parameters
ui32Baseis the base address of the SSI port.
ui32DMAFlagsis a bit mask of the DMA features to disable. The parameter is the bitwise OR of any of the following values:
Returns
None
634 {
635  // Check the arguments.
636  ASSERT(SSIBaseValid(ui32Base));
637 
638  // Clear the requested bits in the SSI DMA control register.
639  HWREG(ui32Base + SSI_O_DMACR) &= ~ui32DMAFlags;
640 }
#define ASSERT(expr)
Definition: debug.h:74
static void SSIDMAEnable ( uint32_t  ui32Base,
uint32_t  ui32DMAFlags 
)
inlinestatic

Enable SSI DMA operation.

The specified SSI DMA features are enabled. The SSI can be configured to use DMA for transmit and/or receive data transfers.

Note
The uDMA controller must also be set up before DMA can be used with the SSI.
Parameters
ui32Baseis the base address of the SSI port.
ui32DMAFlagsis a bit mask of the DMA features to enable. The parameter is the bitwise OR of any of the following values:
Returns
None
608 {
609  // Check the arguments.
610  ASSERT(SSIBaseValid(ui32Base));
611 
612  // Set the requested bits in the SSI DMA control register.
613  HWREG(ui32Base + SSI_O_DMACR) |= ui32DMAFlags;
614 }
#define ASSERT(expr)
Definition: debug.h:74
static void SSIEnable ( uint32_t  ui32Base)
inlinestatic

Enables the synchronous serial port.

This function enables operation of the synchronous serial port. The synchronous serial port must be configured before it is enabled.

Parameters
ui32Basespecifies the SSI module base address.
Returns
None
243 {
244  // Check the arguments.
245  ASSERT(SSIBaseValid(ui32Base));
246 
247  // Read-modify-write the enable bit.
248  HWREG(ui32Base + SSI_O_CR1) |= SSI_CR1_SSE;
249 }
#define ASSERT(expr)
Definition: debug.h:74
static void SSIIntClear ( uint32_t  ui32Base,
uint32_t  ui32IntFlags 
)
inlinestatic

Clears SSI interrupt sources.

The specified SSI interrupt sources are cleared so that they no longer assert. This function must be called in the interrupt handler to keep the interrupts from being recognized again immediately upon exit.

Note
Due to write buffers and synchronizers in the system it may take several clock cycles from a register write clearing an event in a module and until the event is actually cleared in the NVIC of the system CPU. It is recommended to clear the event source early in the interrupt service routine (ISR) to allow the event clear to propagate to the NVIC before returning from the ISR. At the same time, an early event clear allows new events of the same type to be pended instead of ignored if the event is cleared later in the ISR. It is the responsibility of the programmer to make sure that enough time has passed before returning from the ISR to avoid false re-triggering of the cleared event. A simple, although not necessarily optimal, way of clearing an event before returning from the ISR is:
  1. Write to clear event (interrupt source). (buffered write)
  2. Dummy read from the event source module. (making sure the write has propagated)
  3. Wait two system CPU clock cycles (user code or two NOPs). (allowing cleared event to propagate through any synchronizers)
Parameters
ui32Basespecifies the SSI module base address.
ui32IntFlagsis a bit mask of the interrupt sources to be cleared. The parameter can consist of either or both of:
Returns
None
541 {
542  // Check the arguments.
543  ASSERT(SSIBaseValid(ui32Base));
544 
545  // Clear the requested interrupt sources.
546  HWREG(ui32Base + SSI_O_ICR) = ui32IntFlags;
547 }
#define ASSERT(expr)
Definition: debug.h:74
static void SSIIntDisable ( uint32_t  ui32Base,
uint32_t  ui32IntFlags 
)
inlinestatic

Disables individual SSI interrupt sources.

Disables the indicated SSI interrupt sources.

Parameters
ui32Basespecifies the SSI module base address.
ui32IntFlagsis a bit mask of the interrupt sources to be disabled.
Returns
None
499 {
500  // Check the arguments.
501  ASSERT(SSIBaseValid(ui32Base));
502 
503  // Disable the specified interrupts.
504  HWREG(ui32Base + SSI_O_IMSC) &= ~(ui32IntFlags);
505 }
#define ASSERT(expr)
Definition: debug.h:74
static void SSIIntEnable ( uint32_t  ui32Base,
uint32_t  ui32IntFlags 
)
inlinestatic

Enables individual SSI interrupt sources.

Enables the indicated SSI interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

Parameters
ui32Basespecifies the SSI module base address.
ui32IntFlagsis a bit mask of the interrupt sources to be enabled.
Returns
None
473 {
474  // Check the arguments.
475  ASSERT(SSIBaseValid(ui32Base));
476 
477  // Enable the specified interrupts.
478  HWREG(ui32Base + SSI_O_IMSC) |= ui32IntFlags;
479 }
#define ASSERT(expr)
Definition: debug.h:74
void SSIIntRegister ( uint32_t  ui32Base,
void(*)(void)  pfnHandler 
)

Registers an interrupt handler for the synchronous serial port.

This sets the handler to be called when an SSI interrupt occurs. This will enable the global interrupt in the interrupt controller; specific SSI interrupts must be enabled via SSIIntEnable(). If necessary, it is the interrupt handler's responsibility to clear the interrupt source via SSIIntClear().

Parameters
ui32Basespecifies the SSI module base address.
pfnHandleris a pointer to the function to be called when the synchronous serial port interrupt occurs.
Returns
None
See also
IntRegister() for important information about registering interrupt handlers.

Registers an interrupt handler for the synchronous serial port

Parameters
ui32Basespecifies the SSI module base address.
pfnHandleris a pointer to the function to be called when the synchronous serial port interrupt occurs.

This sets the handler to be called when an SSI interrupt occurs. This will enable the global interrupt in the interrupt controller; specific SSI interrupts must be enabled via SSIIntEnable(). If necessary, it is the interrupt handler's responsibility to clear the interrupt source via SSIIntClear().

See also
IntRegister() for important information about registering interrupt handlers.
Returns
None
249 {
250  uint32_t ui32Int;
251 
252  // Check the arguments.
253  ASSERT(SSIBaseValid(ui32Base));
254 
255  // Determine the interrupt number based on the SSI port.
256  ui32Int = (ui32Base == SSI0_BASE) ? INT_SSI0_COMB : INT_SSI1_COMB;
257 
258  // Register the interrupt handler.
259  IntRegister(ui32Int, pfnHandler);
260 
261  // Enable the synchronous serial port interrupt.
262  IntEnable(ui32Int);
263 }
#define ASSERT(expr)
Definition: debug.h:74
void IntRegister(uint32_t ui32Interrupt, void(*pfnHandler)(void))
Registers a function to be called when an interrupt occurs.
Definition: interrupt.c:150
void IntEnable(uint32_t ui32Interrupt)
Enables an interrupt.
Definition: interrupt.c:280

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static uint32_t SSIIntStatus ( uint32_t  ui32Base,
bool  bMasked 
)
inlinestatic

Gets the current interrupt status.

This function returns the interrupt status for the SSI module. Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor can be returned.

Parameters
ui32Basespecifies the SSI module base address.
bMaskedselects either raw or masked interrupt. false : Raw interrupt status is required. true : Masked interrupt status is required.
Returns
Returns the current interrupt status as an OR'ed combination of:
571 {
572  // Check the arguments.
573  ASSERT(SSIBaseValid(ui32Base));
574 
575  // Return either the interrupt status or the raw interrupt status as
576  // requested.
577  if(bMasked)
578  {
579  return(HWREG(ui32Base + SSI_O_MIS));
580  }
581  else
582  {
583  return(HWREG(ui32Base + SSI_O_RIS));
584  }
585 }
#define ASSERT(expr)
Definition: debug.h:74
void SSIIntUnregister ( uint32_t  ui32Base)

Unregisters an interrupt handler for the synchronous serial port.

This function will clear the handler to be called when a SSI interrupt occurs. This will also mask off the interrupt in the interrupt controller so that the interrupt handler no longer is called.

Parameters
ui32Basespecifies the SSI module base address.
Returns
None
See also
IntRegister() for important information about registering interrupt handlers.

Unregisters an interrupt handler for the synchronous serial port

Parameters
ui32Basespecifies the SSI module base address.

This function will clear the handler to be called when a SSI interrupt occurs. This will also mask off the interrupt in the interrupt controller so that the interrupt handler no longer is called.

See also
IntRegister() for important information about registering interrupt handlers.
Returns
None
283 {
284  uint32_t ui32Int;
285 
286  // Check the arguments.
287  ASSERT(SSIBaseValid(ui32Base));
288 
289  // Determine the interrupt number based on the SSI port.
290  ui32Int = (ui32Base == SSI0_BASE) ? INT_SSI0_COMB : INT_SSI1_COMB;
291 
292  // Disable the interrupt.
293  IntDisable(ui32Int);
294 
295  // Unregister the interrupt handler.
296  IntUnregister(ui32Int);
297 }
#define ASSERT(expr)
Definition: debug.h:74
void IntUnregister(uint32_t ui32Interrupt)
Unregisters the function to be called when an interrupt occurs.
Definition: interrupt.c:186
void IntDisable(uint32_t ui32Interrupt)
Disables an interrupt.
Definition: interrupt.c:324

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static uint32_t SSIStatus ( uint32_t  ui32Base)
inlinestatic

Get the status of the SSI data buffers.

This function is used to poll the status of the internal FIFOs in the SSI module. The status of both TX and RX FIFO is returned.

Parameters
ui32Basespecifies the SSI module base address.
Returns
Returns the current status of the internal SSI data buffers. The status is a bitwise OR'ed combination of:
405 {
406  // Check the arguments.
407  ASSERT(SSIBaseValid(ui32Base));
408 
409  // Return the status
410  return (HWREG(ui32Base + SSI_O_SR) & SSI_STATUS_MASK);
411 }
#define ASSERT(expr)
Definition: debug.h:74
#define SSI_STATUS_MASK
Definition: ssi.h:114

Macro Definition Documentation

#define SSI_DMA_RX   0x00000001
#define SSI_DMA_TX   0x00000002
#define SSI_FRF_MOTO_MODE_0   0x00000000

Referenced by SSIConfigSetExpClk().

#define SSI_FRF_MOTO_MODE_1   0x00000002

Referenced by SSIConfigSetExpClk().

#define SSI_FRF_MOTO_MODE_2   0x00000001

Referenced by SSIConfigSetExpClk().

#define SSI_FRF_MOTO_MODE_3   0x00000003

Referenced by SSIConfigSetExpClk().

#define SSI_FRF_NMW   0x00000020

Referenced by SSIConfigSetExpClk().

#define SSI_FRF_TI   0x00000010

Referenced by SSIConfigSetExpClk().

#define SSI_MODE_MASTER   0x00000000

Referenced by SSIConfigSetExpClk().

#define SSI_MODE_SLAVE   0x00000001

Referenced by SSIConfigSetExpClk().

#define SSI_MODE_SLAVE_OD   0x00000002

Referenced by SSIConfigSetExpClk().

#define SSI_RX_FULL   0x00000008
#define SSI_RX_NOT_EMPTY   0x00000004
#define SSI_RXFF   0x00000004
#define SSI_RXOR   0x00000001
#define SSI_RXTO   0x00000002
#define SSI_STATUS_MASK   0x0000000F

Referenced by SSIStatus().

#define SSI_TX_EMPTY   0x00000001
#define SSI_TX_NOT_FULL   0x00000002
#define SSI_TXFF   0x00000008