SPICC32XXDMA.h

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/*
 * Copyright (c) 2015-2016, Texas Instruments Incorporated
 * All rights reserved.
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/*!*****************************************************************************
 *  @file       SPICC32XXDMA.h
 *
 *  @brief      SPI driver implementation for a CC32XX SPI controller using the
 *              micro DMA controller.
 *
 *  The SPI header file should be included in an application as follows:
 *  @code
 *  #include <ti/drivers/SPI.h>
 *  #include <ti/drivers/spi/SPICC32XXDMA.h>
 *  @endcode
 *
 *  Refer to @ref SPI.h for a complete description of APIs & example of use.
 *
 *  This SPI driver implementation is designed to operate on a CC32XX SPI
 *  controller using a micro DMA controller.
 *
 *  ## SPI Chip Select #
 *  This SPI controller supports a hardware chip select pin. Refer to the
 *  device's user manual on how this hardware chip select pin behaves in regards
 *  to the SPI frame format.
 *
 *  <table>
 *  <tr>
 *  <th>Chip select type</th>
 *  <th>SPI_MASTER mode</th>
 *  <th>SPI_SLAVE mode</th>
 *  </tr>
 *  <tr>
 *  <td>Hardware chip select</td>
 *  <td>No action is needed by the application to select the peripheral.</td>
 *  <td>See the device documentation on it's chip select requirements.</td>
 *  </tr>
 *  <tr>
 *  <td>Software chip select</td>
 *  <td>The application is responsible to ensure that correct SPI slave is
 *      selected before performing a SPI_transfer().</td>
 *  <td>See the device documentation on it's chip select requirements.</td>
 *  </tr>
 *  </table>
 *
 *  ## DMA Interrupts #
 *  This driver is designed to operate with the micro DMA. The micro DMA
 *  generates an IRQ on the perpheral's interrupt vector. This implementation
 *  automatically installs a DMA aware hardware ISR to service the assigned
 *  micro DMA channels.
 *
 *  ## SPI data frames #
 *  SPI data frames can be any size from 4-bits to 32-bits.  The SPI data
 *  frame size is set in ::SPI_Params.dataSize passed to SPI_open.
 *  The SPICC32XXDMA driver implementation makes assumptions on the element
 *  size of the ::SPI_Transaction txBuf and rxBuf arrays, based on the data
 *  frame size.  If the data frame size is less than or equal to 8 bits,
 *  txBuf and rxBuf are assumed to be arrays of 8-bit uint8_t elements.
 *  If the data frame size is greater than 8 bits, but less than or equal
 *  to 16 bits, txBuf and rxBuf are assumed to be arrays of 16-bit uint16_t
 *  elements.  Otherwise, txBuf and rxBuf are assumed to point to 32-bit
 *  uint32_t elements.
 *
 *  data frame size  | buffer element size |
 *  --------------   | ------------------- |
 *  4-8 bits         | uint8_t             |
 *  9-16 bits        | uint16_t            |
 *  16-32 bits       | uint32_t            |
 *
 *  ## DMA transfer size limit #
 *  The micro DMA controller only supports data transfers of up to 1024
 *  data frames. A data frame can be 4 to 32 bits in length.
 *
 *  ## DMA accessible memory #
 *  As this driver uses uDMA to transfer data/from data buffers, it is the
 *  responsibility of the application to ensure that these buffers reside in
 *  memory that is accessible by the DMA.
 *
 *******************************************************************************
 */

#ifndef ti_drivers_spi_SPICC32XXDMA__include
#define ti_drivers_spi_SPICC32XXDMA__include

#ifdef __cplusplus
extern "C" {
#endif

#include <ti/drivers/dpl/HwiP.h>
#include <ti/drivers/dpl/SemaphoreP.h>
#include <ti/drivers/Power.h>
#include <ti/drivers/SPI.h>
#include <ti/drivers/dma/UDMACC32XX.h>

/* Add SPICC32XXDMA_STATUS_* macros here */

/* Add SPICC32XXDMA_CMD_* macros here */

#define SPICC32XXDMA_PIN_05_CLK     0x0704
#define SPICC32XXDMA_PIN_06_MISO    0x0705
#define SPICC32XXDMA_PIN_07_MOSI    0x0706
#define SPICC32XXDMA_PIN_08_CS      0x0707
#define SPICC32XXDMA_PIN_45_CLK     0x072C
#define SPICC32XXDMA_PIN_50_CS      0x0931
#define SPICC32XXDMA_PIN_52_MOSI    0x0833
#define SPICC32XXDMA_PIN_53_MISO    0x0734

#define SPICC32XXDMA_PIN_NO_CONFIG  0xFFFF


typedef unsigned long SPIBaseAddrType;
typedef unsigned long SPIDataType;

/* SPI function table pointer */
extern const SPI_FxnTable SPICC32XXDMA_fxnTable;

typedef enum SPICC32XXDMA_FrameSize {
    SPICC32XXDMA_8bit  = 0,
    SPICC32XXDMA_16bit = 1,
    SPICC32XXDMA_32bit = 2
} SPICC32XXDMA_FrameSize;

typedef struct SPICC32XXDMA_HWAttrsV1 {
    SPIBaseAddrType   baseAddr;

    uint32_t   intNum;

    uint32_t   intPriority;

    uint32_t   spiPRCM;

    uint32_t   csControl;

    uint32_t   csPolarity;

    uint32_t   pinMode;

    uint32_t   turboMode;

    uint32_t  *scratchBufPtr;

    unsigned long   defaultTxBufValue;

    uint32_t   rxChannelIndex;

    uint32_t   txChannelIndex;

    uint32_t   minDmaTransferSize;

    uint16_t   mosiPin;

    uint16_t   misoPin;

    uint16_t   clkPin;

    uint16_t   csPin;
} SPICC32XXDMA_HWAttrsV1;

typedef struct SPICC32XXDMA_Object {
    HwiP_Handle            hwiHandle;
    SemaphoreP_Handle      transferComplete;

    Power_NotifyObj        notifyObj;
    unsigned int           powerMgrId;

    uint32_t               bitRate;        
    uint32_t               dataSize;       
    SPI_CallbackFxn        transferCallbackFxn;
    SPI_Transaction       *transaction;

    void                 (*spiPollingFxn) (uint32_t baseAddr, void *rx,
                                   void *tx, uint8_t rxInc, uint8_t txInc,
                               size_t count);

    uint8_t                rxFifoTrigger;
    uint8_t                txFifoTrigger;
    SPI_Mode               spiMode;
    SPI_TransferMode       transferMode;
    SPI_FrameFormat        frameFormat;    
    SPICC32XXDMA_FrameSize frameSize;

    bool                   isOpen;

    /* UDMA */
    UDMACC32XX_Handle      dmaHandle;
} SPICC32XXDMA_Object, *SPICC32XXDMA_Handle;

#ifdef __cplusplus
}
#endif

#endif /* ti_drivers_spi_SPICC32XXDMA__include */