EDMA3_DRV_GblXbarToChanConfigParams Struct Reference
[EDMA3 Driver Advanced APIs]

Init-time Configuration structure for EDMA3 controller, to provide Global SoC specific Information. More...

#include <edma3_drv.h>

Data Fields
int32_t	dmaMapXbarToChan [EDMA3_DRV_MAX_XBAR_EVENTS]
	Mapping from DMA channels to Hardware Events.

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Detailed Description

Init-time Configuration structure for EDMA3 controller, to provide Global SoC specific Information.

This configuration structure is used to specify the EDMA3 Driver global settings, specific to the SoC. This configuraion structure provides the details of the mapping of cross bar events to available channels. This configuration information is SoC specific and could be provided by the user at run-time while creating the EDMA3 Driver Object, using API EDMA3_DRV_initXbarEventMap. In case user doesn't provide it, this information could be taken from the SoC specific configuration file edma3_<SOC_NAME>_cfg.c, incase it is available.

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Field Documentation

int32_t EDMA3_DRV_GblXbarToChanConfigParams::dmaMapXbarToChan[EDMA3_DRV_MAX_XBAR_EVENTS]

Mapping from DMA channels to Hardware Events.

Each element in this array corresponds to one cross bar event and tells whether this event is mapped to any DMA channel. That is whether any free or unused DMA channel can be mapped to this event. -1 means the cross bar event is not mapped to any DMA channel; Any number from 0 to 63 means this event is mapped to specified channel. All channels need not be mapped, some can be free also. For the cross bar event mapped to DMA channel, appropriate Control Config register of TPCC event mux register should be configured.

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The documentation for this struct was generated from the following file:

• edma3_drv.h