i2c.h

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/******************************************************************************
*  Filename:       i2c.h
*  Revised:        2015-09-21 15:19:36 +0200 (Mon, 21 Sep 2015)
*  Revision:       44629
*
*  Description:    Defines and prototypes for the I2C.
*
*  Copyright (c) 2015, Texas Instruments Incorporated
*  All rights reserved.
*
*  Redistribution and use in source and binary forms, with or without
*  modification, are permitted provided that the following conditions are met:
*
*  1) Redistributions of source code must retain the above copyright notice,
*     this list of conditions and the following disclaimer.
*
*  2) Redistributions in binary form must reproduce the above copyright notice,
*     this list of conditions and the following disclaimer in the documentation
*     and/or other materials provided with the distribution.
*
*  3) Neither the name of the ORGANIZATION nor the names of its contributors may
*     be used to endorse or promote products derived from this software without
*     specific prior written permission.
*
*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
*  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
*  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
*  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
*  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
*  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
*  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
*  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
*  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
*  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
*  POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/

//*****************************************************************************
//
//
//*****************************************************************************

#ifndef __I2C_H__
#define __I2C_H__

//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif

#include <stdbool.h>
#include <stdint.h>
#include <inc/hw_types.h>
#include <inc/hw_ints.h>
#include <inc/hw_memmap.h>
#include <inc/hw_i2c.h>
#include <inc/hw_sysctl.h>
#include <driverlib/debug.h>
#include <driverlib/interrupt.h>
#include <driverlib/cpu.h>

//*****************************************************************************
//
// Support for DriverLib in ROM:
// This section renames all functions that are not "static inline", so that
// calling these functions will default to implementation in flash. At the end
// of this file a second renaming will change the defaults to implementation in
// ROM for available functions.
//
// To force use of the implementation in flash, e.g. for debugging:
// - Globally: Define DRIVERLIB_NOROM at project level
// - Per function: Use prefix "NOROM_" when calling the function
//
//*****************************************************************************
#if !defined(DOXYGEN)
    #define I2CMasterInitExpClk             NOROM_I2CMasterInitExpClk
    #define I2CMasterErr                    NOROM_I2CMasterErr
    #define I2CIntRegister                  NOROM_I2CIntRegister
    #define I2CIntUnregister                NOROM_I2CIntUnregister
#endif

//*****************************************************************************
//
// I2C Master commands
//
//*****************************************************************************
#define I2C_MASTER_CMD_SINGLE_SEND                                            \
                                0x00000007
#define I2C_MASTER_CMD_SINGLE_RECEIVE                                         \
                                0x00000007
#define I2C_MASTER_CMD_BURST_SEND_START                                       \
                                0x00000003
#define I2C_MASTER_CMD_BURST_SEND_CONT                                        \
                                0x00000001
#define I2C_MASTER_CMD_BURST_SEND_FINISH                                      \
                                0x00000005
#define I2C_MASTER_CMD_BURST_SEND_ERROR_STOP                                  \
                                0x00000004
#define I2C_MASTER_CMD_BURST_RECEIVE_START                                    \
                                0x0000000b
#define I2C_MASTER_CMD_BURST_RECEIVE_CONT                                     \
                                0x00000009
#define I2C_MASTER_CMD_BURST_RECEIVE_FINISH                                   \
                                0x00000005
#define I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP                               \
                                0x00000004

//*****************************************************************************
//
// I2C Master error status
//
//*****************************************************************************
#define I2C_MASTER_ERR_NONE     0
#define I2C_MASTER_ERR_ADDR_ACK 0x00000004
#define I2C_MASTER_ERR_DATA_ACK 0x00000008
#define I2C_MASTER_ERR_ARB_LOST 0x00000010

//*****************************************************************************
//
// I2C Slave action requests
//
//*****************************************************************************
#define I2C_SLAVE_ACT_NONE      0
#define I2C_SLAVE_ACT_RREQ      0x00000001  // Master has sent data
#define I2C_SLAVE_ACT_TREQ      0x00000002  // Master has requested data
#define I2C_SLAVE_ACT_RREQ_FBR  0x00000005  // Master has sent first byte

//*****************************************************************************
//
// I2C Slave interrupts
//
//*****************************************************************************
#define I2C_SLAVE_INT_STOP      0x00000004  // Stop Condition Interrupt.
#define I2C_SLAVE_INT_START     0x00000002  // Start Condition Interrupt.
#define I2C_SLAVE_INT_DATA      0x00000001  // Data Interrupt.

//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************

#ifdef DRIVERLIB_DEBUG
//*****************************************************************************
//
//
//*****************************************************************************
static bool
I2CBaseValid(uint32_t ui32Base)
{
    return(ui32Base == I2C0_BASE);
}
#endif

//*****************************************************************************
//
//
//*****************************************************************************
extern void I2CMasterInitExpClk(uint32_t ui32Base, uint32_t ui32I2CClk,
                                bool bFast);

//*****************************************************************************
//
//
//*****************************************************************************
__STATIC_INLINE void
I2CMasterControl(uint32_t ui32Base, uint32_t ui32Cmd)
{
    //
    // Check the arguments.
    //
    ASSERT(I2CBaseValid(ui32Base));
    ASSERT((ui32Cmd == I2C_MASTER_CMD_SINGLE_SEND) ||
    //     (ui32Cmd == I2C_MASTER_CMD_SINGLE_RECEIVE) || -> Equal to SINGLE_SEND
           (ui32Cmd == I2C_MASTER_CMD_BURST_SEND_START) ||
           (ui32Cmd == I2C_MASTER_CMD_BURST_SEND_CONT) ||
           (ui32Cmd == I2C_MASTER_CMD_BURST_SEND_FINISH) ||
           (ui32Cmd == I2C_MASTER_CMD_BURST_SEND_ERROR_STOP) ||
           (ui32Cmd == I2C_MASTER_CMD_BURST_RECEIVE_START) ||
           (ui32Cmd == I2C_MASTER_CMD_BURST_RECEIVE_CONT) ||
           (ui32Cmd == I2C_MASTER_CMD_BURST_RECEIVE_FINISH) ||
           (ui32Cmd == I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP));

    //
    // Send the command.
    //
    HWREG(I2C0_BASE + I2C_O_MCTRL) = ui32Cmd;

    //
    // Delay minimum four cycles in order to ensure that the I2C_O_MSTAT
    // register has been correctly updated before function exit
    //
    CPUdelay(2);
}

//*****************************************************************************
//
//
//*****************************************************************************
__STATIC_INLINE void
I2CMasterSlaveAddrSet(uint32_t ui32Base, uint8_t ui8SlaveAddr,
                      bool bReceive)
{
    //
    // Check the arguments.
    //
    ASSERT(I2CBaseValid(ui32Base));
    ASSERT(!(ui8SlaveAddr & 0x80));

    //
    // Set the address of the slave with which the master will communicate.
    //
    HWREG(I2C0_BASE + I2C_O_MSA) = (ui8SlaveAddr << 1) | bReceive;
}

//*****************************************************************************
//
//
//*****************************************************************************
__STATIC_INLINE void
I2CMasterEnable(uint32_t ui32Base)
{
    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));

    // Enable the clock for the master.
    HWREGBITW(I2C0_BASE + I2C_O_MCR, I2C_MCR_MFE_BITN) = 1;

    // Enable the master block.
    HWREG(I2C0_BASE + I2C_O_MCTRL) = I2C_MCTRL_RUN;
}

//*****************************************************************************
//
//
//*****************************************************************************
__STATIC_INLINE void
I2CMasterDisable(uint32_t ui32Base)
{
    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));

    // Disable the master block.
    HWREG(I2C0_BASE + I2C_O_MCTRL) = 0;

    // Disable the clock for the master.
    HWREGBITW(I2C0_BASE + I2C_O_MCR, I2C_MCR_MFE_BITN) = 0;
}

//*****************************************************************************
//
//
//*****************************************************************************
__STATIC_INLINE bool
I2CMasterBusy(uint32_t ui32Base)
{
    //
    // Check the arguments.
    //
    ASSERT(I2CBaseValid(ui32Base));

    //
    // Return the busy status.
    //
    if(HWREG(I2C0_BASE + I2C_O_MSTAT) & I2C_MSTAT_BUSY)
    {
        return(true);
    }
    else
    {
        return(false);
    }
}

//*****************************************************************************
//
//
//*****************************************************************************
__STATIC_INLINE bool
I2CMasterBusBusy(uint32_t ui32Base)
{
    //
    // Check the arguments.
    //
    ASSERT(I2CBaseValid(ui32Base));

    //
    // Return the bus busy status.
    //
    if(HWREG(I2C0_BASE + I2C_O_MSTAT) & I2C_MSTAT_BUSBSY)
    {
        return(true);
    }
    else
    {
        return(false);
    }
}

//*****************************************************************************
//
//
//*****************************************************************************
__STATIC_INLINE uint32_t
I2CMasterDataGet(uint32_t ui32Base)
{
    //
    // Check the arguments.
    //
    ASSERT(I2CBaseValid(ui32Base));

    //
    // Read a byte.
    //
    return(HWREG(I2C0_BASE + I2C_O_MDR));
}

//*****************************************************************************
//
//
//*****************************************************************************
__STATIC_INLINE void
I2CMasterDataPut(uint32_t ui32Base, uint8_t ui8Data)
{
    //
    // Check the arguments.
    //
    ASSERT(I2CBaseValid(ui32Base));

    //
    // Write the byte.
    //
    HWREG(I2C0_BASE + I2C_O_MDR) = ui8Data;
}

//*****************************************************************************
//
//
//*****************************************************************************
extern uint32_t I2CMasterErr(uint32_t ui32Base);

//*****************************************************************************
//
//
//*****************************************************************************
__STATIC_INLINE void
I2CMasterIntEnable(uint32_t ui32Base)
{
    //
    // Check the arguments.
    //
    ASSERT(I2CBaseValid(ui32Base));

    //
    // Enable the master interrupt.
    //
    HWREG(I2C0_BASE + I2C_O_MIMR) = I2C_MIMR_IM;
}

//*****************************************************************************
//
//
//*****************************************************************************
__STATIC_INLINE void
I2CMasterIntDisable(uint32_t ui32Base)
{
    //
    // Check the arguments.
    //
    ASSERT(I2CBaseValid(ui32Base));

    //
    // Disable the master interrupt.
    //
    HWREG(I2C0_BASE + I2C_O_MIMR) = 0;
}

//*****************************************************************************
//
//
//*****************************************************************************
__STATIC_INLINE void
I2CMasterIntClear(uint32_t ui32Base)
{
    //
    // Check the arguments.
    //
    ASSERT(I2CBaseValid(ui32Base));

    //
    // Clear the I2C master interrupt source.
    //
    HWREG(I2C0_BASE + I2C_O_MICR) = I2C_MICR_IC;
}

//*****************************************************************************
//
//
//*****************************************************************************
__STATIC_INLINE bool
I2CMasterIntStatus(uint32_t ui32Base, bool bMasked)
{
    //
    // Check the arguments.
    //
    ASSERT(I2CBaseValid(ui32Base));

    //
    // Return either the interrupt status or the raw interrupt status as
    // requested.
    //
    if(bMasked)
    {
        return((HWREG(I2C0_BASE + I2C_O_MMIS)) ? true : false);
    }
    else
    {
        return((HWREG(I2C0_BASE + I2C_O_MRIS)) ? true : false);
    }
}

//*****************************************************************************
//
//
//*****************************************************************************
__STATIC_INLINE void
I2CSlaveEnable(uint32_t ui32Base)
{
    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));

    // Enable the clock to the slave block.
    HWREGBITW(I2C0_BASE + I2C_O_MCR, I2C_MCR_SFE_BITN) = 1;

    // Enable the slave.
    HWREG(I2C0_BASE + I2C_O_SCTL) = I2C_SCTL_DA;
}

//*****************************************************************************
//
//
//*****************************************************************************
__STATIC_INLINE void
I2CSlaveInit(uint32_t ui32Base, uint8_t ui8SlaveAddr)
{
    //
    // Check the arguments.
    //
    ASSERT(I2CBaseValid(ui32Base));
    ASSERT(!(ui8SlaveAddr & 0x80));

    //
    // Must enable the device before doing anything else.
    //
    I2CSlaveEnable(I2C0_BASE);

    //
    // Set up the slave address.
    //
    HWREG(I2C0_BASE + I2C_O_SOAR) = ui8SlaveAddr;
}

//*****************************************************************************
//
//
//*****************************************************************************
__STATIC_INLINE void
I2CSlaveAddressSet(uint32_t ui32Base, uint8_t ui8SlaveAddr)
{
    //
    // Check the arguments.
    //
    ASSERT(I2CBaseValid(ui32Base));
    ASSERT(!(ui8SlaveAddr & 0x80));

    //
    // Set up the primary slave address.
    //
    HWREG(I2C0_BASE + I2C_O_SOAR) = ui8SlaveAddr;
}

//*****************************************************************************
//
//
//*****************************************************************************
__STATIC_INLINE void
I2CSlaveDisable(uint32_t ui32Base)
{
    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));

    // Disable the slave.
    HWREG(I2C0_BASE + I2C_O_SCTL) = 0x0;

    // Disable the clock to the slave block.
    HWREGBITW(I2C0_BASE + I2C_O_MCR, I2C_MCR_SFE_BITN) = 0;
}

//*****************************************************************************
//
//
//*****************************************************************************
__STATIC_INLINE uint32_t
I2CSlaveStatus(uint32_t ui32Base)
{
    //
    // Check the arguments.
    //
    ASSERT(I2CBaseValid(ui32Base));

    //
    // Return the slave status.
    //
    return(HWREG(I2C0_BASE + I2C_O_SSTAT));
}

//*****************************************************************************
//
//
//*****************************************************************************
__STATIC_INLINE uint32_t
I2CSlaveDataGet(uint32_t ui32Base)
{
    //
    // Check the arguments.
    //
    ASSERT(I2CBaseValid(ui32Base));

    //
    // Read a byte.
    //
    return(HWREG(I2C0_BASE + I2C_O_SDR));
}

//*****************************************************************************
//
//
//*****************************************************************************
__STATIC_INLINE void
I2CSlaveDataPut(uint32_t ui32Base, uint8_t ui8Data)
{
    //
    // Check the arguments.
    //
    ASSERT(I2CBaseValid(ui32Base));

    //
    // Write the byte.
    //
    HWREG(I2C0_BASE + I2C_O_SDR) = ui8Data;
}

//*****************************************************************************
//
//
//*****************************************************************************
__STATIC_INLINE void
I2CSlaveIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags)
{
    uint32_t ui32Val;

    //
    // Check the arguments.
    //
    ASSERT(I2CBaseValid(ui32Base));
    ASSERT(ui32IntFlags & (I2C_SLAVE_INT_STOP | I2C_SLAVE_INT_START |
                           I2C_SLAVE_INT_DATA));

    //
    // Enable the slave interrupt.
    //
    ui32Val = HWREG(I2C0_BASE + I2C_O_SIMR);
    ui32Val |= ui32IntFlags;
    HWREG(I2C0_BASE + I2C_O_SIMR) = ui32Val;
}

//*****************************************************************************
//
//
//*****************************************************************************
__STATIC_INLINE void
I2CSlaveIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags)
{
    uint32_t ui32Val;

    //
    // Check the arguments.
    //
    ASSERT(I2CBaseValid(ui32Base));
    ASSERT(ui32IntFlags & (I2C_SLAVE_INT_STOP | I2C_SLAVE_INT_START |
                           I2C_SLAVE_INT_DATA));

    //
    // Disable the slave interrupt.
    //
    ui32Val = HWREG(I2C0_BASE + I2C_O_SIMR);
    ui32Val &= ~ui32IntFlags;
    HWREG(I2C0_BASE + I2C_O_SIMR) = ui32Val;
}

//*****************************************************************************
//
//
//*****************************************************************************
__STATIC_INLINE void
I2CSlaveIntClear(uint32_t ui32Base, uint32_t ui32IntFlags)
{
    //
    // Check the arguments.
    //
    ASSERT(I2CBaseValid(ui32Base));

    //
    // Clear the I2C slave interrupt source.
    //
    HWREG(I2C0_BASE + I2C_O_SICR) = ui32IntFlags;
}

//*****************************************************************************
//

//
//*****************************************************************************
__STATIC_INLINE uint32_t
I2CSlaveIntStatus(uint32_t ui32Base, bool bMasked)
{
    //
    // Check the arguments.
    //
    ASSERT(I2CBaseValid(ui32Base));

    //
    // Return either the interrupt status or the raw interrupt status as
    // requested.
    //
    if(bMasked)
    {
        return(HWREG(I2C0_BASE + I2C_O_SMIS));
    }
    else
    {
        return(HWREG(I2C0_BASE + I2C_O_SRIS));
    }
}

//*****************************************************************************
//
//
//*****************************************************************************
extern void I2CIntRegister(uint32_t ui32Base, void (*pfnHandler)(void));

//*****************************************************************************
//
//
//*****************************************************************************
extern void I2CIntUnregister(uint32_t ui32Base);

//*****************************************************************************
//
// Support for DriverLib in ROM:
// Redirect to implementation in ROM when available.
//
//*****************************************************************************
#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
    #include <driverlib/rom.h>
    #ifdef ROM_I2CMasterInitExpClk
        #undef  I2CMasterInitExpClk
        #define I2CMasterInitExpClk             ROM_I2CMasterInitExpClk
    #endif
    #ifdef ROM_I2CMasterErr
        #undef  I2CMasterErr
        #define I2CMasterErr                    ROM_I2CMasterErr
    #endif
    #ifdef ROM_I2CIntRegister
        #undef  I2CIntRegister
        #define I2CIntRegister                  ROM_I2CIntRegister
    #endif
    #ifdef ROM_I2CIntUnregister
        #undef  I2CIntUnregister
        #define I2CIntUnregister                ROM_I2CIntUnregister
    #endif
#endif

//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif

#endif // __I2C_H__

//*****************************************************************************
//
//
//*****************************************************************************