AM65X_SR2 Board Configuration Resource Assignment Type Descriptions

Introduction

This chapter provides information of Board Configuration resource assignment type IDs that are permitted in the AM65X_SR2 SoC. The resource type IDs represent AM65X_SR2 resources ranges assignable to SoC processing entities (or PEs).

WARNING: System Firmware RM currently supports a maximum of 260 RM board configuration resource assignment ranges on the AM65X_SR2 SoC. Sending more entries than the maximum will result in the RM board configuration being NACK’d

Device Name Device ID (10-bits) Subtype Name Subtype ID (6-bits) Unique Type ID (16-bits) Resource Range Start Resource Range Number
AM6_DEV_CMPEVENT_INTRTR0 0x003 RESASG_SUBTYPE_IR_OUTPUT 0x00 0x00C0 0 32
AM6_DEV_MAIN2MCU_LVL_INTRTR0 0x061 RESASG_SUBTYPE_IR_OUTPUT 0x00 0x1840 0 64
AM6_DEV_MAIN2MCU_PLS_INTRTR0 0x062 RESASG_SUBTYPE_IR_OUTPUT 0x00 0x1880 0 48
AM6_DEV_GPIOMUX_INTRTR0 0x064 RESASG_SUBTYPE_IR_OUTPUT 0x00 0x1900 0 32
AM6_DEV_TIMESYNC_INTRTR0 0x091 RESASG_SUBTYPE_IR_OUTPUT 0x00 0x2440 0 40
AM6_DEV_WKUP_GPIOMUX_INTRTR0 0x09C RESASG_SUBTYPE_IR_OUTPUT 0x00 0x2700 0 16
AM6_DEV_NAVSS0_UDMASS_INTA0 0x0B3 RESASG_SUBTYPE_IA_VINT 0x0A 0x2CCA 16 240
    RESASG_SUBTYPE_GLOBAL_EVENT_SEVT 0x0D 0x2CCD 16 4592
AM6_DEV_NAVSS0_MODSS_INTA0 0x0B4 RESASG_SUBTYPE_IA_VINT 0x0A 0x2D0A 0 64
    RESASG_SUBTYPE_GLOBAL_EVENT_SEVT 0x0D 0x2D0D 20480 1024
AM6_DEV_NAVSS0_MODSS_INTA1 0x0B5 RESASG_SUBTYPE_IA_VINT 0x0A 0x2D4A 0 64
    RESASG_SUBTYPE_GLOBAL_EVENT_SEVT 0x0D 0x2D4D 22528 1024
AM6_DEV_NAVSS0_INTR_ROUTER_0 0x0B6 RESASG_SUBTYPE_IR_OUTPUT 0x00 0x2D80 16 136
AM6_DEV_NAVSS0_PROXY0 0x0B9 RESASG_SUBTYPE_PROXY_PROXIES 0x00 0x2E40 1 63
AM6_DEV_NAVSS0_RINGACC0 0x0BB RESASG_SUBTYPE_RA_ERROR_OES 0x00 0x2EC0 0 1
    RESASG_SUBTYPE_RA_GP 0x01 0x2EC1 304 464
    RESASG_SUBTYPE_RA_UDMAP_RX 0x02 0x2EC2 160 142
    RESASG_SUBTYPE_RA_UDMAP_TX 0x03 0x2EC3 8 112
    RESASG_SUBTYPE_RA_UDMAP_TX_EXT 0x04 0x2EC4 120 32
    RESASG_SUBTYPE_RA_UDMAP_RX_H 0x05 0x2EC5 154 6
    RESASG_SUBTYPE_RA_UDMAP_TX_H 0x07 0x2EC7 1 7
    RESASG_SUBTYPE_RA_VIRTID 0x0A 0x2ECA 0 4096
    RESASG_SUBTYPE_RA_MONITORS 0x0B 0x2ECB 0 32
AM6_DEV_NAVSS0_UDMAP0 0x0BC RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON 0x00 0x2F00 150 150
    RESASG_SUBTYPE_UDMAP_INVALID_FLOW_OES 0x01 0x2F01 0 1
    RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER 0x02 0x2F02 49152 1024
    RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG 0x03 0x2F03 0 1
    RESASG_SUBTYPE_UDMAP_RX_CHAN 0x0A 0x2F0A 8 142
    RESASG_SUBTYPE_UDMAP_RX_HCHAN 0x0B 0x2F0B 2 6
    RESASG_SUBTYPE_UDMAP_TX_CHAN 0x0D 0x2F0D 8 112
    RESASG_SUBTYPE_UDMAP_TX_ECHAN 0x0E 0x2F0E 120 32
    RESASG_SUBTYPE_UDMAP_TX_HCHAN 0x0F 0x2F0F 1 7
AM6_DEV_MCU_NAVSS0_INTR_AGGR_0 0x0BD RESASG_SUBTYPE_IA_VINT 0x0A 0x2F4A 8 248
    RESASG_SUBTYPE_GLOBAL_EVENT_SEVT 0x0D 0x2F4D 16392 1528
AM6_DEV_MCU_NAVSS0_INTR_ROUTER_0 0x0BE RESASG_SUBTYPE_IR_OUTPUT 0x00 0x2F80 4 28
          36 28
AM6_DEV_MCU_NAVSS0_PROXY0 0x0BF RESASG_SUBTYPE_PROXY_PROXIES 0x00 0x2FC0 0 64
AM6_DEV_MCU_NAVSS0_UDMAP0 0x0C2 RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON 0x00 0x3080 48 48
    RESASG_SUBTYPE_UDMAP_INVALID_FLOW_OES 0x01 0x3081 0 1
    RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER 0x02 0x3082 56320 256
    RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG 0x03 0x3083 0 1
    RESASG_SUBTYPE_UDMAP_RX_CHAN 0x0A 0x308A 2 46
    RESASG_SUBTYPE_UDMAP_RX_HCHAN 0x0B 0x308B 0 2
    RESASG_SUBTYPE_UDMAP_TX_CHAN 0x0D 0x308D 2 46
    RESASG_SUBTYPE_UDMAP_TX_HCHAN 0x0F 0x308F 0 2
AM6_DEV_MCU_NAVSS0_RINGACC0 0x0C3 RESASG_SUBTYPE_RA_ERROR_OES 0x00 0x30C0 0 1
    RESASG_SUBTYPE_RA_GP 0x01 0x30C1 96 160
    RESASG_SUBTYPE_RA_UDMAP_RX 0x02 0x30C2 50 46
    RESASG_SUBTYPE_RA_UDMAP_TX 0x03 0x30C3 2 46
    RESASG_SUBTYPE_RA_UDMAP_RX_H 0x05 0x30C5 48 2
    RESASG_SUBTYPE_RA_UDMAP_TX_H 0x07 0x30C7 0 2
    RESASG_SUBTYPE_RA_VIRTID 0x0A 0x30CA 0 4096
    RESASG_SUBTYPE_RA_MONITORS 0x0B 0x30CB 0 32