Resource Management PSI-L TISCI Message Description¶
Introduction¶
This chapter provides information on usage of the RM PSI-L management TISCI message API parameters.
TISCI Message ID | Message Name |
---|---|
0x1280 | TISCI_MSG_RM_PSIL_PAIR |
0x1281 | TISCI_MSG_RM_PSIL_UNPAIR |
0x1282 | TISCI_MSG_RM_PSIL_READ |
0x1283 | TISCI_MSG_RM_PSIL_WRITE |
TISCI_MSG_RM_PSIL_PAIR - PSI-L Pair¶
The psil pair TISCI message API is used to pair a SoC Navigator Subsystem source thread to a destination thread. Pairing the threads enables both threads and the source thread’s registers are programmed using the destination thread’s thread width and credit count capabilities. UDMAP channels mapped to PSI-L source and destination threads in the pair request will have their THRD_ID register programmed with the remote thread ID value.
The host requesting a psil pair operation for threads mapped to UDMAP channels must be the owner, or the supervisor of the host owning, the UDMAP channels. Therefore, psil pair operations for UDMAP mapped threads must take place after the channel(s) are allocated and configured. For threads not mapped to UDMAP channels, the host requesting the psil pair operation must have access through the region firewall covering the entity to which the thread is mapped.
The psil pair API can be used to pair source and destination threads within any Navigator Subsystem on the device.
Usage¶
Message Type | Normal |
Secure Queue Only? | No |
TISCI Message ID¶
TISCI_MSG_RM_PSIL_PAIR (0x1280U)
RM TISCI message to pair PSI-L source and destination threads
PSI-L Pair Message Parameters¶
struct tisci_msg_rm_psil_pair_req
Pairs a PSI-L source thread to a destination thread
Parameter | Type | Description |
---|---|---|
hdr | struct tisci_header | Standard TISCI header |
nav_id | u32 | SoC device ID of Navigator Subsystem whose PSI-L config proxy is used to pair the source and destination threads. |
src_thread | u32 | PSI-L source thread ID within the PSI-L System thread map. |
dst_thread | u32 | PSI-L destination thread ID within the PSI-L System thread map. PSI-L destination threads start at index 0x8000. The request is NACK’d if the destination thread is not greater than or equal to 0x8000. |
Pairs the specified PSI-L source thread to the specified destination thread as long as both threads are unused. A thread is determined to be in use if the thread is enabled in the non-real-time registers. The source thread’s width and credit count parameters are set to the destination thread’s capabilities. Both the source and destination threads are non-real-time enabled on successful pairing. The host requesting the pair operation for threads mapped to UDMAP channels must be the owner, or the supervisor of the host owning, the UDMAP channels. Therefore, pair operations for UDMAP mapped threads must take place before the channel(s) are freed. For threads not mapped to UDMAP channels, the host requesting the unpair operation must have access through the region firewall covering the entity to which the thread is mapped. The PSI-L configuration proxy used to pair the source and destination threads is based on the Navigator Subsystem specified by @ref nav_id. UDMAP transmit channels mapped to source threads will have their TCHAN_THRD_ID register programmed with the destination thread if the pairing is successful. UDMAP receive channels mapped to destination threads will have their RCHAN_THRD_ID register programmed with the source thread if the pairing is successful.
struct tisci_msg_rm_psil_pair_resp
Response to pairing a PSI-L source thread to a destination thread
Parameter | Type | Description |
---|---|---|
hdr | struct tisci_header | Standard TISCI header |
TISCI_MSG_RM_PSIL_UNPAIR - PSI-L Unpair¶
The psil unpair TISCI message API is used to unpair a SoC Navigator Subsystem source thread from a destination thread. Unpairing the threads disables both threads and clears the source thread’s registers. UDMAP channels mapped to PSI-L source and destination threads in the unpair request will have their THRD_ID register cleared.
The host requesting a psil unpair operation for threads mapped to UDMAP channels must be the owner, or the supervisor of the host owning, the UDMAP channels. Therefore, psil unpair operations for UDMAP mapped threads must take place before the channel(s) are freed. For threads not mapped to UDMAP channels, the host requesting the psil unpair operation must have access through the region firewall covering the entity to which the thread is mapped.
The psil unpair API can be used to unpair source and destination threads within any Navigator Subsystem on the device.
Usage¶
Message Type | Normal |
Secure Queue Only? | No |
TISCI Message ID¶
TISCI_MSG_RM_PSIL_UNPAIR (0x1281U)
RM TISCI message to unpair PSI-L source and destination threads
PSI-L Unpair Message Parameters¶
struct tisci_msg_rm_psil_unpair_req
Unpairs a PSI-L source thread from a destination thread
Parameter | Type | Description |
---|---|---|
hdr | struct tisci_header | Standard TISCI header |
nav_id | u32 | SoC device ID of Navigator Subsystem whose PSI-L config proxy is used to unpair the source and destination threads. |
src_thread | u32 | PSI-L source thread ID within the PSI-L System thread map. |
dst_thread | u32 | PSI-L destination thread ID within the PSI-L System thread map. PSI-L destination threads start at index 0x8000. The request is NACK’d if the destination thread is not greater than or equal to 0x8000. |
Unpairs the specified PSI-L source thread from the specified destination the thread. The source thread’s width and credit count parameters are cleared. Both the source and destination threads are non-real-time disabled on successful unpairing. The host requesting the unpair operation for threads mapped to UDMAP channels must be the owner, or the supervisor of the host owning, the UDMAP channels. Therefore, unpair operations for UDMAP mapped threads must take place before the channel(s) are freed. For threads not mapped to UDMAP channels, the host requesting the unpair operation must have access through the region firewall covering the entity to which the thread is mapped. The PSI-L configuration proxy used to unpair the source and destination threads is based on the Navigator Subsystem specified by @ref nav_id. UDMAP transmit channels mapped to source threads will have their TCHAN_THRD_ID register cleared if the unpairing is successful. UDMAP receive channels mapped to destination threads will have their RCHAN_THRD_ID register cleared if the unpairing is successful.
struct tisci_msg_rm_psil_unpair_resp
Response to unpairing a PSI-L source thread from a destination thread
Parameter | Type | Description |
---|---|---|
hdr | struct tisci_header | Standard TISCI header |
TISCI_MSG_RM_PSIL_READ - PSI-L Thread Configuration Register Read¶
The psil read TISCI message API is used to read a PSI-L thread’s configuration registers via a PSI-L configuration proxy.
Usage¶
Message Type | Normal |
Secure Queue Only? | No |
TISCI Message ID¶
TISCI_MSG_RM_PSIL_READ (0x1282U)
RM TISCI message to read PSI-L thread RT registers via the PSI-L proxy
Message Data Structures¶
struct tisci_msg_rm_psil_read_req
Reads the specified thread real-time configuration register from a specified PSI-L thread using the PSI-L configuration proxy. The host requesting the read operation for threads mapped to UDMAP channels must be the owner, or the supervisor of the host owning, the UDMAP channels. For threads not mapped to UDMAP channels, the host requesting the read operation must have access through the region firewall covering the entity to which the thread is mapped. The PSI-L configuration proxy used to read thread’s configuration registers is based on the Navigator Subsystem specified by @ref nav_id.
Parameter | Type | Description |
---|---|---|
hdr | struct tisci_header | Standard TISCI header |
valid_params | u32 | Bitfield defining validity of PSI-L read parameters. This field is unused at the moment but exists if expansion of the API is needed in the future. |
nav_id | u16 | SoC device ID of Navigator Subsystem whose PSI-L config proxy is used to read from the thread. |
thread | u16 | PSI-L thread ID within the PSI-L System thread map. |
taddr | u16 | Thread’s configuration register address to read. |
struct tisci_msg_rm_psil_read_resp
Response to reading a PSI-L thread real-time register
Parameter | Type | Description |
---|---|---|
hdr | struct tisci_header | Standard TISCI header |
data | u32 | Register value returned by read operation |
TISCI_MSG_RM_PSIL_WRITE - PSI-L Thread Configuration Register Write¶
The psil write TISCI message API is used to write a PSI-L thread’s configuration registers via a PSI-L configuration proxy.
Usage¶
Message Type | Normal |
Secure Queue Only? | No |
TISCI Message ID¶
TISCI_MSG_RM_PSIL_WRITE (0x1283U)
RM TISCI message to write PSI-L thread RT registers via the PSI-L proxy
Message Data Structures¶
struct tisci_msg_rm_psil_write_req
Write to the specified thread real-time configuration register in a specified PSI-L thread using the PSI-L configuration proxy. The host requesting the read operation for threads mapped to UDMAP channels must be the owner, or the supervisor of the host owning, the UDMAP channels. For threads not mapped to UDMAP channels, the host requesting the write operation must have access through the region firewall covering the entity to which the thread is mapped. The PSI-L configuration proxy used to write thread’s configuration registers is based on the Navigator Subsystem specified by @ref nav_id. A read back verify is not performed for thread registers written via the PSI-L configuration proxy. The configuration register field formats are not fully known by the PSI-L driver. Therefore, it is up to the application to utilize @ref tisci_msg_rm_psil_read_req to read back and verify what was written.
Parameter | Type | Description |
---|---|---|
hdr | struct tisci_header | Standard TISCI header |
valid_params | u32 | Bitfield defining validity of PSI-L write parameters. This field is unused at the moment but exists if expansion of the API is needed in the future. |
nav_id | u16 | SoC device ID of Navigator Subsystem whose PSI-L config proxy is used to write to the thread. |
thread | u16 | PSI-L thread ID within the PSI-L System thread map. |
taddr | u16 | Thread’s configuration register address to write. |
data | u32 | 32-bit word to write to the thread configuration register. |
struct tisci_msg_rm_psil_write_resp
Response to writing a PSI-L thread real-time register
Parameter | Type | Description |
---|---|---|
hdr | struct tisci_header | Standard TISCI header |