Introduction

Traditional Texas Instruments SoCs implement system control functions such as power management on each of the processing units (ARM/DSP etc). However, the traditional approach had tremendous challenges to ensure system stability. A few of the challenges include:

• Complex interactions between Operating Systems on heterogeneous SoCs for generic features.
• Lack of centralized knowledge of system state.
• Complex implementation challenges with regards to implementation of workarounds for system quirks.
• Equivalent system capability entitlement on all variations of operation conditions.

Centralized Device Management

K3 devices introduces the concept of a centralized Power, Resource and Security Management to allow mitigating the challenges of the traditional approach to system control.

In the Power management domain, the centralized power management takes into account that every device has:

• Different power and clock domains.
• Derivatives have slight differences in the clocking architecture based on combination of modules.

It provides an OS agnostic interface for power management allowing peripherals and clocks to be handled by multiple processors running different OSes (Linux, RTOS, etc.). The centralized power management entity aims to provide the same control for power and clock setting across all OSes.

Centralized Resource management is driven by the centralized DMA architecture. Key components of the centralized resource management include:

• Navigator Subsystem: Collection of Data movement components
  • UDMA (Unified DMA), PKTDMA, BCDMA: DMA engine for standard parallel DMA (CBA) or PSI/stream based IP.
• RA (Ring Accelerator): Queue management providing abstract SW view to HW DMA queues
• Proxy: Allows efficient access to RA queues, also enables address containment/virtualization (access RA via separate MMU page / regions)
• Interrupt & events handling: Interrupt aggregators and Interrupt routers

In K3 devices, there is a Single Entity responsible for:

• Abstracting HW details for power, DMA common resources and Interrupt management.
• Maintaining knowledge of the system state centrally.
• Partition resources in the system across CPU cores.

This centralized power management and resource management entity executes on the DMSC M3.

Centralized Foundational Security Management

The DMSC M3 subsystem in the K3 family of devices is responsible to run the software stack for the devices foundational security management. This software entity is responsible for:

• Foundational device security in DMSC

  • Secure boot with secure keys/root-of-trust, Security configuration and Debug unlock
  • RSA or ECC Root Keys, AES symmetric key
  • Utilizes PKA, SHA2 and AES Crypto accelerators

• Basic security functionality to extend root of trust (optional)

  • Authenticated Key ring to extend root-of-trust keys
  • SYSFW and Bootloader Rollback protection via eFuse
  • Device Unique Key / Key Derivation to support 3P stacks

The centralized power, resource and security management entity is henceforth refered to as System Control Entity and System Firmware interchangeably. Any software and hardware entity which communicates with the System Control Entity is refered to as “Host”. The block diagram of the System Controller Entity or System firmware is as below:

Fig. 1 System Controller Entity interacting with Other Hosts

Further Reading

• In Chapter 2: TISCI Message Documentation, we describe how one can communicate with the system control entity and the various messages that can be used.
• In Chapter 3: Board Configuration, we desribe the format and content of the boardcfg messages that does onetime configuration of System Firmware.
• In Chapter 4: Interpreting Trace Data, we define trace data format.
• In Chapter 5: SoC Family Specific Documentation, we provide information specific to each SOC that is required using the TISCI messages described in Chapter 2: TISCI Message Documentation.
• In Chapter 6: Topic User Guides, we provide user guides for the more complex scenarios.