AM6 Peripheral IRQ Source Descriptions¶
Introduction¶
This chapter provides information on peripheral IRQ source IDs that are permitted in the am6 SoC. The IRQ source IDs represent elements within a SoC peripheral capable of generating an egress interrupt or event signal. The System Firmware IRQ management TISCI message APIs take IRQ source IDs as input to set and release IRQ routes between source peripherals and destination host processors.
The below table lists all IRQ source IDs for each device ID in the am6 SoC.
Enumeration of IRQ Source IDs¶
| Device ID | Device Name | Source Index | IRQ Source Name |
|---|---|---|---|
| 2 | AM6_DEV_CAL0 | 5 | bus_int_cal_l |
| 2 | AM6_DEV_CAL0 | 2 | bus_int_lvdsrx1_p |
| 2 | AM6_DEV_CAL0 | 0 | bus_int_lvdsrx2_p |
| 2 | AM6_DEV_CAL0 | 3 | bus_int_lvdsrx3_p |
| 2 | AM6_DEV_CAL0 | 4 | bus_int_lvdsrx4_p |
| 5 | AM6_DEV_MCU_CPSW0 | 6 | bus_cpts_comp |
| 5 | AM6_DEV_MCU_CPSW0 | 3 | bus_cpts_genf0 |
| 5 | AM6_DEV_MCU_CPSW0 | 4 | bus_cpts_genf1 |
| 5 | AM6_DEV_MCU_CPSW0 | 5 | bus_cpts_sync |
| 9 | AM6_DEV_DCC0 | 0 | bus_intr_done_level |
| 10 | AM6_DEV_DCC1 | 0 | bus_intr_done_level |
| 11 | AM6_DEV_DCC2 | 0 | bus_intr_done_level |
| 12 | AM6_DEV_DCC3 | 0 | bus_intr_done_level |
| 13 | AM6_DEV_DCC4 | 0 | bus_intr_done_level |
| 14 | AM6_DEV_DCC5 | 0 | bus_intr_done_level |
| 15 | AM6_DEV_DCC6 | 0 | bus_intr_done_level |
| 16 | AM6_DEV_DCC7 | 0 | bus_intr_done_level |
| 20 | AM6_DEV_DDRSS0 | 0 | bus_ddrss_v2h_other_err_lvl |
| 23 | AM6_DEV_TIMER0 | 0 | bus_intr_pend |
| 24 | AM6_DEV_TIMER1 | 0 | bus_intr_pend |
| 25 | AM6_DEV_TIMER10 | 0 | bus_intr_pend |
| 26 | AM6_DEV_TIMER11 | 0 | bus_intr_pend |
| 27 | AM6_DEV_TIMER2 | 0 | bus_intr_pend |
| 28 | AM6_DEV_TIMER3 | 0 | bus_intr_pend |
| 29 | AM6_DEV_TIMER4 | 0 | bus_intr_pend |
| 30 | AM6_DEV_TIMER5 | 0 | bus_intr_pend |
| 31 | AM6_DEV_TIMER6 | 0 | bus_intr_pend |
| 32 | AM6_DEV_TIMER7 | 0 | bus_intr_pend |
| 33 | AM6_DEV_TIMER8 | 0 | bus_intr_pend |
| 34 | AM6_DEV_TIMER9 | 0 | bus_intr_pend |
| 39 | AM6_DEV_ECAP0 | 0 | bus_ecap_int |
| 40 | AM6_DEV_EHRPWM0 | 2 | bus_epwm_etint |
| 40 | AM6_DEV_EHRPWM0 | 0 | bus_epwm_tripzint |
| 41 | AM6_DEV_EHRPWM1 | 2 | bus_epwm_etint |
| 41 | AM6_DEV_EHRPWM1 | 0 | bus_epwm_tripzint |
| 42 | AM6_DEV_EHRPWM2 | 2 | bus_epwm_etint |
| 42 | AM6_DEV_EHRPWM2 | 0 | bus_epwm_tripzint |
| 43 | AM6_DEV_EHRPWM3 | 2 | bus_epwm_etint |
| 43 | AM6_DEV_EHRPWM3 | 0 | bus_epwm_tripzint |
| 44 | AM6_DEV_EHRPWM4 | 2 | bus_epwm_etint |
| 44 | AM6_DEV_EHRPWM4 | 0 | bus_epwm_tripzint |
| 45 | AM6_DEV_EHRPWM5 | 2 | bus_epwm_etint |
| 45 | AM6_DEV_EHRPWM5 | 0 | bus_epwm_tripzint |
| 46 | AM6_DEV_ELM0 | 0 | bus_elm_porocpsinterrupt_lvl |
| 47 | AM6_DEV_MMCSD0 | 0 | bus_emmcsdss_intr |
| 48 | AM6_DEV_MMCSD1 | 0 | bus_emmcsdss_intr |
| 49 | AM6_DEV_EQEP0 | 0 | bus_eqep_int |
| 50 | AM6_DEV_EQEP1 | 0 | bus_eqep_int |
| 51 | AM6_DEV_EQEP2 | 0 | bus_eqep_int |
| 57 | AM6_DEV_GPIO0 | 0 - 95 | bus_gpio |
| 57 | AM6_DEV_GPIO0 | 256 - 261 | bus_gpio_bank |
| 58 | AM6_DEV_GPIO1 | 0 - 89 | bus_gpio |
| 58 | AM6_DEV_GPIO1 | 256 - 261 | bus_gpio_bank |
| 59 | AM6_DEV_WKUP_GPIO0 | 0 - 55 | bus_gpio |
| 59 | AM6_DEV_WKUP_GPIO0 | 128 - 131 | bus_gpio_bank |
| 60 | AM6_DEV_GPMC0 | 0 | bus_gpmc_sinterrupt |
| 62 | AM6_DEV_PRU_ICSSG0 | 304 | bus_pr1_edc0_sync0_out |
| 62 | AM6_DEV_PRU_ICSSG0 | 305 | bus_pr1_edc0_sync1_out |
| 62 | AM6_DEV_PRU_ICSSG0 | 306 | bus_pr1_edc1_sync0_out |
| 62 | AM6_DEV_PRU_ICSSG0 | 307 | bus_pr1_edc1_sync1_out |
| 62 | AM6_DEV_PRU_ICSSG0 | 294 - 301 | bus_pr1_host_intr_pend |
| 62 | AM6_DEV_PRU_ICSSG0 | 286 - 293 | bus_pr1_host_intr_req |
| 62 | AM6_DEV_PRU_ICSSG0 | 268 - 283 | bus_pr1_iep0_cmp_intr_req |
| 62 | AM6_DEV_PRU_ICSSG0 | 256 - 261 | bus_pr1_iep1_cmp_intr_req |
| 62 | AM6_DEV_PRU_ICSSG0 | 6 - 15 | bus_pr1_iep1_cmp_intr_req |
| 62 | AM6_DEV_PRU_ICSSG0 | 284 - 285 | bus_pr1_rx_sof_intr_req |
| 62 | AM6_DEV_PRU_ICSSG0 | 302 - 303 | bus_pr1_tx_sof_intr_req |
| 63 | AM6_DEV_PRU_ICSSG1 | 304 | bus_pr1_edc0_sync0_out |
| 63 | AM6_DEV_PRU_ICSSG1 | 305 | bus_pr1_edc0_sync1_out |
| 63 | AM6_DEV_PRU_ICSSG1 | 306 | bus_pr1_edc1_sync0_out |
| 63 | AM6_DEV_PRU_ICSSG1 | 307 | bus_pr1_edc1_sync1_out |
| 63 | AM6_DEV_PRU_ICSSG1 | 294 - 301 | bus_pr1_host_intr_pend |
| 63 | AM6_DEV_PRU_ICSSG1 | 286 - 293 | bus_pr1_host_intr_req |
| 63 | AM6_DEV_PRU_ICSSG1 | 268 - 283 | bus_pr1_iep0_cmp_intr_req |
| 63 | AM6_DEV_PRU_ICSSG1 | 256 - 261 | bus_pr1_iep1_cmp_intr_req |
| 63 | AM6_DEV_PRU_ICSSG1 | 6 - 15 | bus_pr1_iep1_cmp_intr_req |
| 63 | AM6_DEV_PRU_ICSSG1 | 284 - 285 | bus_pr1_rx_sof_intr_req |
| 63 | AM6_DEV_PRU_ICSSG1 | 302 - 303 | bus_pr1_tx_sof_intr_req |
| 64 | AM6_DEV_PRU_ICSSG2 | 304 | bus_pr1_edc0_sync0_out |
| 64 | AM6_DEV_PRU_ICSSG2 | 305 | bus_pr1_edc0_sync1_out |
| 64 | AM6_DEV_PRU_ICSSG2 | 306 | bus_pr1_edc1_sync0_out |
| 64 | AM6_DEV_PRU_ICSSG2 | 307 | bus_pr1_edc1_sync1_out |
| 64 | AM6_DEV_PRU_ICSSG2 | 294 - 301 | bus_pr1_host_intr_pend |
| 64 | AM6_DEV_PRU_ICSSG2 | 286 - 293 | bus_pr1_host_intr_req |
| 64 | AM6_DEV_PRU_ICSSG2 | 268 - 283 | bus_pr1_iep0_cmp_intr_req |
| 64 | AM6_DEV_PRU_ICSSG2 | 256 - 261 | bus_pr1_iep1_cmp_intr_req |
| 64 | AM6_DEV_PRU_ICSSG2 | 6 - 15 | bus_pr1_iep1_cmp_intr_req |
| 64 | AM6_DEV_PRU_ICSSG2 | 284 - 285 | bus_pr1_rx_sof_intr_req |
| 64 | AM6_DEV_PRU_ICSSG2 | 302 - 303 | bus_pr1_tx_sof_intr_req |
| 65 | AM6_DEV_GPU0 | 2 | bus_exp_intr |
| 65 | AM6_DEV_GPU0 | 3 | bus_gpu_irq |
| 65 | AM6_DEV_GPU0 | 4 | bus_init_err |
| 65 | AM6_DEV_GPU0 | 0 | bus_target_err |
| 66 | AM6_DEV_CCDEBUGSS0 | 0 | bus_aqcmpintr_level |
| 67 | AM6_DEV_DSS0 | 2 | bus_dispc_intr_req_0 |
| 67 | AM6_DEV_DSS0 | 0 | bus_dispc_intr_req_1 |
| 68 | AM6_DEV_DEBUGSS0 | 2 | bus_aqcmpintr_level |
| 68 | AM6_DEV_DEBUGSS0 | 0 | bus_ctm_level |
| 82 | AM6_DEV_CBASS0 | 0 | bus_LPSC_per_common_err_intr |
| 83 | AM6_DEV_CBASS_DEBUG0 | 0 | bus_LPSC_main_debug_err_intr |
| 84 | AM6_DEV_CBASS_FW0 | 0 | bus_LPSC_main_infra_err_intr |
| 85 | AM6_DEV_CBASS_INFRA0 | 0 | bus_LPSC_main_infra_err_intr |
| 99 | AM6_DEV_CTRL_MMR0 | 0 | bus_access_err |
| 104 | AM6_DEV_MCASP0 | 2 | bus_rec_intr_pend |
| 104 | AM6_DEV_MCASP0 | 0 | bus_xmit_intr_pend |
| 105 | AM6_DEV_MCASP1 | 2 | bus_rec_intr_pend |
| 105 | AM6_DEV_MCASP1 | 0 | bus_xmit_intr_pend |
| 106 | AM6_DEV_MCASP2 | 2 | bus_rec_intr_pend |
| 106 | AM6_DEV_MCASP2 | 0 | bus_xmit_intr_pend |
| 110 | AM6_DEV_I2C0 | 0 | bus_pointrpend |
| 111 | AM6_DEV_I2C1 | 0 | bus_pointrpend |
| 112 | AM6_DEV_I2C2 | 0 | bus_pointrpend |
| 113 | AM6_DEV_I2C3 | 0 | bus_pointrpend |
| 118 | AM6_DEV_NAVSS0 | 9 | bus_cpts0_comp |
| 118 | AM6_DEV_NAVSS0 | 10 | bus_cpts0_genf0 |
| 118 | AM6_DEV_NAVSS0 | 11 | bus_cpts0_genf1 |
| 118 | AM6_DEV_NAVSS0 | 12 | bus_cpts0_genf2 |
| 118 | AM6_DEV_NAVSS0 | 13 | bus_cpts0_genf3 |
| 118 | AM6_DEV_NAVSS0 | 14 | bus_cpts0_genf4 |
| 118 | AM6_DEV_NAVSS0 | 15 | bus_cpts0_genf5 |
| 118 | AM6_DEV_NAVSS0 | 16 | bus_cpts0_sync |
| 120 | AM6_DEV_PCIE0 | 13 | bus_pcie0_pend |
| 120 | AM6_DEV_PCIE0 | 2 | bus_pcie1_pend |
| 120 | AM6_DEV_PCIE0 | 7 | bus_pcie2_pend |
| 120 | AM6_DEV_PCIE0 | 4 | bus_pcie3_pend |
| 120 | AM6_DEV_PCIE0 | 5 | bus_pcie4_pend |
| 120 | AM6_DEV_PCIE0 | 3 | bus_pcie5_pend |
| 120 | AM6_DEV_PCIE0 | 11 | bus_pcie6_pend |
| 120 | AM6_DEV_PCIE0 | 8 | bus_pcie7_pend |
| 120 | AM6_DEV_PCIE0 | 9 | bus_pcie8_pend |
| 120 | AM6_DEV_PCIE0 | 16 | bus_pcie9_pend |
| 120 | AM6_DEV_PCIE0 | 15 | bus_pcie10_pend |
| 120 | AM6_DEV_PCIE0 | 14 | bus_pcie11_pend |
| 120 | AM6_DEV_PCIE0 | 6 | bus_pcie12_pend |
| 120 | AM6_DEV_PCIE0 | 10 | bus_pcie13_pend |
| 120 | AM6_DEV_PCIE0 | 0 | bus_pcie14_pend |
| 120 | AM6_DEV_PCIE0 | 19 | bus_pcie_cpts_comp |
| 120 | AM6_DEV_PCIE0 | 20 | bus_pcie_cpts_genf0 |
| 120 | AM6_DEV_PCIE0 | 17 | bus_pcie_cpts_hw1_push |
| 120 | AM6_DEV_PCIE0 | 12 | bus_pcie_cpts_pend |
| 120 | AM6_DEV_PCIE0 | 21 | bus_pcie_cpts_sync |
| 121 | AM6_DEV_PCIE1 | 13 | bus_pcie0_pend |
| 121 | AM6_DEV_PCIE1 | 2 | bus_pcie1_pend |
| 121 | AM6_DEV_PCIE1 | 7 | bus_pcie2_pend |
| 121 | AM6_DEV_PCIE1 | 4 | bus_pcie3_pend |
| 121 | AM6_DEV_PCIE1 | 5 | bus_pcie4_pend |
| 121 | AM6_DEV_PCIE1 | 3 | bus_pcie5_pend |
| 121 | AM6_DEV_PCIE1 | 11 | bus_pcie6_pend |
| 121 | AM6_DEV_PCIE1 | 8 | bus_pcie7_pend |
| 121 | AM6_DEV_PCIE1 | 9 | bus_pcie8_pend |
| 121 | AM6_DEV_PCIE1 | 16 | bus_pcie9_pend |
| 121 | AM6_DEV_PCIE1 | 15 | bus_pcie10_pend |
| 121 | AM6_DEV_PCIE1 | 14 | bus_pcie11_pend |
| 121 | AM6_DEV_PCIE1 | 6 | bus_pcie12_pend |
| 121 | AM6_DEV_PCIE1 | 10 | bus_pcie13_pend |
| 121 | AM6_DEV_PCIE1 | 0 | bus_pcie14_pend |
| 121 | AM6_DEV_PCIE1 | 19 | bus_pcie_cpts_comp |
| 121 | AM6_DEV_PCIE1 | 20 | bus_pcie_cpts_genf0 |
| 121 | AM6_DEV_PCIE1 | 17 | bus_pcie_cpts_hw1_push |
| 121 | AM6_DEV_PCIE1 | 12 | bus_pcie_cpts_pend |
| 121 | AM6_DEV_PCIE1 | 21 | bus_pcie_cpts_sync |
| 136 | AM6_DEV_SA2_UL0 | 2 | bus_sa_ul_pka |
| 136 | AM6_DEV_SA2_UL0 | 0 | bus_sa_ul_trng |
| 137 | AM6_DEV_MCSPI0 | 0 | bus_intr_spi |
| 138 | AM6_DEV_MCSPI1 | 0 | bus_intr_spi |
| 139 | AM6_DEV_MCSPI2 | 0 | bus_intr_spi |
| 140 | AM6_DEV_MCSPI3 | 0 | bus_intr_spi |
| 146 | AM6_DEV_UART0 | 0 | bus_usart_irq |
| 147 | AM6_DEV_UART1 | 0 | bus_usart_irq |
| 148 | AM6_DEV_UART2 | 0 | bus_usart_irq |
| 151 | AM6_DEV_USB3SS0 | 18 | bus_bc_lvl |
| 151 | AM6_DEV_USB3SS0 | 19 | bus_i00_lvl |
| 151 | AM6_DEV_USB3SS0 | 8 | bus_i01_lvl |
| 151 | AM6_DEV_USB3SS0 | 7 | bus_i02_lvl |
| 151 | AM6_DEV_USB3SS0 | 13 | bus_i03_lvl |
| 151 | AM6_DEV_USB3SS0 | 3 | bus_i04_lvl |
| 151 | AM6_DEV_USB3SS0 | 12 | bus_i05_lvl |
| 151 | AM6_DEV_USB3SS0 | 4 | bus_i06_lvl |
| 151 | AM6_DEV_USB3SS0 | 6 | bus_i07_lvl |
| 151 | AM6_DEV_USB3SS0 | 2 | bus_i08_lvl |
| 151 | AM6_DEV_USB3SS0 | 11 | bus_i09_lvl |
| 151 | AM6_DEV_USB3SS0 | 0 | bus_i10_lvl |
| 151 | AM6_DEV_USB3SS0 | 20 | bus_i11_lvl |
| 151 | AM6_DEV_USB3SS0 | 9 | bus_i12_lvl |
| 151 | AM6_DEV_USB3SS0 | 15 | bus_i13_lvl |
| 151 | AM6_DEV_USB3SS0 | 5 | bus_i14_lvl |
| 151 | AM6_DEV_USB3SS0 | 10 | bus_i15_lvl |
| 151 | AM6_DEV_USB3SS0 | 17 | bus_misc_lvl |
| 151 | AM6_DEV_USB3SS0 | 14 | bus_otg_lvl |
| 151 | AM6_DEV_USB3SS0 | 16 | bus_pme_gen_lvl |
| 152 | AM6_DEV_USB3SS1 | 18 | bus_bc_lvl |
| 152 | AM6_DEV_USB3SS1 | 19 | bus_i00_lvl |
| 152 | AM6_DEV_USB3SS1 | 8 | bus_i01_lvl |
| 152 | AM6_DEV_USB3SS1 | 7 | bus_i02_lvl |
| 152 | AM6_DEV_USB3SS1 | 13 | bus_i03_lvl |
| 152 | AM6_DEV_USB3SS1 | 3 | bus_i04_lvl |
| 152 | AM6_DEV_USB3SS1 | 12 | bus_i05_lvl |
| 152 | AM6_DEV_USB3SS1 | 4 | bus_i06_lvl |
| 152 | AM6_DEV_USB3SS1 | 6 | bus_i07_lvl |
| 152 | AM6_DEV_USB3SS1 | 2 | bus_i08_lvl |
| 152 | AM6_DEV_USB3SS1 | 11 | bus_i09_lvl |
| 152 | AM6_DEV_USB3SS1 | 0 | bus_i10_lvl |
| 152 | AM6_DEV_USB3SS1 | 20 | bus_i11_lvl |
| 152 | AM6_DEV_USB3SS1 | 9 | bus_i12_lvl |
| 152 | AM6_DEV_USB3SS1 | 15 | bus_i13_lvl |
| 152 | AM6_DEV_USB3SS1 | 5 | bus_i14_lvl |
| 152 | AM6_DEV_USB3SS1 | 10 | bus_i15_lvl |
| 152 | AM6_DEV_USB3SS1 | 17 | bus_misc_lvl |
| 152 | AM6_DEV_USB3SS1 | 14 | bus_otg_lvl |
| 152 | AM6_DEV_USB3SS1 | 16 | bus_pme_gen_lvl |
| 163 | AM6_DEV_NAVSS0_CPTS0 | 0 | event_pend_intr |
| 164 | AM6_DEV_NAVSS0_MAILBOX0_CLUSTER0 | 0 - 3 | pend_intr |
| 165 | AM6_DEV_NAVSS0_MAILBOX0_CLUSTER1 | 0 - 3 | pend_intr |
| 166 | AM6_DEV_NAVSS0_MAILBOX0_CLUSTER2 | 0 - 3 | pend_intr |
| 167 | AM6_DEV_NAVSS0_MAILBOX0_CLUSTER3 | 0 - 3 | pend_intr |
| 168 | AM6_DEV_NAVSS0_MAILBOX0_CLUSTER4 | 0 - 3 | pend_intr |
| 169 | AM6_DEV_NAVSS0_MAILBOX0_CLUSTER5 | 0 - 3 | pend_intr |
| 170 | AM6_DEV_NAVSS0_MAILBOX0_CLUSTER6 | 0 - 3 | pend_intr |
| 171 | AM6_DEV_NAVSS0_MAILBOX0_CLUSTER7 | 0 - 3 | pend_intr |
| 172 | AM6_DEV_NAVSS0_MAILBOX0_CLUSTER8 | 0 - 3 | pend_intr |
| 173 | AM6_DEV_NAVSS0_MAILBOX0_CLUSTER9 | 0 - 3 | pend_intr |
| 174 | AM6_DEV_NAVSS0_MAILBOX0_CLUSTER10 | 0 - 3 | pend_intr |
| 175 | AM6_DEV_NAVSS0_MAILBOX0_CLUSTER11 | 0 - 3 | pend_intr |
| 176 | AM6_DEV_NAVSS0_MCRC0 | 0 | dma_event_intr |
| 176 | AM6_DEV_NAVSS0_MCRC0 | 0 - 1 | dma_event_intr |
| 176 | AM6_DEV_NAVSS0_MCRC0 | 1 - 2 | dma_event_intr |
| 176 | AM6_DEV_NAVSS0_MCRC0 | 2 - 3 | dma_event_intr |
| 176 | AM6_DEV_NAVSS0_MCRC0 | 3 | dma_event_intr |
| 176 | AM6_DEV_NAVSS0_MCRC0 | 8 | int_mcrc_intr |
| 177 | AM6_DEV_NAVSS0_PVU0 | 0 | pend_intr |
| 178 | AM6_DEV_NAVSS0_PVU1 | 0 | pend_intr |
| 185 | AM6_DEV_NAVSS0_PROXY0 | 0 - 63 | Main Nav Proxy proxy error events |
| 187 | AM6_DEV_NAVSS0_RINGACC0 | 0 - 767 | Main Nav Ring Accelerator ring events |
| 187 | AM6_DEV_NAVSS0_RINGACC0 | 1024 - 1055 | Main Nav Ring Accelerator ring monitor events |
| 187 | AM6_DEV_NAVSS0_RINGACC0 | 4096 | main nav ring accelerator global error event |
| 188 | AM6_DEV_NAVSS0_UDMAP0 | 0 - 151 | Main Nav UDMAP transmit channel output event (OES) |
| 188 | AM6_DEV_NAVSS0_UDMAP0 | 4096 - 4247 | Main Nav UDMAP transmit channel error output event (EOES) |
| 188 | AM6_DEV_NAVSS0_UDMAP0 | 8192 - 8341 | Main Nav UDMAP receive channel output event (OES) |
| 188 | AM6_DEV_NAVSS0_UDMAP0 | 12288 - 12437 | Main Nav UDMAP receive channel error output event (EOES) |
| 188 | AM6_DEV_NAVSS0_UDMAP0 | 16384 | Main Nav UDMAP global invalid flow ouput event |
| 191 | AM6_DEV_MCU_NAVSS0_PROXY0 | 0 - 63 | MCU Nav Proxy proxy error events |
| 194 | AM6_DEV_MCU_NAVSS0_UDMAP0 | 0 - 47 | MCU Nav UDMAP transmit channel output event (OES) |
| 194 | AM6_DEV_MCU_NAVSS0_UDMAP0 | 4096 - 4143 | MCU Nav UDMAP transmit channel error output event (EOES) |
| 194 | AM6_DEV_MCU_NAVSS0_UDMAP0 | 8192 - 8239 | MCU Nav UDMAP receive channel output event (OES) |
| 194 | AM6_DEV_MCU_NAVSS0_UDMAP0 | 12288 - 12335 | MCU Nav UDMAP receive channel error output event (EOES) |
| 194 | AM6_DEV_MCU_NAVSS0_UDMAP0 | 16384 | MCU Nav UDMAP global invalid flow ouput event |
| 195 | AM6_DEV_MCU_NAVSS0_RINGACC0 | 0 - 255 | MCU Nav Ring Accelerator ring events |
| 195 | AM6_DEV_MCU_NAVSS0_RINGACC0 | 1024 - 1055 | MCU Nav Ring Accelerator ring monitor events |
| 195 | AM6_DEV_MCU_NAVSS0_RINGACC0 | 4096 | MCU Nav Ring Accelerator global error event |