J722S Devices Descriptions¶
Introduction¶
This chapter provides information on Device IDs that are permitted in the j722s SoC. The device IDs represent SoC subsystems that can be modified via DMSC TISCI message APIs. Some Secure, Power, and Resource Management DMSC subsystem TISCI message APIs define a device ID as a parameter allowing a user to specify management of a particular SoC subsystem.
Enumeration of Device IDs¶
| Device ID | Device Name |
|---|---|
| 2 | J722S_DEV_DBGSUSPENDROUTER0 |
| 3 | J722S_DEV_MAIN_GPIOMUX_INTROUTER0 |
| 5 | J722S_DEV_WKUP_MCU_GPIOMUX_INTROUTER0 |
| 6 | J722S_DEV_TIMESYNC_EVENT_INTROUTER0 |
| 7 | J722S_DEV_MCU_R5FSS0 |
| 9 | J722S_DEV_MCU_R5FSS0_CORE0 |
| 13 | J722S_DEV_CPSW0 |
| 15 | J722S_DEV_STM0 |
| 16 | J722S_DEV_DCC0 |
| 17 | J722S_DEV_DCC1 |
| 18 | J722S_DEV_DCC2 |
| 19 | J722S_DEV_DCC3 |
| 20 | J722S_DEV_DCC4 |
| 21 | J722S_DEV_DCC5 |
| 22 | J722S_DEV_SMS0 |
| 23 | J722S_DEV_MCU_DCC0 |
| 24 | J722S_DEV_DEBUGSS_WRAP0 |
| 25 | J722S_DEV_DMASS0 |
| 26 | J722S_DEV_DMASS0_BCDMA_0 |
| 27 | J722S_DEV_DMASS0_CBASS_0 |
| 28 | J722S_DEV_DMASS0_INTAGGR_0 |
| 29 | J722S_DEV_DMASS0_IPCSS_0 |
| 30 | J722S_DEV_DMASS0_PKTDMA_0 |
| 33 | J722S_DEV_DMASS0_RINGACC_0 |
| 35 | J722S_DEV_MCU_TIMER0 |
| 36 | J722S_DEV_TIMER0 |
| 37 | J722S_DEV_TIMER1 |
| 38 | J722S_DEV_TIMER2 |
| 39 | J722S_DEV_TIMER3 |
| 40 | J722S_DEV_TIMER4 |
| 41 | J722S_DEV_TIMER5 |
| 42 | J722S_DEV_TIMER6 |
| 43 | J722S_DEV_TIMER7 |
| 48 | J722S_DEV_MCU_TIMER1 |
| 49 | J722S_DEV_MCU_TIMER2 |
| 50 | J722S_DEV_MCU_TIMER3 |
| 51 | J722S_DEV_ECAP0 |
| 52 | J722S_DEV_ECAP1 |
| 53 | J722S_DEV_ECAP2 |
| 54 | J722S_DEV_ELM0 |
| 55 | J722S_DEV_MAIN_EMIF_DATA_ISO_VD |
| 57 | J722S_DEV_MMCSD0 |
| 58 | J722S_DEV_MMCSD1 |
| 59 | J722S_DEV_EQEP0 |
| 60 | J722S_DEV_EQEP1 |
| 61 | J722S_DEV_WKUP_GTC0 |
| 62 | J722S_DEV_EQEP2 |
| 63 | J722S_DEV_ESM0 |
| 64 | J722S_DEV_WKUP_ESM0 |
| 73 | J722S_DEV_FSS0 |
| 74 | J722S_DEV_FSS0_FSAS_0 |
| 75 | J722S_DEV_FSS0_OSPI_0 |
| 76 | J722S_DEV_GICSS0 |
| 77 | J722S_DEV_GPIO0 |
| 78 | J722S_DEV_GPIO1 |
| 79 | J722S_DEV_MCU_GPIO0 |
| 80 | J722S_DEV_GPMC0 |
| 83 | J722S_DEV_LED0 |
| 85 | J722S_DEV_DDPA0 |
| 86 | J722S_DEV_EPWM0 |
| 87 | J722S_DEV_EPWM1 |
| 88 | J722S_DEV_EPWM2 |
| 95 | J722S_DEV_WKUP_VTM0 |
| 96 | J722S_DEV_MAILBOX0 |
| 97 | J722S_DEV_MAIN2MCU_VD |
| 98 | J722S_DEV_MCAN0 |
| 99 | J722S_DEV_MCAN1 |
| 100 | J722S_DEV_MCU_MCRC64_0 |
| 102 | J722S_DEV_I2C0 |
| 103 | J722S_DEV_I2C1 |
| 104 | J722S_DEV_I2C2 |
| 105 | J722S_DEV_I2C3 |
| 106 | J722S_DEV_MCU_I2C0 |
| 107 | J722S_DEV_WKUP_I2C0 |
| 110 | J722S_DEV_WKUP_TIMER0 |
| 111 | J722S_DEV_WKUP_TIMER1 |
| 114 | J722S_DEV_WKUP_UART0 |
| 116 | J722S_DEV_MCRC64_0 |
| 117 | J722S_DEV_WKUP_RTCSS0 |
| 118 | J722S_DEV_WKUP_R5FSS0_SS0 |
| 119 | J722S_DEV_WKUP_R5FSS0 |
| 121 | J722S_DEV_WKUP_R5FSS0_CORE0 |
| 125 | J722S_DEV_RTI0 |
| 126 | J722S_DEV_RTI1 |
| 127 | J722S_DEV_RTI2 |
| 128 | J722S_DEV_RTI3 |
| 130 | J722S_DEV_RTI15 |
| 131 | J722S_DEV_MCU_RTI0 |
| 132 | J722S_DEV_WKUP_RTI0 |
| 134 | J722S_DEV_COMPUTE_CLUSTER0 |
| 135 | J722S_DEV_A53SS0_CORE_0 |
| 136 | J722S_DEV_A53SS0_CORE_1 |
| 137 | J722S_DEV_A53SS0_CORE_2 |
| 138 | J722S_DEV_A53SS0_CORE_3 |
| 139 | J722S_DEV_PSCSS0 |
| 140 | J722S_DEV_WKUP_PSC0 |
| 141 | J722S_DEV_MCSPI0 |
| 142 | J722S_DEV_MCSPI1 |
| 143 | J722S_DEV_MCSPI2 |
| 146 | J722S_DEV_UART0 |
| 147 | J722S_DEV_MCU_MCSPI0 |
| 148 | J722S_DEV_MCU_MCSPI1 |
| 149 | J722S_DEV_MCU_UART0 |
| 150 | J722S_DEV_SPINLOCK0 |
| 152 | J722S_DEV_UART1 |
| 153 | J722S_DEV_UART2 |
| 154 | J722S_DEV_UART3 |
| 155 | J722S_DEV_UART4 |
| 156 | J722S_DEV_UART5 |
| 157 | J722S_DEV_BOARD0 |
| 158 | J722S_DEV_UART6 |
| 161 | J722S_DEV_USB0 |
| 163 | J722S_DEV_PBIST0 |
| 165 | J722S_DEV_WKUP_PBIST0 |
| 166 | J722S_DEV_A53SS0 |
| 167 | J722S_DEV_COMPUTE_CLUSTER0_PBIST_0 |
| 168 | J722S_DEV_PSC0_FW_0 |
| 169 | J722S_DEV_PSC0 |
| 170 | J722S_DEV_DDR32SS0 |
| 171 | J722S_DEV_DEBUGSS0 |
| 172 | J722S_DEV_A53_RS_BW_LIMITER0 |
| 173 | J722S_DEV_A53_WS_BW_LIMITER1 |
| 174 | J722S_DEV_GPU_RS_BW_LIMITER9 |
| 175 | J722S_DEV_GPU_WS_BW_LIMITER10 |
| 176 | J722S_DEV_WKUP_DEEPSLEEP_SOURCES0 |
| 177 | J722S_DEV_MAIN_EMIF_CFG_ISO_VD |
| 178 | J722S_DEV_MAIN_USB0_ISO_VD |
| 179 | J722S_DEV_MAIN_USB2_ISO_VD |
| 180 | J722S_DEV_MCU_MCU_16FF0 |
| 182 | J722S_DEV_CSI_RX_IF0 |
| 183 | J722S_DEV_DCC6 |
| 184 | J722S_DEV_MMCSD2 |
| 185 | J722S_DEV_DPHY_RX0 |
| 186 | J722S_DEV_DSS0 |
| 188 | J722S_DEV_MCU_MCAN0 |
| 189 | J722S_DEV_MCU_MCAN1 |
| 190 | J722S_DEV_MCASP0 |
| 191 | J722S_DEV_MCASP1 |
| 192 | J722S_DEV_MCASP2 |
| 193 | J722S_DEV_CLK_32K_RC_SEL_DEV_VD |
| 194 | J722S_DEV_CPT2_AGGR1 |
| 195 | J722S_DEV_CPT2_AGGR0 |
| 196 | J722S_DEV_MCU_CPT2_AGGR0 |
| 197 | J722S_DEV_MCU_DCC1 |
| 198 | J722S_DEV_DMASS1 |
| 199 | J722S_DEV_DMASS1_BCDMA_0 |
| 200 | J722S_DEV_DMASS1_INTAGGR_0 |
| 201 | J722S_DEV_JPGENC0 |
| 202 | J722S_DEV_WKUP_PBIST1 |
| 203 | J722S_DEV_MCU_PBIST0 |
| 204 | J722S_DEV_CODEC0 |
| 205 | J722S_DEV_RTI4 |
| 206 | J722S_DEV_C7XV_RSWS_BS_LIMITER6 |
| 207 | J722S_DEV_C7X256V0 |
| 208 | J722S_DEV_C7X256V0_C7XV_CORE_0 |
| 209 | J722S_DEV_C7X256V0_CORE0 |
| 210 | J722S_DEV_C7X256V0_CLEC |
| 211 | J722S_DEV_C7X256V0_CLK |
| 212 | J722S_DEV_C7X256V0_DEBUG |
| 213 | J722S_DEV_C7X256V0_GICSS |
| 214 | J722S_DEV_C7X256V0_PBIST |
| 215 | J722S_DEV_JPGENC_RS_BW_LIMITER4 |
| 216 | J722S_DEV_JPGENC_WS_BW_LIMITER5 |
| 217 | J722S_DEV_VPAC_RSWS_BW_LIMITER8 |
| 218 | J722S_DEV_VPAC_RSWS_BW_LIMITER7 |
| 219 | J722S_DEV_VPAC0 |
| 220 | J722S_DEV_PBIST3 |
| 221 | J722S_DEV_CODEC_RS_BW_LIMITER2 |
| 222 | J722S_DEV_CODEC_WS_BW_LIMITER3 |
| 225 | J722S_DEV_HSM0 |
| 226 | J722S_DEV_WKUP_CLKOUT_SEL_DEV_VD |
| 227 | J722S_DEV_MCU_OBSCLK_MUX_SEL_DEV_VD |
| 228 | J722S_DEV_OBSCLK0_MUX_SEL_DEV_VD |
| 229 | J722S_DEV_DCC7 |
| 230 | J722S_DEV_DCC8 |
| 231 | J722S_DEV_DSS_DSI0 |
| 232 | J722S_DEV_DSS1 |
| 233 | J722S_DEV_PBIST1 |
| 234 | J722S_DEV_OLDI_TX_CORE0 |
| 235 | J722S_DEV_OLDI_TX_CORE1 |
| 237 | J722S_DEV_GPU0 |
| 238 | J722S_DEV_DPHY_TX0 |
| 240 | J722S_DEV_DSS1_DPI1_PLLSEL_DEV_VD |
| 241 | J722S_DEV_DSS1_DPI0_PLLSEL_DEV_VD |
| 242 | J722S_DEV_GPU0_CORE_VD |
| 243 | J722S_DEV_OLDI0_VD |
| 244 | J722S_DEV_OLDI1_VD |
| 245 | J722S_DEV_DPI0_OUT_SEL_DEV_VD |
| 246 | J722S_DEV_ATL0 |
| 247 | J722S_DEV_CSI_RX_IF1 |
| 248 | J722S_DEV_CSI_RX_IF2 |
| 249 | J722S_DEV_CSI_RX_IF3 |
| 250 | J722S_DEV_CSI_TX_IF0 |
| 251 | J722S_DEV_DPHY_RX1 |
| 252 | J722S_DEV_DPHY_RX2 |
| 253 | J722S_DEV_DPHY_RX3 |
| 254 | J722S_DEV_PBIST2 |
| 255 | J722S_DEV_MCASP3 |
| 256 | J722S_DEV_MCASP4 |
| 257 | J722S_DEV_I2C4 |
| 258 | J722S_DEV_MSRAM8KX256E0 |
| 259 | J722S_DEV_PCIE0 |
| 260 | J722S_DEV_R5FSS0_SS0 |
| 261 | J722S_DEV_R5FSS0 |
| 262 | J722S_DEV_R5FSS0_CORE0 |
| 263 | J722S_DEV_RTI5 |
| 264 | J722S_DEV_RTI8 |
| 265 | J722S_DEV_COMPUTE_CLUSTER0_CLKDIV_0 |
| 266 | J722S_DEV_C7XV_RSWS_BS_LIMITER11 |
| 267 | J722S_DEV_C7X256V1 |
| 268 | J722S_DEV_C7X256V1_C7XV_CORE_0 |
| 269 | J722S_DEV_C7X256V1_CORE0 |
| 270 | J722S_DEV_C7X256V1_CLEC |
| 271 | J722S_DEV_C7X256V1_CLK |
| 272 | J722S_DEV_C7X256V1_DEBUG |
| 273 | J722S_DEV_C7X256V1_GICSS |
| 274 | J722S_DEV_C7X256V1_PBIST |
| 275 | J722S_DEV_CTI0 |
| 276 | J722S_DEV_CTI1 |
| 277 | J722S_DEV_DMPAC0 |
| 278 | J722S_DEV_USB1 |
| 279 | J722S_DEV_SERDES_10G0 |
| 280 | J722S_DEV_SERDES_10G1 |
| 281 | J722S_DEV_WKUP_TIMER1_CLKSEL_VD |
| 282 | J722S_DEV_MCU_TIMER1_CLKSEL_VD |
| 283 | J722S_DEV_MCU_TIMER3_CLKSEL_VD |
| 284 | J722S_DEV_TIMER1_CLKSEL_VD |
| 285 | J722S_DEV_TIMER3_CLKSEL_VD |
| 286 | J722S_DEV_TIMER5_CLKSEL_VD |
| 287 | J722S_DEV_TIMER7_CLKSEL_VD |