AM64X Devices Descriptions¶
Introduction¶
This chapter provides information on Device IDs that are permitted in the am64x SoC. The device IDs represent SoC subsystems that can be modified via DMSC TISCI message APIs. Some Secure, Power, and Resource Management DMSC subsystem TISCI message APIs define a device ID as a parameter allowing a user to specify management of a particular SoC subsystem.
Enumeration of Device IDs¶
| Device ID | Device Name |
|---|---|
| 0 | AM64X_DEV_ADC0 |
| 1 | AM64X_DEV_CMP_EVENT_INTROUTER0 |
| 2 | AM64X_DEV_DBGSUSPENDROUTER0 |
| 3 | AM64X_DEV_MAIN_GPIOMUX_INTROUTER0 |
| 5 | AM64X_DEV_MCU_MCU_GPIOMUX_INTROUTER0 |
| 6 | AM64X_DEV_TIMESYNC_EVENT_INTROUTER0 |
| 7 | AM64X_DEV_MCU_M4FSS0 |
| 8 | AM64X_DEV_MCU_M4FSS0_CBASS_0 |
| 9 | AM64X_DEV_MCU_M4FSS0_CORE0 |
| 13 | AM64X_DEV_CPSW0 |
| 14 | AM64X_DEV_CPT2_AGGR0 |
| 15 | AM64X_DEV_STM0 |
| 16 | AM64X_DEV_DCC0 |
| 17 | AM64X_DEV_DCC1 |
| 18 | AM64X_DEV_DCC2 |
| 19 | AM64X_DEV_DCC3 |
| 20 | AM64X_DEV_DCC4 |
| 21 | AM64X_DEV_DCC5 |
| 22 | AM64X_DEV_DMSC0 |
| 23 | AM64X_DEV_MCU_DCC0 |
| 24 | AM64X_DEV_DEBUGSS_WRAP0 |
| 25 | AM64X_DEV_DMASS0 |
| 26 | AM64X_DEV_DMASS0_BCDMA_0 |
| 27 | AM64X_DEV_DMASS0_CBASS_0 |
| 28 | AM64X_DEV_DMASS0_INTAGGR_0 |
| 29 | AM64X_DEV_DMASS0_IPCSS_0 |
| 30 | AM64X_DEV_DMASS0_PKTDMA_0 |
| 33 | AM64X_DEV_DMASS0_RINGACC_0 |
| 35 | AM64X_DEV_MCU_TIMER0 |
| 36 | AM64X_DEV_TIMER0 |
| 37 | AM64X_DEV_TIMER1 |
| 38 | AM64X_DEV_TIMER2 |
| 39 | AM64X_DEV_TIMER3 |
| 40 | AM64X_DEV_TIMER4 |
| 41 | AM64X_DEV_TIMER5 |
| 42 | AM64X_DEV_TIMER6 |
| 43 | AM64X_DEV_TIMER7 |
| 44 | AM64X_DEV_TIMER8 |
| 45 | AM64X_DEV_TIMER9 |
| 46 | AM64X_DEV_TIMER10 |
| 47 | AM64X_DEV_TIMER11 |
| 48 | AM64X_DEV_MCU_TIMER1 |
| 49 | AM64X_DEV_MCU_TIMER2 |
| 50 | AM64X_DEV_MCU_TIMER3 |
| 51 | AM64X_DEV_ECAP0 |
| 52 | AM64X_DEV_ECAP1 |
| 53 | AM64X_DEV_ECAP2 |
| 54 | AM64X_DEV_ELM0 |
| 55 | AM64X_DEV_EMIF_DATA_0_VD |
| 57 | AM64X_DEV_MMCSD0 |
| 58 | AM64X_DEV_MMCSD1 |
| 59 | AM64X_DEV_EQEP0 |
| 60 | AM64X_DEV_EQEP1 |
| 61 | AM64X_DEV_GTC0 |
| 62 | AM64X_DEV_EQEP2 |
| 63 | AM64X_DEV_ESM0 |
| 64 | AM64X_DEV_MCU_ESM0 |
| 65 | AM64X_DEV_FSIRX0 |
| 66 | AM64X_DEV_FSIRX1 |
| 67 | AM64X_DEV_FSIRX2 |
| 68 | AM64X_DEV_FSIRX3 |
| 69 | AM64X_DEV_FSIRX4 |
| 70 | AM64X_DEV_FSIRX5 |
| 71 | AM64X_DEV_FSITX0 |
| 72 | AM64X_DEV_FSITX1 |
| 73 | AM64X_DEV_FSS0 |
| 74 | AM64X_DEV_FSS0_FSAS_0 |
| 75 | AM64X_DEV_FSS0_OSPI_0 |
| 76 | AM64X_DEV_GICSS0 |
| 77 | AM64X_DEV_GPIO0 |
| 78 | AM64X_DEV_GPIO1 |
| 79 | AM64X_DEV_MCU_GPIO0 |
| 80 | AM64X_DEV_GPMC0 |
| 81 | AM64X_DEV_PRU_ICSSG0 |
| 82 | AM64X_DEV_PRU_ICSSG1 |
| 83 | AM64X_DEV_LED0 |
| 84 | AM64X_DEV_CPTS0 |
| 85 | AM64X_DEV_DDPA0 |
| 86 | AM64X_DEV_EPWM0 |
| 87 | AM64X_DEV_EPWM1 |
| 88 | AM64X_DEV_EPWM2 |
| 89 | AM64X_DEV_EPWM3 |
| 90 | AM64X_DEV_EPWM4 |
| 91 | AM64X_DEV_EPWM5 |
| 92 | AM64X_DEV_EPWM6 |
| 93 | AM64X_DEV_EPWM7 |
| 94 | AM64X_DEV_EPWM8 |
| 95 | AM64X_DEV_VTM0 |
| 96 | AM64X_DEV_MAILBOX0 |
| 97 | AM64X_DEV_MAIN2MCU_VD |
| 98 | AM64X_DEV_MCAN0 |
| 99 | AM64X_DEV_MCAN1 |
| 100 | AM64X_DEV_MCU_MCRC64_0 |
| 101 | AM64X_DEV_MCU2MAIN_VD |
| 102 | AM64X_DEV_I2C0 |
| 103 | AM64X_DEV_I2C1 |
| 104 | AM64X_DEV_I2C2 |
| 105 | AM64X_DEV_I2C3 |
| 106 | AM64X_DEV_MCU_I2C0 |
| 107 | AM64X_DEV_MCU_I2C1 |
| 114 | AM64X_DEV_PCIE0 |
| 119 | AM64X_DEV_R5FSS0 |
| 120 | AM64X_DEV_R5FSS1 |
| 121 | AM64X_DEV_R5FSS0_CORE0 |
| 122 | AM64X_DEV_R5FSS0_CORE1 |
| 123 | AM64X_DEV_R5FSS1_CORE0 |
| 124 | AM64X_DEV_R5FSS1_CORE1 |
| 125 | AM64X_DEV_RTI0 |
| 126 | AM64X_DEV_RTI1 |
| 127 | AM64X_DEV_RTI8 |
| 128 | AM64X_DEV_RTI9 |
| 130 | AM64X_DEV_RTI10 |
| 131 | AM64X_DEV_RTI11 |
| 132 | AM64X_DEV_MCU_RTI0 |
| 133 | AM64X_DEV_SA2_UL0 |
| 134 | AM64X_DEV_COMPUTE_CLUSTER0 |
| 135 | AM64X_DEV_A53SS0_CORE_0 |
| 136 | AM64X_DEV_A53SS0_CORE_1 |
| 137 | AM64X_DEV_A53SS0 |
| 138 | AM64X_DEV_DDR16SS0 |
| 139 | AM64X_DEV_PSC0 |
| 140 | AM64X_DEV_MCU_PSC0 |
| 141 | AM64X_DEV_MCSPI0 |
| 142 | AM64X_DEV_MCSPI1 |
| 143 | AM64X_DEV_MCSPI2 |
| 144 | AM64X_DEV_MCSPI3 |
| 145 | AM64X_DEV_MCSPI4 |
| 146 | AM64X_DEV_UART0 |
| 147 | AM64X_DEV_MCU_MCSPI0 |
| 148 | AM64X_DEV_MCU_MCSPI1 |
| 149 | AM64X_DEV_MCU_UART0 |
| 150 | AM64X_DEV_SPINLOCK0 |
| 151 | AM64X_DEV_TIMERMGR0 |
| 152 | AM64X_DEV_UART1 |
| 153 | AM64X_DEV_UART2 |
| 154 | AM64X_DEV_UART3 |
| 155 | AM64X_DEV_UART4 |
| 156 | AM64X_DEV_UART5 |
| 157 | AM64X_DEV_BOARD0 |
| 158 | AM64X_DEV_UART6 |
| 160 | AM64X_DEV_MCU_UART1 |
| 161 | AM64X_DEV_USB0 |
| 162 | AM64X_DEV_SERDES_10G0 |
| 163 | AM64X_DEV_PBIST0 |
| 164 | AM64X_DEV_PBIST1 |
| 165 | AM64X_DEV_PBIST2 |
| 166 | AM64X_DEV_PBIST3 |
| 167 | AM64X_DEV_COMPUTE_CLUSTER0_PBIST_0 |