J784S4 PLL Defaults¶
PLL Defaults for J784S4 Device¶
This chapter provides information on the PLL defaults which the System firmware programs for J784S4 SoC.
This is what the system firmware programs after the PM board configuration is provided. The exact M and N values programmed are based on the crystal connected on the board. The crystal frequency is understood by the ROM from the BOOTPINS. This value is read by the System Firmware from the DEVSTAT register to determine which HFOSC is connected to the device
The System Firmware maintains a table of device clock frequency defaults at which the PLLs are programmed. This document is a reference that the users of System Firmware can look at to determine the default PLL configuration done during boot when PM board configuration message is sent.
Once the PM Init during board configuration is complete the bootloader or application can program individual clocks of individual modules to tweak the clocks based on the usecase which differ from the default. The APIs to refer to setting individual module clocks are TISCI_MSG_SET_FREQ, TISCI_MSG_QUERY_FREQ.
The following table gives the PLL configurations for the input crystal Frequency of 19.2 MHz.
| PLL Name | CLKOUT Freq (Hz) | N+1 | M | Fractional M | M2 | HSDIV0 | HSDIV1 | HSDIV2 | HSDIV3 | HSDIV4 | HSDIV5 | HSDIV6 | HSDIV7 | HSDIV8 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN (PLLFRACF2_SSMOD_16FFT_MAIN_0) | 1000000000U | 1 | 104 | 2796203 | 2 | 4 | 5 | 10 | 15 | 25 | 20 | 4 | 5 | 4 |
| PER0 (PLLFRACF2_SSMOD_16FFT_MAIN_1) | 960000000U | 1 | 100 | 0 | 2 | 10 | 6 | 10 | 10 | NA | 5 | 50 | 40 | 48 |
| PER1 (PLLFRACF2_SSMOD_16FFT_MAIN_2) | 1800000000U | 1 | 93 | 12582912 | 1 | NA | 3 | 9 | 6 | 18 | NA | 8 | 15 | NA |
| CPSW (PLLFRACF2_SSMOD_16FFT_MAIN_3) | 2500000000U | 1 | 130 | 3495254 | 1 | 10 | 10 | 13 | 10 | 16 | NA | NA | NA | NA |
| AUDIO (PLLFRACF2_SSMOD_16FFT_MAIN_4) | 2359296000U | 1 | 122 | 14763951 | 1 | 12 | 8 | 12 | NA | NA | NA | NA | NA | NA |
| VIDEO (PLLFRACF2_SSMOD_16FFT_MAIN_5) | 2400000000U | 1 | 125 | 0 | 1 | 6 | 4 | NA | NA | NA | NA | NA | NA | NA |
| GPU (PLLFRACF2_SSMOD_16FFT_MAIN_6) | 1600000000U | 1 | 83 | 5592406 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| C7X (PLLFRACF2_SSMOD_16FFT_MAIN_7) | 2000000000U | 1 | 104 | 2796203 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| ARM (PLLFRACF2_SSMOD_16FFT_MAIN_8) | 2000000000U | 1 | 104 | 2796203 | 1 | 1 | NA | NA | NA | NA | NA | NA | NA | NA |
| ARM (PLLFRACF2_SSMOD_16FFT_MAIN_9) | 2000000000U | 1 | 104 | 2796203 | 1 | 1 | NA | NA | NA | NA | NA | NA | NA | NA |
| DDR (PLLFRACF2_SSMOD_16FFT_MAIN_12) | 2133330000U | 1 | 111 | 1861223 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| R5F (PLLFRACF2_SSMOD_16FFT_MAIN_14) | 2000000000U | 1 | 104 | 2796203 | 1 | 2 | 2 | 2 | NA | NA | NA | NA | NA | NA |
| DSS (PLLFRACF2_SSMOD_16FFT_MAIN_16) | 2970000000U | 1 | 154 | 11534336 | 1 | 5 | 5 | NA | NA | NA | NA | NA | NA | NA |
| DSS (PLLFRACF2_SSMOD_16FFT_MAIN_17) | 2970000000U | 1 | 154 | 11534336 | 1 | 5 | 5 | NA | NA | NA | NA | NA | NA | NA |
| DSS (PLLFRACF2_SSMOD_16FFT_MAIN_19) | 1800000000U | 1 | 93 | 12582912 | 1 | 3 | NA | NA | NA | NA | NA | NA | NA | NA |
| VISION (PLLFRACF2_SSMOD_16FFT_MAIN_25) | 2880000000U | 1 | 150 | 0 | 1 | 6 | 4 | NA | NA | NA | NA | NA | NA | NA |
| DDR (PLLFRACF2_SSMOD_16FFT_MAIN_26) | 2133330000U | 1 | 111 | 1861223 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| DDR (PLLFRACF2_SSMOD_16FFT_MAIN_27) | 2133330000U | 1 | 111 | 1861223 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| DDR (PLLFRACF2_SSMOD_16FFT_MAIN_28) | 2133330000U | 1 | 111 | 1861223 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| MCU_PULSAR (PLLFRACF2_SSMOD_16FFT_MCU_0) | 2000000000U | 1 | 104 | 2796203 | 1 | 2 | 34 | NA | NA | NA | NA | NA | NA | NA |
| MCU_PER (PLLFRACF2_SSMOD_16FFT_MCU_1) | 2400000000U | 1 | 125 | 0 | 1 | 6 | 40 | 30 | 25 | 18 | NA | NA | NA | NA |
| MCU_CPSW (PLLFRACF2_SSMOD_16FFT_MCU_2) | 2000000000U | 1 | 104 | 2796203 | 1 | 8 | 4 | 10 | 25 | 12 | NA | NA | NA | NA |
The following table gives the PLL configurations for the input crystal Frequency of 20.0 MHz.
| PLL Name | CLKOUT Freq (Hz) | N+1 | M | Fractional M | M2 | HSDIV0 | HSDIV1 | HSDIV2 | HSDIV3 | HSDIV4 | HSDIV5 | HSDIV6 | HSDIV7 | HSDIV8 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN (PLLFRACF2_SSMOD_16FFT_MAIN_0) | 1000000000U | 1 | 100 | 0 | 2 | 4 | 5 | 10 | 15 | 25 | 20 | 4 | 5 | 4 |
| PER0 (PLLFRACF2_SSMOD_16FFT_MAIN_1) | 960000000U | 1 | 96 | 0 | 2 | 10 | 6 | 10 | 10 | NA | 5 | 50 | 40 | 48 |
| PER1 (PLLFRACF2_SSMOD_16FFT_MAIN_2) | 1800000000U | 1 | 90 | 0 | 1 | NA | 3 | 9 | 6 | 18 | NA | 8 | 15 | NA |
| CPSW (PLLFRACF2_SSMOD_16FFT_MAIN_3) | 2500000000U | 1 | 125 | 0 | 1 | 10 | 10 | 13 | 10 | 16 | NA | NA | NA | NA |
| AUDIO (PLLFRACF2_SSMOD_16FFT_MAIN_4) | 2359296000U | 1 | 117 | 16186658 | 1 | 12 | 8 | 12 | NA | NA | NA | NA | NA | NA |
| VIDEO (PLLFRACF2_SSMOD_16FFT_MAIN_5) | 2400000000U | 1 | 120 | 0 | 1 | 6 | 4 | NA | NA | NA | NA | NA | NA | NA |
| GPU (PLLFRACF2_SSMOD_16FFT_MAIN_6) | 1600000000U | 1 | 80 | 0 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| C7X (PLLFRACF2_SSMOD_16FFT_MAIN_7) | 2000000000U | 1 | 100 | 0 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| ARM (PLLFRACF2_SSMOD_16FFT_MAIN_8) | 2000000000U | 1 | 100 | 0 | 1 | 1 | NA | NA | NA | NA | NA | NA | NA | NA |
| ARM (PLLFRACF2_SSMOD_16FFT_MAIN_9) | 2000000000U | 1 | 100 | 0 | 1 | 1 | NA | NA | NA | NA | NA | NA | NA | NA |
| DDR (PLLFRACF2_SSMOD_16FFT_MAIN_12) | 2133330000U | 1 | 106 | 11182015 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| R5F (PLLFRACF2_SSMOD_16FFT_MAIN_14) | 2000000000U | 1 | 100 | 0 | 1 | 2 | 2 | 2 | NA | NA | NA | NA | NA | NA |
| DSS (PLLFRACF2_SSMOD_16FFT_MAIN_16) | 2970000000U | 1 | 148 | 8388608 | 1 | 5 | 5 | NA | NA | NA | NA | NA | NA | NA |
| DSS (PLLFRACF2_SSMOD_16FFT_MAIN_17) | 2970000000U | 1 | 148 | 8388608 | 1 | 5 | 5 | NA | NA | NA | NA | NA | NA | NA |
| DSS (PLLFRACF2_SSMOD_16FFT_MAIN_19) | 1800000000U | 1 | 90 | 0 | 1 | 3 | NA | NA | NA | NA | NA | NA | NA | NA |
| VISION (PLLFRACF2_SSMOD_16FFT_MAIN_25) | 2880000000U | 1 | 144 | 0 | 1 | 6 | 4 | NA | NA | NA | NA | NA | NA | NA |
| DDR (PLLFRACF2_SSMOD_16FFT_MAIN_26) | 2133330000U | 1 | 106 | 11182015 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| DDR (PLLFRACF2_SSMOD_16FFT_MAIN_27) | 2133330000U | 1 | 106 | 11182015 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| DDR (PLLFRACF2_SSMOD_16FFT_MAIN_28) | 2133330000U | 1 | 106 | 11182015 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| MCU_PULSAR (PLLFRACF2_SSMOD_16FFT_MCU_0) | 2000000000U | 1 | 100 | 0 | 1 | 2 | 34 | NA | NA | NA | NA | NA | NA | NA |
| MCU_PER (PLLFRACF2_SSMOD_16FFT_MCU_1) | 2400000000U | 1 | 120 | 0 | 1 | 6 | 40 | 30 | 25 | 18 | NA | NA | NA | NA |
| MCU_CPSW (PLLFRACF2_SSMOD_16FFT_MCU_2) | 2000000000U | 1 | 100 | 0 | 1 | 8 | 4 | 10 | 25 | 12 | NA | NA | NA | NA |
The following table gives the PLL configurations for the input crystal Frequency of 24.0 MHz.
| PLL Name | CLKOUT Freq (Hz) | N+1 | M | Fractional M | M2 | HSDIV0 | HSDIV1 | HSDIV2 | HSDIV3 | HSDIV4 | HSDIV5 | HSDIV6 | HSDIV7 | HSDIV8 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN (PLLFRACF2_SSMOD_16FFT_MAIN_0) | 1000000000U | 1 | 83 | 5592406 | 2 | 4 | 5 | 10 | 15 | 25 | 20 | 4 | 5 | 4 |
| PER0 (PLLFRACF2_SSMOD_16FFT_MAIN_1) | 960000000U | 1 | 80 | 0 | 2 | 10 | 6 | 10 | 10 | NA | 5 | 50 | 40 | 48 |
| PER1 (PLLFRACF2_SSMOD_16FFT_MAIN_2) | 1800000000U | 1 | 75 | 0 | 1 | NA | 3 | 9 | 6 | 18 | NA | 8 | 15 | NA |
| CPSW (PLLFRACF2_SSMOD_16FFT_MAIN_3) | 2500000000U | 1 | 104 | 2796203 | 1 | 10 | 10 | 13 | 10 | 16 | NA | NA | NA | NA |
| AUDIO (PLLFRACF2_SSMOD_16FFT_MAIN_4) | 2359296000U | 1 | 98 | 5100274 | 1 | 12 | 8 | 12 | NA | NA | NA | NA | NA | NA |
| VIDEO (PLLFRACF2_SSMOD_16FFT_MAIN_5) | 2400000000U | 1 | 100 | 0 | 1 | 6 | 4 | NA | NA | NA | NA | NA | NA | NA |
| GPU (PLLFRACF2_SSMOD_16FFT_MAIN_6) | 1600000000U | 1 | 66 | 11184811 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| C7X (PLLFRACF2_SSMOD_16FFT_MAIN_7) | 2000000000U | 1 | 83 | 5592406 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| ARM (PLLFRACF2_SSMOD_16FFT_MAIN_8) | 2000000000U | 1 | 83 | 5592406 | 1 | 1 | NA | NA | NA | NA | NA | NA | NA | NA |
| ARM (PLLFRACF2_SSMOD_16FFT_MAIN_9) | 2000000000U | 1 | 83 | 5592406 | 1 | 1 | NA | NA | NA | NA | NA | NA | NA | NA |
| DDR (PLLFRACF2_SSMOD_16FFT_MAIN_12) | 2133330000U | 1 | 88 | 14910751 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| R5F (PLLFRACF2_SSMOD_16FFT_MAIN_14) | 2000000000U | 1 | 83 | 5592406 | 1 | 2 | 2 | 2 | NA | NA | NA | NA | NA | NA |
| DSS (PLLFRACF2_SSMOD_16FFT_MAIN_16) | 2970000000U | 1 | 123 | 12582912 | 1 | 5 | 5 | NA | NA | NA | NA | NA | NA | NA |
| DSS (PLLFRACF2_SSMOD_16FFT_MAIN_17) | 2970000000U | 1 | 123 | 12582912 | 1 | 5 | 5 | NA | NA | NA | NA | NA | NA | NA |
| DSS (PLLFRACF2_SSMOD_16FFT_MAIN_19) | 1800000000U | 1 | 75 | 0 | 1 | 3 | NA | NA | NA | NA | NA | NA | NA | NA |
| VISION (PLLFRACF2_SSMOD_16FFT_MAIN_25) | 2880000000U | 1 | 120 | 0 | 1 | 6 | 4 | NA | NA | NA | NA | NA | NA | NA |
| DDR (PLLFRACF2_SSMOD_16FFT_MAIN_26) | 2133330000U | 1 | 88 | 14910751 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| DDR (PLLFRACF2_SSMOD_16FFT_MAIN_27) | 2133330000U | 1 | 88 | 14910751 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| DDR (PLLFRACF2_SSMOD_16FFT_MAIN_28) | 2133330000U | 1 | 88 | 14910751 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| MCU_PULSAR (PLLFRACF2_SSMOD_16FFT_MCU_0) | 2000000000U | 1 | 83 | 5592406 | 1 | 2 | 34 | NA | NA | NA | NA | NA | NA | NA |
| MCU_PER (PLLFRACF2_SSMOD_16FFT_MCU_1) | 2400000000U | 1 | 100 | 0 | 1 | 6 | 40 | 30 | 25 | 18 | NA | NA | NA | NA |
| MCU_CPSW (PLLFRACF2_SSMOD_16FFT_MCU_2) | 2000000000U | 1 | 83 | 5592406 | 1 | 8 | 4 | 10 | 25 | 12 | NA | NA | NA | NA |
The following table gives the PLL configurations for the input crystal Frequency of 25.0 MHz.
| PLL Name | CLKOUT Freq (Hz) | N+1 | M | Fractional M | M2 | HSDIV0 | HSDIV1 | HSDIV2 | HSDIV3 | HSDIV4 | HSDIV5 | HSDIV6 | HSDIV7 | HSDIV8 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN (PLLFRACF2_SSMOD_16FFT_MAIN_0) | 1000000000U | 1 | 80 | 0 | 2 | 4 | 5 | 10 | 15 | 25 | 20 | 4 | 5 | 4 |
| PER0 (PLLFRACF2_SSMOD_16FFT_MAIN_1) | 960000000U | 1 | 76 | 13421773 | 2 | 10 | 6 | 10 | 10 | NA | 5 | 50 | 40 | 48 |
| PER1 (PLLFRACF2_SSMOD_16FFT_MAIN_2) | 1800000000U | 1 | 72 | 0 | 1 | NA | 3 | 9 | 6 | 18 | NA | 8 | 15 | NA |
| CPSW (PLLFRACF2_SSMOD_16FFT_MAIN_3) | 2500000000U | 1 | 100 | 0 | 1 | 10 | 10 | 13 | 10 | 16 | NA | NA | NA | NA |
| AUDIO (PLLFRACF2_SSMOD_16FFT_MAIN_4) | 2359296000U | 1 | 94 | 6238440 | 1 | 12 | 8 | 12 | NA | NA | NA | NA | NA | NA |
| VIDEO (PLLFRACF2_SSMOD_16FFT_MAIN_5) | 2400000000U | 1 | 96 | 0 | 1 | 6 | 4 | NA | NA | NA | NA | NA | NA | NA |
| GPU (PLLFRACF2_SSMOD_16FFT_MAIN_6) | 1600000000U | 1 | 64 | 0 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| C7X (PLLFRACF2_SSMOD_16FFT_MAIN_7) | 2000000000U | 1 | 80 | 0 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| ARM (PLLFRACF2_SSMOD_16FFT_MAIN_8) | 2000000000U | 1 | 80 | 0 | 1 | 1 | NA | NA | NA | NA | NA | NA | NA | NA |
| ARM (PLLFRACF2_SSMOD_16FFT_MAIN_9) | 2000000000U | 1 | 80 | 0 | 1 | 1 | NA | NA | NA | NA | NA | NA | NA | NA |
| DDR (PLLFRACF2_SSMOD_16FFT_MAIN_12) | 2133330000U | 1 | 85 | 5590170 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| R5F (PLLFRACF2_SSMOD_16FFT_MAIN_14) | 2000000000U | 1 | 80 | 0 | 1 | 2 | 2 | 2 | NA | NA | NA | NA | NA | NA |
| DSS (PLLFRACF2_SSMOD_16FFT_MAIN_16) | 2970000000U | 1 | 118 | 13421773 | 1 | 5 | 5 | NA | NA | NA | NA | NA | NA | NA |
| DSS (PLLFRACF2_SSMOD_16FFT_MAIN_17) | 2970000000U | 1 | 118 | 13421773 | 1 | 5 | 5 | NA | NA | NA | NA | NA | NA | NA |
| DSS (PLLFRACF2_SSMOD_16FFT_MAIN_19) | 1800000000U | 1 | 72 | 0 | 1 | 3 | NA | NA | NA | NA | NA | NA | NA | NA |
| VISION (PLLFRACF2_SSMOD_16FFT_MAIN_25) | 2880000000U | 1 | 115 | 3355444 | 1 | 6 | 4 | NA | NA | NA | NA | NA | NA | NA |
| DDR (PLLFRACF2_SSMOD_16FFT_MAIN_26) | 2133330000U | 1 | 85 | 5590170 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| DDR (PLLFRACF2_SSMOD_16FFT_MAIN_27) | 2133330000U | 1 | 85 | 5590170 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| DDR (PLLFRACF2_SSMOD_16FFT_MAIN_28) | 2133330000U | 1 | 85 | 5590170 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| MCU_PULSAR (PLLFRACF2_SSMOD_16FFT_MCU_0) | 2000000000U | 1 | 80 | 0 | 1 | 2 | 34 | NA | NA | NA | NA | NA | NA | NA |
| MCU_PER (PLLFRACF2_SSMOD_16FFT_MCU_1) | 2400000000U | 1 | 96 | 0 | 1 | 6 | 40 | 30 | 25 | 18 | NA | NA | NA | NA |
| MCU_CPSW (PLLFRACF2_SSMOD_16FFT_MCU_2) | 2000000000U | 1 | 80 | 0 | 1 | 8 | 4 | 10 | 25 | 12 | NA | NA | NA | NA |
The following table gives the PLL configurations for the input crystal Frequency of 26.0 MHz.
| PLL Name | CLKOUT Freq (Hz) | N+1 | M | Fractional M | M2 | HSDIV0 | HSDIV1 | HSDIV2 | HSDIV3 | HSDIV4 | HSDIV5 | HSDIV6 | HSDIV7 | HSDIV8 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN (PLLFRACF2_SSMOD_16FFT_MAIN_0) | 1000000000U | 1 | 76 | 15486661 | 2 | 4 | 5 | 10 | 15 | 25 | 20 | 4 | 5 | 4 |
| PER0 (PLLFRACF2_SSMOD_16FFT_MAIN_1) | 960000000U | 1 | 73 | 14196106 | 2 | 10 | 6 | 10 | 10 | NA | 5 | 50 | 40 | 48 |
| PER1 (PLLFRACF2_SSMOD_16FFT_MAIN_2) | 1800000000U | 1 | 69 | 3871666 | 1 | NA | 3 | 9 | 6 | 18 | NA | 8 | 15 | NA |
| CPSW (PLLFRACF2_SSMOD_16FFT_MAIN_3) | 2500000000U | 1 | 96 | 2581111 | 1 | 10 | 10 | 13 | 10 | 16 | NA | NA | NA | NA |
| AUDIO (PLLFRACF2_SSMOD_16FFT_MAIN_4) | 2359296000U | 1 | 90 | 12451276 | 1 | 12 | 8 | 12 | NA | NA | NA | NA | NA | NA |
| VIDEO (PLLFRACF2_SSMOD_16FFT_MAIN_5) | 2400000000U | 1 | 92 | 5162221 | 1 | 6 | 4 | NA | NA | NA | NA | NA | NA | NA |
| GPU (PLLFRACF2_SSMOD_16FFT_MAIN_6) | 1600000000U | 1 | 61 | 9033886 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| C7X (PLLFRACF2_SSMOD_16FFT_MAIN_7) | 2000000000U | 1 | 76 | 15486661 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| ARM (PLLFRACF2_SSMOD_16FFT_MAIN_8) | 2000000000U | 1 | 76 | 15486661 | 1 | 1 | NA | NA | NA | NA | NA | NA | NA | NA |
| ARM (PLLFRACF2_SSMOD_16FFT_MAIN_9) | 2000000000U | 1 | 76 | 15486661 | 1 | 1 | NA | NA | NA | NA | NA | NA | NA | NA |
| DDR (PLLFRACF2_SSMOD_16FFT_MAIN_12) | 2133330000U | 1 | 82 | 858220 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| R5F (PLLFRACF2_SSMOD_16FFT_MAIN_14) | 2000000000U | 1 | 76 | 15486661 | 1 | 2 | 2 | 2 | NA | NA | NA | NA | NA | NA |
| DSS (PLLFRACF2_SSMOD_16FFT_MAIN_16) | 2970000000U | 1 | 114 | 3871666 | 1 | 5 | 5 | NA | NA | NA | NA | NA | NA | NA |
| DSS (PLLFRACF2_SSMOD_16FFT_MAIN_17) | 2970000000U | 1 | 114 | 3871666 | 1 | 5 | 5 | NA | NA | NA | NA | NA | NA | NA |
| DSS (PLLFRACF2_SSMOD_16FFT_MAIN_19) | 1800000000U | 1 | 69 | 3871666 | 1 | 3 | NA | NA | NA | NA | NA | NA | NA | NA |
| VISION (PLLFRACF2_SSMOD_16FFT_MAIN_25) | 2880000000U | 1 | 110 | 12905551 | 1 | 6 | 4 | NA | NA | NA | NA | NA | NA | NA |
| DDR (PLLFRACF2_SSMOD_16FFT_MAIN_26) | 2133330000U | 1 | 82 | 858220 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| DDR (PLLFRACF2_SSMOD_16FFT_MAIN_27) | 2133330000U | 1 | 82 | 858220 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| DDR (PLLFRACF2_SSMOD_16FFT_MAIN_28) | 2133330000U | 1 | 82 | 858220 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| MCU_PULSAR (PLLFRACF2_SSMOD_16FFT_MCU_0) | 2000000000U | 1 | 76 | 15486661 | 1 | 2 | 34 | NA | NA | NA | NA | NA | NA | NA |
| MCU_PER (PLLFRACF2_SSMOD_16FFT_MCU_1) | 2400000000U | 1 | 92 | 5162221 | 1 | 6 | 40 | 30 | 25 | 18 | NA | NA | NA | NA |
| MCU_CPSW (PLLFRACF2_SSMOD_16FFT_MCU_2) | 2000000000U | 1 | 76 | 15486661 | 1 | 8 | 4 | 10 | 25 | 12 | NA | NA | NA | NA |
The following table gives the PLL configurations for the input crystal Frequency of 27.0 MHz.
| PLL Name | CLKOUT Freq (Hz) | N+1 | M | Fractional M | M2 | HSDIV0 | HSDIV1 | HSDIV2 | HSDIV3 | HSDIV4 | HSDIV5 | HSDIV6 | HSDIV7 | HSDIV8 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN (PLLFRACF2_SSMOD_16FFT_MAIN_0) | 1000000000U | 1 | 74 | 1242757 | 2 | 4 | 5 | 10 | 15 | 25 | 20 | 4 | 5 | 4 |
| PER0 (PLLFRACF2_SSMOD_16FFT_MAIN_1) | 960000000U | 1 | 71 | 1864136 | 2 | 10 | 6 | 10 | 10 | NA | 5 | 50 | 40 | 48 |
| PER1 (PLLFRACF2_SSMOD_16FFT_MAIN_2) | 1800000000U | 1 | 66 | 11184811 | 1 | NA | 3 | 9 | 6 | 18 | NA | 8 | 15 | NA |
| CPSW (PLLFRACF2_SSMOD_16FFT_MAIN_3) | 2500000000U | 1 | 92 | 9942054 | 1 | 10 | 10 | 13 | 10 | 16 | NA | NA | NA | NA |
| AUDIO (PLLFRACF2_SSMOD_16FFT_MAIN_4) | 2359296000U | 1 | 87 | 6397712 | 1 | 12 | 8 | 12 | NA | NA | NA | NA | NA | NA |
| VIDEO (PLLFRACF2_SSMOD_16FFT_MAIN_5) | 2400000000U | 1 | 88 | 14913082 | 1 | 6 | 4 | NA | NA | NA | NA | NA | NA | NA |
| GPU (PLLFRACF2_SSMOD_16FFT_MAIN_6) | 1600000000U | 1 | 59 | 4349649 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| C7X (PLLFRACF2_SSMOD_16FFT_MAIN_7) | 2000000000U | 1 | 74 | 1242757 | 1 | 2 | NA | NA | NA | NA | NA | NA | NA | NA |
| ARM (PLLFRACF2_SSMOD_16FFT_MAIN_8) | 2000000000U | 1 | 74 | 1242757 | 1 | 1 | NA | NA | NA | NA | NA | NA | NA | NA |
| ARM (PLLFRACF2_SSMOD_16FFT_MAIN_9) | 2000000000U | 1 | 74 | 1242757 | 1 | 1 | NA | NA | NA | NA | NA | NA | NA | NA |
| R5F (PLLFRACF2_SSMOD_16FFT_MAIN_14) | 2000000000U | 1 | 74 | 1242757 | 1 | 2 | 2 | 2 | NA | NA | NA | NA | NA | NA |
| DSS (PLLFRACF2_SSMOD_16FFT_MAIN_16) | 2970000000U | 1 | 110 | 0 | 1 | 5 | 5 | NA | NA | NA | NA | NA | NA | NA |
| DSS (PLLFRACF2_SSMOD_16FFT_MAIN_17) | 2970000000U | 1 | 110 | 0 | 1 | 5 | 5 | NA | NA | NA | NA | NA | NA | NA |
| DSS (PLLFRACF2_SSMOD_16FFT_MAIN_19) | 1800000000U | 1 | 66 | 11184811 | 1 | 3 | NA | NA | NA | NA | NA | NA | NA | NA |
| VISION (PLLFRACF2_SSMOD_16FFT_MAIN_25) | 2880000000U | 1 | 106 | 11184811 | 1 | 6 | 4 | NA | NA | NA | NA | NA | NA | NA |
| MCU_PULSAR (PLLFRACF2_SSMOD_16FFT_MCU_0) | 2000000000U | 1 | 74 | 1242757 | 1 | 2 | 34 | NA | NA | NA | NA | NA | NA | NA |
| MCU_PER (PLLFRACF2_SSMOD_16FFT_MCU_1) | 2400000000U | 1 | 88 | 14913081 | 1 | 6 | 40 | 30 | 25 | 18 | NA | NA | NA | NA |
| MCU_CPSW (PLLFRACF2_SSMOD_16FFT_MCU_2) | 2000000000U | 1 | 74 | 1242757 | 1 | 8 | 4 | 10 | 25 | 12 | NA | NA | NA | NA |