COEX

This section provides information on the COEX Module Instance within this product. Each of the registers within the Module Instance is described separately below.

 

COEX Registers Mapping Summary

:COEX Common Register Mapping Summary

Register Name

Type

Register Width (Bits)

Register Reset

Address Offset

GENCFG

RW

32

0x0000 001C

0x0000 0000

WIFICFG

RW

32

0x0000 0002

0x0000 0004

BLECFG

RW

32

0x0000 0002

0x0000 0008

EXTSOCCFG

RW

32

0x0000 003E

0x0000 000C

BLEHIPRIRX

RW

32

0x0000 0000

0x0000 0010

BLELOPRIRX

RW

32

0x0000 0000

0x0000 0014

BLEHIPRITX

RW

32

0x0000 0000

0x0000 0018

BLELOPRITX

RW

32

0x0000 0000

0x0000 001C

SOCHIPRI

RW

32

0x0000 0000

0x0000 0020

SOCLOPRI

RW

32

0x0000 0000

0x0000 0024

TIEBREAKER

RW

32

0x0000 0006

0x0000 0028

WIFIMINGT

RW

32

0x0000 0000

0x0000 002C

BLEMINGT

RW

32

0x0000 0000

0x0000 0030

SOCMINGT

RW

32

0x0000 0000

0x0000 0034

SWGRNTOVR

RW

32

0x0000 0000

0x0000 0038

BLEMAXGT

RW

32

0x0000 0000

0x0000 003C

SOCMAXGT

RW

32

0x0000 0000

0x0000 0040

BLET2TIME

RW

32

0x0000 0000

0x0000 0044

SOCT2TIME

RW

32

0x0000 0000

0x0000 0048

WIFI_TO_BLE_GRANT_DELAY

RW

32

0x0000 0000

0x0000 004C

WIFI_TO_SOC_GRANT_DELAY

RW

32

0x0000 0000

0x0000 0050

BLE_TO_SOC_GRANT_DELAY

RW

32

0x0000 0000

0x0000 0054

BLE_TO_WIFI_GRANT_DELAY

RW

32

0x0000 0000

0x0000 0058

SOC_TO_WIFI_GRANT_DELAY

RW

32

0x0000 0000

0x0000 005C

SOC_TO_BLE_GRANT_DELAY

RW

32

0x0000 0000

0x0000 0060

DBGREP

RO

32

0x0000 0000

0x0000 0064

WIFILOG

RO

32

0x0000 0000

0x0000 0068

BLELOG

RO

32

0x0000 0000

0x0000 006C

SOCLOG

RO

32

0x0000 0000

0x0000 0070

WIFIPRIREJ

RO

32

0x0000 0000

0x0000 0078

SOCPRIREJ

RO

32

0x0000 0000

0x0000 007C

BLEPRIREJ

RO

32

0x0000 0000

0x0000 0080

TIMESTAMP

RO

32

0x0000 0000

0x0000 0084

WIFIANTLOG

RO

32

0x0000 0000

0x0000 0088

IRQEVTMSK

RW

32

0x0000 0000

0x0000 008C

ANTCTLCFG1

RW

32

0x0000 0000

0x0000 00C0

ANTCTLCFG2

RW

32

0x0000 0000

0x0000 00C4

ANTCTLSTA

RO

32

0x0000 0000

0x0000 00C8

COEX Instances Register Mapping Summary

COEX Register Descriptions

:COEX Common Register Descriptions

:COEX:GENCFG

Address offset

0x0000 0000

Description

General COEX Configurations.

This register is a static configuration.

Type

RW

Bits

Field Name

Description

Type

Reset

31:7

RESERVED

 

RO

0x000 0000

6

MEM_FREQ_40N80_SEL

This bit configuration is available to select the freq. at which COEX is operating. 1 --> 80 MHz; 0 --> 40 MHz.

RW

0

5

MEM_DEBUG_REPORTING_ENABLE

debug reporting enable:
This bit configuration is available to enable or disable the debug reporting.0 --> No IRQ is generated; 1 --> Debug Mode enable. IRQ is generated whenever there is change in grant state.

RW

0

4:3

MEM_DEF_GRANT_WHEN_NO_REQ

def grant when no req:
This bit configuration is available to select the entity which has the grant when there is no request from any entity.00 --> Wifi; 01 --> BLE, 10 --> SOC, 11 --> Wifi.

RW

0x3

2:1

MEM_DEF_GRANT_WHEN_COEX_DISABLED

def grant when coex disabled:
This bit configuration is available to select the entity which has the grant when COEX is disabled. 00 --> Wifi; 01 --> BLE, 10 --> SOC, 11 --> invalid configuration.

RW

0x2

0

MEM_COEX_ENABLE

This bit configuration is available to enable or disable COEX. Enable --> 1; Disable --> 0.

RW

0

:COEX:WIFICFG

Address offset

0x0000 0004

Description

Wifi Configuration.

This register is available is to program Wifi related general configuration. This register is static configuration.

Type

RW

Bits

Field Name

Description

Type

Reset

31:6

RESERVED_0

 

RO

0x000 0000

5

MEM_WIFI_RX_ONLY_INPUT_BYPASS_VAL

wifi rx only input bypass val:
This bit configuration is available to bypass Wifi_RX_only value.

RW

0

4

MEM_WIFI_ALT_BAND_INPUT_BYPASS_VAL

wifi alt band input bypass val:
This bit configuration is available to configure Wifi_alt_band value.

RW

0

3

MEM_WIFI_RX_ONLY_INPUT_BYPASS

wifi rx only input bypass:
This bit configuration is available to bypass Wifi RX only input. 1 --> Bypass wifi rx only input; 0 --> Do not bypass wifi rx only input.

RW

0

2

MEM_WIFI_ALT_BAND_INPUT_BYPASS

wifi alt band input bypass:
This bit configuration is available to bypass Wifi alt band input. 1 --> Bypass wifi alt band input; 0 --> Do not bypass wifi alt band input.

RW

0

1

MEM_WIFI_GRANT_POLARITY

This bit configuration is available to select Wifi Grant Polarity. 1 --> Default Polarity/Active Low; 0 --> Reverse Polarity/Active High.

RW

1

0

MEM_WIFI_ENABLED

This bit configuration is available to indicate if Wifi is enabled in the design or not. 0 --> Wifi disabled; 1 --> Wifi enabled..

RW

0

:COEX:BLECFG

Address offset

0x0000 0008

Description

BLE Configuration.

This register is available is to program BLE related general configuration. This register is static configuration.

Type

RW

Bits

Field Name

Description

Type

Reset

31:5

RESERVED_1

 

RO

0x000 0000

4

MEM_BLE_RX_BYPASS_VAL

ble rx bypass val:
This bit configuration is available to configure BLE_RX value. This bit takes effect when PTASGNLM is set to 1.

RW

0

3

MEM_BLE_TX_BYPASS_VAL

ble tx bypass val:
This bit configuration is available to configure BLE_TX value. This bit takes effect when PTASGNLM is set to 1.

RW

0

2

MEM_BLE_PTA_SIGNALLING_MODE

ble pta signalling mode:
This bit configuration is available to select if BLE_TX and BLE_RX are to be bypassed. 1 --> Bypass BLE_TX and BLE_RX; 0 --> Do not bypass BLE_TX and BLE_RX input.

RW

0

1

MEM_BLE_GRANT_POLARITY

This bit configuration is available to select BLE Grant Polarity. 1 --> Default Polarity/Active Low; 0 --> Reverse Polarity/Active High.

RW

1

0

MEM_BLE_ENABLED

This bit configuration is available to indicate if BLE is enabled in the design or not. 0 --> BLE disabled; 1 --> BLE enabled..

RW

0

:COEX:EXTSOCCFG

Address offset

0x0000 000C

Description

SOC Configuration.

This register is available is to program EXT SOC related general configuration. This register is a static configuration.

Type

RW

Bits

Field Name

Description

Type

Reset

31:9

RESERVED_2

 

RO

0x00 0000

8:7

MEM_SOC_REQUEST_SIGNAL_DETECTION

This bit configuration is available to select detection mechanism for SOC request. 00 --> Rise edge detection (L -> H) ; 01 --> Fall edge detection (H -> L) ; 10 --> Level detection (active high) ; 11 -> level detection (active low).

RW

0x0

6

MEM_SOC_GRANT_RENEW_BYPASS

soc grant renew bypass:
This bit configuration is available to bypass need to renew soc grant. 1 --> Bypass SOC grant renew; 0 --> SOC needs to renew grant.

RW

0

5

MEM_SOC_GRANT_POLARITY

This bit configuration is available to select SOC Grant Polarity. 1 --> Default Polarity/Active Low; 0 --> Reverse Polarity/Active High.

RW

1

4

MEM_SOC_PRIORITY_POLARITY

This bit configuration is available to select Ext SOC Priority Polarity. 1 --> Default Polarity/Active High; 0 --> Reverse Polarity/Active Low.

RW

1

3

MEM_SOC_REQUEST_POLARITY

This bit configuration is available to select Ext SOC Request Polarity. 1 --> Default Polarity/Active High; 0 --> Reverse Polarity/Active Low.

RW

1

2:1

MEM_SOC_PTA_SIGNALLING_MODE

soc pta signalling mode:
This bit configuration is available to select the Ext SOC PTA signalling mode. 00 --> Reserved; 01 --> 1-wire, 10 --> 2-wires, 11 --> 3-wires.

RW

0x3

0

MEM_SOC_ENABLED

This bit configuration is available to indicate if SOC is enabled in the design or not. 0 --> SOC disabled; 1 --> SOC enabled..

RW

0

:COEX:BLEHIPRIRX

Address offset

0x0000 0010

Description

BLE High Priority Rx.

This Priority register selected when BLE Priority is high and BLE_RX is asserted. This register value should not be changed when BLE request is asserted.

Type

RW

Bits

Field Name

Description

Type

Reset

31:4

RESERVED_3

 

RO

0x000 0000

3:0

MEM_BLEHIPRIRX

Priority levels can be 1 to 15. 0 level indicates no request from BLE.

RW

0x0

:COEX:BLELOPRIRX

Address offset

0x0000 0014

Description

BLE Low Priority Rx.

This Priority register selected when BLE Priority is low and BLE_RX is asserted. This register value should not be changed when BLE request is asserted.

Type

RW

Bits

Field Name

Description

Type

Reset

31:4

RESERVED_4

 

RO

0x000 0000

3:0

MEM_BLELOPRIRX

Priority levels can be 1 to 15. 0 level indicates no request from BLE.

RW

0x0

:COEX:BLEHIPRITX

Address offset

0x0000 0018

Description

BLE High Priority Tx.

This Priority register selected when BLE Priority is high and BLE_TX is asserted. This register value should not be changed when BLE request is asserted.

Type

RW

Bits

Field Name

Description

Type

Reset

31:4

RESERVED_5

 

RO

0x000 0000

3:0

MEM_BLEHIPRITX

Priority levels can be 1 to 15. 0 level indicates no request from BLE.

RW

0x0

:COEX:BLELOPRITX

Address offset

0x0000 001C

Description

BLE Low Priority Tx.

This Priority register selected when BLE Priority is low and BLE_TX is asserted. This register value should not be changed when BLE request is asserted.

Type

RW

Bits

Field Name

Description

Type

Reset

31:4

RESERVED_6

 

RO

0x000 0000

3:0

MEM_BLELOPRITX

Priority levels can be 1 to 15. 0 level indicates no request from BLE.

RW

0x0

:COEX:SOCHIPRI

Address offset

0x0000 0020

Description

SOC High Priority.

This Priority register selected when SOC Priority is high. This register value should not be changed when SOC request is asserted.

Type

RW

Bits

Field Name

Description

Type

Reset

31:4

RESERVED_7

 

RO

0x000 0000

3:0

MEM_SOCHIPRI

Priority levels can be 1 to 15. 0 level indicates no request from SOC.

RW

0x0

:COEX:SOCLOPRI

Address offset

0x0000 0024

Description

SOC Low Priority.

This Priority register selected when SOC Priority is low. This register value should not be changed when SOC request is asserted.

Type

RW

Bits

Field Name

Description

Type

Reset

31:4

RESERVED_8

 

RO

0x000 0000

3:0

MEM_SOCLOPRI

Priority levels can be 1 to 15. 0 level indicates no request from SOC.

RW

0x0

:COEX:TIEBREAKER

Address offset

0x0000 0028

Description

Tie Breaker.

This register is available is to program entity priority which comes into effect when there is a tie between contesting entities. This register is a static configuration. The values in all the three fields need to be unique.

Type

RW

Bits

Field Name

Description

Type

Reset

31:6

RESERVED_9

 

RO

0x000 0000

5:4

MEM_TIEBREAKER_SOC

Priority value for SOC.

RW

0x0

3:2

MEM_TIEBREAKER_BLE

Priority value for BLE.

RW

0x1

1:0

MEM_TIEBREAKER_WIFI

Priority value for Wifi.

RW

0x2

:COEX:WIFIMINGT

Address offset

0x0000 002C

Description

WIFI MIN GRANT TIME:
This register is available is to program wifi minimum grant time. This register is static configuration.

Type

RW

Bits

Field Name

Description

Type

Reset

31:13

RESERVED_WIFI_MIN

 

RO

0x0 0000

12:0

MEM_WIFIMINGT

Wifi min grant time.

RW

0x0000

:COEX:BLEMINGT

Address offset

0x0000 0030

Description

BLE MIN GRANT TIME:
This register is available is to program ble minimum grant time. This register is static configuration.

Type

RW

Bits

Field Name

Description

Type

Reset

31:13

RESERVED_BLE_MIN

 

RO

0x0 0000

12:0

MEM_BLEMINGT

BLE min grant time.

RW

0x0000

:COEX:SOCMINGT

Address offset

0x0000 0034

Description

SOC MIN GRANT TIME:
This register is available is to program soc minimum grant time. This register is static configuration.

Type

RW

Bits

Field Name

Description

Type

Reset

31:13

RESERVED_SOC_MIN

 

RO

0x0 0000

12:0

MEM_SOCMINGT

SOC min grant time.

RW

0x0000

:COEX:SWGRNTOVR

Address offset

0x0000 0038

Description

SW Grant Override.

This register is available to override the grant via SW.

Type

RW

Bits

Field Name

Description

Type

Reset

31:6

RESERVED

reserved

RO

0x000 0000

5

MEM_BLE_GRANT_OVERRIDE_VAL

BLE grant override value.

RW

0

4

MEM_BLE_GRANT_OVERRIDE_CTRL

BLE grant override control.

RW

0

3

MEM_SOC_GRANT_OVERRIDE_VAL

soc grant override value.

RW

0

2

MEM_SOC_GRANT_OVERRIDE_CTRL

soc grant override control.

RW

0

1

MEM_WIFI_GRANT_OVERRIDE_VAL

wifi grant override value

RW

0

0

MEM_WIFI_GRANT_OVERRIDE_CTRL

wifi grant override control.

RW

0

:COEX:BLEMAXGT

Address offset

0x0000 003C

Description

BLE Max Grant Time.

This register is available is to program ble maximum grant time. This register is static configuration.

Type

RW

Bits

Field Name

Description

Type

Reset

31:14

RESERVED_BLE_MAX

 

RO

0x0 0000

13:0

MEM_BLEMAXGT

BLE max grant time.

RW

0x0000

:COEX:SOCMAXGT

Address offset

0x0000 0040

Description

SOC Max Grant Time.

This register is available is to program soc maximum grant time. This register is static configuration.

Type

RW

Bits

Field Name

Description

Type

Reset

31:14

RESERVED_SOC_MAX

 

RO

0x0 0000

13:0

MEM_SOCMAXGT

SOC max grant time.

RW

0x0000

:COEX:BLET2TIME

Address offset

0x0000 0044

Description

BLE T2 Time.

This register is available is to program ble T2 time. This register is static configuration.

Type

RW

Bits

Field Name

Description

Type

Reset

31:6

RESERVED_BLE_T2

 

RO

0x000 0000

5:0

MEM_BLET2TIME

BLE T2 time.

RW

0x00

:COEX:SOCT2TIME

Address offset

0x0000 0048

Description

SOC T2 Time.

This register is available is to program soc T2 time. This register is static configuration.

Type

RW

Bits

Field Name

Description

Type

Reset

31:6

RESERVED_SOC_T2

 

RO

0x000 0000

5:0

MEM_SOCT2TIME

SOC T2 time.

RW

0x00

:COEX:WIFI_TO_BLE_GRANT_DELAY

Address offset

0x0000 004C

Description

WIFI to BLE Grant Delay.

This register is available is to program wifi to ble grant delay time. This register is static configuration.

Type

RW

Bits

Field Name

Description

Type

Reset

31:8

RESERVED_WIFI_TO_BLE

 

RO

0x00 0000

7:0

MEM_WIFI_TO_BLE_GRANT_DELAY

WIFI to BLE grant delay time.

RW

0x00

:COEX:WIFI_TO_SOC_GRANT_DELAY

Address offset

0x0000 0050

Description

WIFI to SOC Grant Delay.

This register is available is to program wifi to soc grant delay time. This register is static configuration.

Type

RW

Bits

Field Name

Description

Type

Reset

31:8

RESERVED_WIFI_TO_SOC

 

RO

0x00 0000

7:0

MEM_WIFI_TO_SOC_GRANT_DELAY

WIFI to SOC grant delay time.

RW

0x00

:COEX:BLE_TO_SOC_GRANT_DELAY

Address offset

0x0000 0054

Description

BLE to SOC Grant Delay.

This register is available is to program ble to soc grant delay time. This register is static configuration.

Type

RW

Bits

Field Name

Description

Type

Reset

31:8

RESERVED_BLE_TO_SOC

 

RO

0x00 0000

7:0

MEM_BLE_TO_SOC_GRANT_DELAY

BLE to SOC grant delay time.

RW

0x00

:COEX:BLE_TO_WIFI_GRANT_DELAY

Address offset

0x0000 0058

Description

BLE to WIFI Grant Delay.

This register is available is to program ble to wifi grant delay time. This register is static configuration.

Type

RW

Bits

Field Name

Description

Type

Reset

31:8

RESERVED_BLE_TO_WIFI

 

RO

0x00 0000

7:0

MEM_BLE_TO_WIFI_GRANT_DELAY

BLE to WIFI grant delay time.

RW

0x00

:COEX:SOC_TO_WIFI_GRANT_DELAY

Address offset

0x0000 005C

Description

SOC to WIFI Grant Delay.

This register is available is to program soc to wifi grant delay time. This register is static configuration.

Type

RW

Bits

Field Name

Description

Type

Reset

31:8

RESERVED_SOC_TO_WIFI

 

RO

0x00 0000

7:0

MEM_SOC_TO_WIFI_GRANT_DELAY

SOC to WIFI grant delay time.

RW

0x00

:COEX:SOC_TO_BLE_GRANT_DELAY

Address offset

0x0000 0060

Description

SOC to BLE Grant Delay.

This register is available is to program soc to ble grant delay time. This register is static configuration.

Type

RW

Bits

Field Name

Description

Type

Reset

31:8

RESERVED_SOC_TO_BLE

 

RO

0x00 0000

7:0

MEM_SOC_TO_BLE_GRANT_DELAY

SOC to BLE grant delay time.

RW

0x00

:COEX:DBGREP

Address offset

0x0000 0064

Description

Debug Report Register.

This register captures state of COEX.

Type

RO

Bits

Field Name

Description

Type

Reset

31:18

RESERVED_DEBUG_REPORT

 

RO

0x0000

17

SOC_GRANT

This field of the register captures the SOCGRNT.

RO

0

16

BLE_GRANT

This field of the register captures the BLEGRNT.

RO

0

15

WIFI_GRANT

This field of the register captures the WIFIGRNT.

RO

0

14

SOC_GRANT_M

This field of the register captures the SOCGRNTM.

RO

0

13

BLE_GRANT_M

This field of the register captures the BLEGRNTM.

RO

0

12

WIFI_GRANT_M

This field of the register captures the WIFIGRNTM.

RO

0

11:8

SOC_PRIO_LVL

This field of the register captures the SOCPRILVL.

RO

0x0

7:4

BLE_PRIO_LVL

This field of the register captures the BLEPRILVL.

RO

0x0

3:0

WIFI_PRIO_LVL

This field of the register captures the WIFIPRILVL.

RO

0x0

:COEX:WIFILOG

Address offset

0x0000 0068

Description

WIFI Request and Grant Log Register.

This register keeps a log of wifi request and grant.

Type

RO

Bits

Field Name

Description

Type

Reset

31:24

WIFI_GRANT_DEASSERTION_LOG

This field of the register captures the number of times the wifi grant was deasserted since last reset.

RO

0x00

23:16

WIFI_GRANT_ASSERTION_LOG

This field of the register captures the number of times the wifi grant was asserted since last reset.

RO

0x00

15:8

WIFI_REQUEST_DE_ASSERTION_LOG

This field of the register captures the number of times the wifi request was dropped/deasserted since last reset.

RO

0x00

7:0

WIFI_REQUEST_ASSERTION_LOG

This field of the register captures the number of times the wifi request was asserted since last reset.

RO

0x00

:COEX:BLELOG

Address offset

0x0000 006C

Description

BLE Request and Grant Log Register.

This register keeps a log of ble request and grant.

Type

RO

Bits

Field Name

Description

Type

Reset

31:24

BLE_GRANT_DEASSERTION_LOG

This field of the register captures the number of times the ble grant was deasserted since last reset.

RO

0x00

23:16

BLE_GRANT_ASSERTION_LOG

This field of the register captures the number of times the ble grant was asserted since last reset.

RO

0x00

15:8

BLE_REQUEST_DEASSERTION_LOG

This field of the register captures the number of times the ble request was dropped/deasserted since last reset.

RO

0x00

7:0

BLE_REQUEST_ASSERTION_LOG

This field of the register captures the number of times the ble request was asserted since last reset.

RO

0x00

:COEX:SOCLOG

Address offset

0x0000 0070

Description

SOC Request and Grant Log Register.

This register keeps a log of soc request and grant.

Type

RO

Bits

Field Name

Description

Type

Reset

31:24

SOC_GRANT_DEASSERTION_LOG

This field of the register captures the number of times the soc grant was deasserted since last reset.

RO

0x00

23:16

SOC_GRANT_ASSERTION_LOG

This field of the register captures the number of times the soc grant was asserted since last reset.

RO

0x00

15:8

SOC_REQUEST_DEASSERTION_LOG

This field of the register captures the number of times the soc request was dropped/deasserted since last reset.

RO

0x00

7:0

SOC_REQUEST_ASSERTION_LOG

This field of the register captures the number of times the soc request was asserted since last reset.

RO

0x00

:COEX:WIFIPRIREJ

Address offset

0x0000 0078

Description

WIFI Priority Reject Log Register.

This register keeps a log of number of times wifi prio was rejected.

Type

RO

Bits

Field Name

Description

Type

Reset

31:8

RESERVED_WIIF_PRIO_REJECT

reserved.

RO

0x00 0000

7:0

WIFI_PRIO_REJECT_LOG

This field of the register captures the number of times the soc request was asserted since last reset.

RO

0x00

:COEX:SOCPRIREJ

Address offset

0x0000 007C

Description

SOC Priority Reject Log Register.

This register keeps a log of number of times soc prio was rejected.

Type

RO

Bits

Field Name

Description

Type

Reset

31:16

RESERVED_SOC_PRIO_REJECT

reserved.

RO

0x0000

15:8

SOCLOPRI_REJECT_LOG

This field of the register captures the number of times the soc low priority was rejected since last reset.

RO

0x00

7:0

SOCHIPRI_REJECT_LOG

This field of the register captures the number of times the soc high priority was rejected since last reset.

RO

0x00

:COEX:BLEPRIREJ

Address offset

0x0000 0080

Description

BLE Priority Reject Log Register.

This register keeps a log of number of times ble prio was rejected.

Type

RO

Bits

Field Name

Description

Type

Reset

31:24

BLE_RX_LOW_PRIO_REJECT_LOG

This field of the register captures the number of times the ble rx low priority was rejected since last reset.

RO

0x00

23:16

BLE_RX_HIGH_PRIO_REJECT_LOG

This field of the register captures the number of times the ble rx high priority was rejected since last reset.

RO

0x00

15:8

BLE_TX_LOW_PRIO_REJECT_LOG

This field of the register captures the number of times the ble tx low priority was rejected since last reset.

RO

0x00

7:0

BLE_TX_HIGH_PRIO_REJECT_LOG

This field of the register captures the number of times the ble tx high priority was rejected since last reset.

RO

0x00

:COEX:TIMESTAMP

Address offset

0x0000 0084

Description

Timestamp Register.

This register captures the TS (from TSF counter) when the coex_irq was generated.

Type

RO

Bits

Field Name

Description

Type

Reset

31:0

TIMESTAMP

This register captures the TS (from TSF counter) when the coex_irq was generated since last reset.

RO

0x0000 0000

:COEX:WIFIANTLOG

Address offset

0x0000 0088

Description

WIFI Grant During Dual Antenna Log Register.

This register keeps a log of number of times ble prio was rejected.

Type

RO

Bits

Field Name

Description

Type

Reset

31:16

RESERVED_DUAL_ANT

reserved

RO

0x0000

15:8

WIFI_GRANT_DURING_DUAL_ANT_ASSERTION_LOG

This field of the register captures the number of times the wifi grant was deasserted during rx_only or alt_band mode since last reset.

RO

0x00

7:0

WIFI_GRANT_DURING_DUAL_ANT_DEASSERTION_LOG

This field of the register captures the number of times the wifi grant was deasserted during rx_only or alt_band mode since last reset.

RO

0x00

:COEX:IRQEVTMSK

Address offset

0x0000 008C

Description

IRQ Event Masking.

This register can be configured to mask the IRQ event.

Type

RW

Bits

Field Name

Description

Type

Reset

31:6

RESERVED_INTERRUPT_MASK

reserved

RO

0x000 0000

5

MEM_MASK_SOC_GRANT

This field of the register is used to mask the interrupt generation caused due to changes in SOCGRNT. 1--> mask the IRQ; 0 --> Unmask the IRQ

RW

0

4

MEM_MASK_BLE_GRANT

This field of the register is used to mask the interrupt generation caused due to changes in BLEGRNT. 1--> mask the IRQ; 0 --> Unmask the IRQ

RW

0

3

MEM_MASK_WIFI_GRANT

This field of the register is used to mask the interrupt generation caused due to changes in WIFIGRNT. 1--> mask the IRQ; 0 --> Unmask the IRQ

RW

0

2

MEM_MASK_SOC_GRANT_M

This field of the register is used to mask the interrupt generation caused due to changes in SOCGRNTM. 1--> mask the IRQ; 0 --> Unmask the IRQ

RW

0

1

MEM_MASK_BLE_GRANT_M

This field of the register is used to mask the interrupt generation caused due to changes in BLEGRNTM. 1--> mask the IRQ; 0 --> Unmask the IRQ

RW

0

0

MEM_MASK_WIFI_GRANT_M

This field of the register is used to mask the interrupt generation caused due to changes in WIFIGRNTM. 1--> mask the IRQ; 0 --> Unmask the IRQ

RW

0

:COEX:ANTCTLCFG1

Address offset

0x0000 00C0

Description

Antenna Control Configuration 1.

Type

RW

Bits

Field Name

Description

Type

Reset

31:22

Reserved

reserved.

RO

0x000

21:20

MEM_GPIO_WIFI_EXTENSION

FW padding for Wifi Core inputs for output mux

RW

0x0

19:18

Reserved

reserved.

RO

0x0

17:16

MEM_SW_INDEX

Bit 0 - SW index value
Bit 1 - SW index override

RW

0x0

15:12

MEM_SW_ANTENNA_CONTROL

SW Enable register <4>

RW

0x0

11:10

Reserved

reserved.

RO

0x0

9:8

MEM_ANTENNA_CONTROL_OVERRIDE

antenna control Mux override <2>

RW

0x0

7

Reserved

reserved.

RO

0

6:4

MEM_SW_ENABLE_GRANT

0- External mask mode
1- BLE Only
2- WiFi Only

RW

0x0

3

Reserved

reserved.

RO

0

2:0

MEM_GRANT_OVERRIDE

0- External enable
1- BLE only enable
2- WiFi only enable

RW

0x0

:COEX:ANTCTLCFG2

Address offset

0x0000 00C4

Description

Antenna Control Configuration 2.

Type

RW

Bits

Field Name

Description

Type

Reset

31:24

Reserved

reserved.

RO

0x00

23:20

MEM_GPIO_ANTENNA_INDX_LUT_5

index 5 - GPIO ANT Polarity 6x4. Mem is statically set on init

RW

0x0

19:16

MEM_GPIO_ANTENNA_INDX_LUT_4

index 4 - GPIO ANT Polarity 6x4. Mem is statically set on init

RW

0x0

15:12

MEM_GPIO_ANTENNA_INDX_LUT_3

index 3 - GPIO ANT Polarity 6x4. Mem is statically set on init

RW

0x0

11:8

MEM_GPIO_ANTENNA_INDX_LUT_2

index 2 - GPIO ANT Polarity 6x4. Mem is statically set on init

RW

0x0

7:4

MEM_GPIO_ANTENNA_INDX_LUT_1

index 1 - GPIO ANT Polarity 6x4. Mem is statically set on init

RW

0x0

3:0

MEM_GPIO_ANTENNA_INDX_LUT_0

index 0 - GPIO ANT Polarity 6x4. Mem is statically set on init

RW

0x0

:COEX:ANTCTLSTA

Address offset

0x0000 00C8

Description

Antenna Control Status.

Type

RO

Bits

Field Name

Description

Type

Reset

31:4

Reserved

reserved.

RO

0x000 0000

3

GPIO_ANT_SEL_3

Captures the ant_sel_3 bit.

RO

0

2

GPIO_ANT_SEL_2

Captures the ant_sel_2 bit .

RO

0

1

GPIO_ANT_SEL_1

Captures the ant_sel_1 bit.

RO

0

0

GPIO_ANT_SEL_0

Captures the ant_sel_0 bit.

RO

0