GPIOMSP432E4.h
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1 /*
2  * Copyright (c) 2017-2019, Texas Instruments Incorporated
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  *
9  * * Redistributions of source code must retain the above copyright
10  * notice, this list of conditions and the following disclaimer.
11  *
12  * * Redistributions in binary form must reproduce the above copyright
13  * notice, this list of conditions and the following disclaimer in the
14  * documentation and/or other materials provided with the distribution.
15  *
16  * * Neither the name of Texas Instruments Incorporated nor the names of
17  * its contributors may be used to endorse or promote products derived
18  * from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
27  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
28  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
29  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
30  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
109 #ifndef ti_drivers_GPIOMSP432E4__include
110 #define ti_drivers_GPIOMSP432E4__include
111 
112 #include <stdint.h>
113 
114 #include <ti/devices/msp432e4/inc/msp432.h>
115 
116 #include <ti/devices/msp432e4/driverlib/gpio.h>
117 
118 #include <ti/drivers/GPIO.h>
119 
120 #ifdef __cplusplus
121 extern "C" {
122 #endif
123 
127 typedef struct {
130 
133 
136 
139 
154  uint32_t intPriority;
156 
160 /*
161  * Note that the port Ids (0x10 and 0x11) for Ports P and Q are out of
162  * sequence. This is to facilitate access to the interrupt vector
163  * table in the implementation. Each pin on ports P and Q has a dedicated
164  * interrupt vector.
165  */
166 #define GPIOMSP432E4_PORTA 0x00
167 #define GPIOMSP432E4_PORTB 0x01
168 #define GPIOMSP432E4_PORTC 0x02
169 #define GPIOMSP432E4_PORTD 0x03
170 #define GPIOMSP432E4_PORTE 0x04
171 #define GPIOMSP432E4_PORTF 0x05
172 #define GPIOMSP432E4_PORTG 0x06
173 #define GPIOMSP432E4_PORTH 0x07
174 #define GPIOMSP432E4_PORTJ 0x08
175 #define GPIOMSP432E4_PORTK 0x09
176 #define GPIOMSP432E4_PORTL 0x0A
177 #define GPIOMSP432E4_PORTM 0x0B
178 #define GPIOMSP432E4_PORTN 0x0C
179 #define GPIOMSP432E4_PORTP 0x10
180 #define GPIOMSP432E4_PORTQ 0x11
181 #define GPIOMSP432E4_PORTR 0x0D
182 #define GPIOMSP432E4_PORTS 0x0E
183 #define GPIOMSP432E4_PORTT 0x0F
184 
192 #define GPIOMSP432E4_EMPTY_PIN 0x0000
193 
194 #define GPIOMSP432E4_PA0 ((GPIOMSP432E4_PORTA << 8) | GPIO_PIN_0)
195 #define GPIOMSP432E4_PA1 ((GPIOMSP432E4_PORTA << 8) | GPIO_PIN_1)
196 #define GPIOMSP432E4_PA2 ((GPIOMSP432E4_PORTA << 8) | GPIO_PIN_2)
197 #define GPIOMSP432E4_PA3 ((GPIOMSP432E4_PORTA << 8) | GPIO_PIN_3)
198 #define GPIOMSP432E4_PA4 ((GPIOMSP432E4_PORTA << 8) | GPIO_PIN_4)
199 #define GPIOMSP432E4_PA5 ((GPIOMSP432E4_PORTA << 8) | GPIO_PIN_5)
200 #define GPIOMSP432E4_PA6 ((GPIOMSP432E4_PORTA << 8) | GPIO_PIN_6)
201 #define GPIOMSP432E4_PA7 ((GPIOMSP432E4_PORTA << 8) | GPIO_PIN_7)
202 
203 #define GPIOMSP432E4_PB0 ((GPIOMSP432E4_PORTB << 8) | GPIO_PIN_0)
204 #define GPIOMSP432E4_PB1 ((GPIOMSP432E4_PORTB << 8) | GPIO_PIN_1)
205 #define GPIOMSP432E4_PB2 ((GPIOMSP432E4_PORTB << 8) | GPIO_PIN_2)
206 #define GPIOMSP432E4_PB3 ((GPIOMSP432E4_PORTB << 8) | GPIO_PIN_3)
207 #define GPIOMSP432E4_PB4 ((GPIOMSP432E4_PORTB << 8) | GPIO_PIN_4)
208 #define GPIOMSP432E4_PB5 ((GPIOMSP432E4_PORTB << 8) | GPIO_PIN_5)
209 #define GPIOMSP432E4_PB6 ((GPIOMSP432E4_PORTB << 8) | GPIO_PIN_6)
210 #define GPIOMSP432E4_PB7 ((GPIOMSP432E4_PORTB << 8) | GPIO_PIN_7)
211 
212 #define GPIOMSP432E4_PC0 ((GPIOMSP432E4_PORTC << 8) | GPIO_PIN_0)
213 #define GPIOMSP432E4_PC1 ((GPIOMSP432E4_PORTC << 8) | GPIO_PIN_1)
214 #define GPIOMSP432E4_PC2 ((GPIOMSP432E4_PORTC << 8) | GPIO_PIN_2)
215 #define GPIOMSP432E4_PC3 ((GPIOMSP432E4_PORTC << 8) | GPIO_PIN_3)
216 #define GPIOMSP432E4_PC4 ((GPIOMSP432E4_PORTC << 8) | GPIO_PIN_4)
217 #define GPIOMSP432E4_PC5 ((GPIOMSP432E4_PORTC << 8) | GPIO_PIN_5)
218 #define GPIOMSP432E4_PC6 ((GPIOMSP432E4_PORTC << 8) | GPIO_PIN_6)
219 #define GPIOMSP432E4_PC7 ((GPIOMSP432E4_PORTC << 8) | GPIO_PIN_7)
220 
221 #define GPIOMSP432E4_PD0 ((GPIOMSP432E4_PORTD << 8) | GPIO_PIN_0)
222 #define GPIOMSP432E4_PD1 ((GPIOMSP432E4_PORTD << 8) | GPIO_PIN_1)
223 #define GPIOMSP432E4_PD2 ((GPIOMSP432E4_PORTD << 8) | GPIO_PIN_2)
224 #define GPIOMSP432E4_PD3 ((GPIOMSP432E4_PORTD << 8) | GPIO_PIN_3)
225 #define GPIOMSP432E4_PD4 ((GPIOMSP432E4_PORTD << 8) | GPIO_PIN_4)
226 #define GPIOMSP432E4_PD5 ((GPIOMSP432E4_PORTD << 8) | GPIO_PIN_5)
227 #define GPIOMSP432E4_PD6 ((GPIOMSP432E4_PORTD << 8) | GPIO_PIN_6)
228 #define GPIOMSP432E4_PD7 ((GPIOMSP432E4_PORTD << 8) | GPIO_PIN_7)
229 
230 #define GPIOMSP432E4_PE0 ((GPIOMSP432E4_PORTE << 8) | GPIO_PIN_0)
231 #define GPIOMSP432E4_PE1 ((GPIOMSP432E4_PORTE << 8) | GPIO_PIN_1)
232 #define GPIOMSP432E4_PE2 ((GPIOMSP432E4_PORTE << 8) | GPIO_PIN_2)
233 #define GPIOMSP432E4_PE3 ((GPIOMSP432E4_PORTE << 8) | GPIO_PIN_3)
234 #define GPIOMSP432E4_PE4 ((GPIOMSP432E4_PORTE << 8) | GPIO_PIN_4)
235 #define GPIOMSP432E4_PE5 ((GPIOMSP432E4_PORTE << 8) | GPIO_PIN_5)
236 #define GPIOMSP432E4_PE6 ((GPIOMSP432E4_PORTE << 8) | GPIO_PIN_6)
237 #define GPIOMSP432E4_PE7 ((GPIOMSP432E4_PORTE << 8) | GPIO_PIN_7)
238 
239 #define GPIOMSP432E4_PF0 ((GPIOMSP432E4_PORTF << 8) | GPIO_PIN_0)
240 #define GPIOMSP432E4_PF1 ((GPIOMSP432E4_PORTF << 8) | GPIO_PIN_1)
241 #define GPIOMSP432E4_PF2 ((GPIOMSP432E4_PORTF << 8) | GPIO_PIN_2)
242 #define GPIOMSP432E4_PF3 ((GPIOMSP432E4_PORTF << 8) | GPIO_PIN_3)
243 #define GPIOMSP432E4_PF4 ((GPIOMSP432E4_PORTF << 8) | GPIO_PIN_4)
244 #define GPIOMSP432E4_PF5 ((GPIOMSP432E4_PORTF << 8) | GPIO_PIN_5)
245 #define GPIOMSP432E4_PF6 ((GPIOMSP432E4_PORTF << 8) | GPIO_PIN_6)
246 #define GPIOMSP432E4_PF7 ((GPIOMSP432E4_PORTF << 8) | GPIO_PIN_7)
247 
248 #define GPIOMSP432E4_PG0 ((GPIOMSP432E4_PORTG << 8) | GPIO_PIN_0)
249 #define GPIOMSP432E4_PG1 ((GPIOMSP432E4_PORTG << 8) | GPIO_PIN_1)
250 #define GPIOMSP432E4_PG2 ((GPIOMSP432E4_PORTG << 8) | GPIO_PIN_2)
251 #define GPIOMSP432E4_PG3 ((GPIOMSP432E4_PORTG << 8) | GPIO_PIN_3)
252 #define GPIOMSP432E4_PG4 ((GPIOMSP432E4_PORTG << 8) | GPIO_PIN_4)
253 #define GPIOMSP432E4_PG5 ((GPIOMSP432E4_PORTG << 8) | GPIO_PIN_5)
254 #define GPIOMSP432E4_PG6 ((GPIOMSP432E4_PORTG << 8) | GPIO_PIN_6)
255 #define GPIOMSP432E4_PG7 ((GPIOMSP432E4_PORTG << 8) | GPIO_PIN_7)
256 
257 #define GPIOMSP432E4_PH0 ((GPIOMSP432E4_PORTH << 8) | GPIO_PIN_0)
258 #define GPIOMSP432E4_PH1 ((GPIOMSP432E4_PORTH << 8) | GPIO_PIN_1)
259 #define GPIOMSP432E4_PH2 ((GPIOMSP432E4_PORTH << 8) | GPIO_PIN_2)
260 #define GPIOMSP432E4_PH3 ((GPIOMSP432E4_PORTH << 8) | GPIO_PIN_3)
261 #define GPIOMSP432E4_PH4 ((GPIOMSP432E4_PORTH << 8) | GPIO_PIN_4)
262 #define GPIOMSP432E4_PH5 ((GPIOMSP432E4_PORTH << 8) | GPIO_PIN_5)
263 #define GPIOMSP432E4_PH6 ((GPIOMSP432E4_PORTH << 8) | GPIO_PIN_6)
264 #define GPIOMSP432E4_PH7 ((GPIOMSP432E4_PORTH << 8) | GPIO_PIN_7)
265 
266 #define GPIOMSP432E4_PJ0 ((GPIOMSP432E4_PORTJ << 8) | GPIO_PIN_0)
267 #define GPIOMSP432E4_PJ1 ((GPIOMSP432E4_PORTJ << 8) | GPIO_PIN_1)
268 #define GPIOMSP432E4_PJ2 ((GPIOMSP432E4_PORTJ << 8) | GPIO_PIN_2)
269 #define GPIOMSP432E4_PJ3 ((GPIOMSP432E4_PORTJ << 8) | GPIO_PIN_3)
270 #define GPIOMSP432E4_PJ4 ((GPIOMSP432E4_PORTJ << 8) | GPIO_PIN_4)
271 #define GPIOMSP432E4_PJ5 ((GPIOMSP432E4_PORTJ << 8) | GPIO_PIN_5)
272 #define GPIOMSP432E4_PJ6 ((GPIOMSP432E4_PORTJ << 8) | GPIO_PIN_6)
273 #define GPIOMSP432E4_PJ7 ((GPIOMSP432E4_PORTJ << 8) | GPIO_PIN_7)
274 
275 #define GPIOMSP432E4_PK0 ((GPIOMSP432E4_PORTK << 8) | GPIO_PIN_0)
276 #define GPIOMSP432E4_PK1 ((GPIOMSP432E4_PORTK << 8) | GPIO_PIN_1)
277 #define GPIOMSP432E4_PK2 ((GPIOMSP432E4_PORTK << 8) | GPIO_PIN_2)
278 #define GPIOMSP432E4_PK3 ((GPIOMSP432E4_PORTK << 8) | GPIO_PIN_3)
279 #define GPIOMSP432E4_PK4 ((GPIOMSP432E4_PORTK << 8) | GPIO_PIN_4)
280 #define GPIOMSP432E4_PK5 ((GPIOMSP432E4_PORTK << 8) | GPIO_PIN_5)
281 #define GPIOMSP432E4_PK6 ((GPIOMSP432E4_PORTK << 8) | GPIO_PIN_6)
282 #define GPIOMSP432E4_PK7 ((GPIOMSP432E4_PORTK << 8) | GPIO_PIN_7)
283 
284 #define GPIOMSP432E4_PL0 ((GPIOMSP432E4_PORTL << 8) | GPIO_PIN_0)
285 #define GPIOMSP432E4_PL1 ((GPIOMSP432E4_PORTL << 8) | GPIO_PIN_1)
286 #define GPIOMSP432E4_PL2 ((GPIOMSP432E4_PORTL << 8) | GPIO_PIN_2)
287 #define GPIOMSP432E4_PL3 ((GPIOMSP432E4_PORTL << 8) | GPIO_PIN_3)
288 #define GPIOMSP432E4_PL4 ((GPIOMSP432E4_PORTL << 8) | GPIO_PIN_4)
289 #define GPIOMSP432E4_PL5 ((GPIOMSP432E4_PORTL << 8) | GPIO_PIN_5)
290 #define GPIOMSP432E4_PL6 ((GPIOMSP432E4_PORTL << 8) | GPIO_PIN_6)
291 #define GPIOMSP432E4_PL7 ((GPIOMSP432E4_PORTL << 8) | GPIO_PIN_7)
292 
293 #define GPIOMSP432E4_PM0 ((GPIOMSP432E4_PORTM << 8) | GPIO_PIN_0)
294 #define GPIOMSP432E4_PM1 ((GPIOMSP432E4_PORTM << 8) | GPIO_PIN_1)
295 #define GPIOMSP432E4_PM2 ((GPIOMSP432E4_PORTM << 8) | GPIO_PIN_2)
296 #define GPIOMSP432E4_PM3 ((GPIOMSP432E4_PORTM << 8) | GPIO_PIN_3)
297 #define GPIOMSP432E4_PM4 ((GPIOMSP432E4_PORTM << 8) | GPIO_PIN_4)
298 #define GPIOMSP432E4_PM5 ((GPIOMSP432E4_PORTM << 8) | GPIO_PIN_5)
299 #define GPIOMSP432E4_PM6 ((GPIOMSP432E4_PORTM << 8) | GPIO_PIN_6)
300 #define GPIOMSP432E4_PM7 ((GPIOMSP432E4_PORTM << 8) | GPIO_PIN_7)
301 
302 #define GPIOMSP432E4_PN0 ((GPIOMSP432E4_PORTN << 8) | GPIO_PIN_0)
303 #define GPIOMSP432E4_PN1 ((GPIOMSP432E4_PORTN << 8) | GPIO_PIN_1)
304 #define GPIOMSP432E4_PN2 ((GPIOMSP432E4_PORTN << 8) | GPIO_PIN_2)
305 #define GPIOMSP432E4_PN3 ((GPIOMSP432E4_PORTN << 8) | GPIO_PIN_3)
306 #define GPIOMSP432E4_PN4 ((GPIOMSP432E4_PORTN << 8) | GPIO_PIN_4)
307 #define GPIOMSP432E4_PN5 ((GPIOMSP432E4_PORTN << 8) | GPIO_PIN_5)
308 #define GPIOMSP432E4_PN6 ((GPIOMSP432E4_PORTN << 8) | GPIO_PIN_6)
309 #define GPIOMSP432E4_PN7 ((GPIOMSP432E4_PORTN << 8) | GPIO_PIN_7)
310 
311 #define GPIOMSP432E4_PP0 ((GPIOMSP432E4_PORTP << 8) | GPIO_PIN_0)
312 #define GPIOMSP432E4_PP1 ((GPIOMSP432E4_PORTP << 8) | GPIO_PIN_1)
313 #define GPIOMSP432E4_PP2 ((GPIOMSP432E4_PORTP << 8) | GPIO_PIN_2)
314 #define GPIOMSP432E4_PP3 ((GPIOMSP432E4_PORTP << 8) | GPIO_PIN_3)
315 #define GPIOMSP432E4_PP4 ((GPIOMSP432E4_PORTP << 8) | GPIO_PIN_4)
316 #define GPIOMSP432E4_PP5 ((GPIOMSP432E4_PORTP << 8) | GPIO_PIN_5)
317 #define GPIOMSP432E4_PP6 ((GPIOMSP432E4_PORTP << 8) | GPIO_PIN_6)
318 #define GPIOMSP432E4_PP7 ((GPIOMSP432E4_PORTP << 8) | GPIO_PIN_7)
319 
320 #define GPIOMSP432E4_PQ0 ((GPIOMSP432E4_PORTQ << 8) | GPIO_PIN_0)
321 #define GPIOMSP432E4_PQ1 ((GPIOMSP432E4_PORTQ << 8) | GPIO_PIN_1)
322 #define GPIOMSP432E4_PQ2 ((GPIOMSP432E4_PORTQ << 8) | GPIO_PIN_2)
323 #define GPIOMSP432E4_PQ3 ((GPIOMSP432E4_PORTQ << 8) | GPIO_PIN_3)
324 #define GPIOMSP432E4_PQ4 ((GPIOMSP432E4_PORTQ << 8) | GPIO_PIN_4)
325 #define GPIOMSP432E4_PQ5 ((GPIOMSP432E4_PORTQ << 8) | GPIO_PIN_5)
326 #define GPIOMSP432E4_PQ6 ((GPIOMSP432E4_PORTQ << 8) | GPIO_PIN_6)
327 #define GPIOMSP432E4_PQ7 ((GPIOMSP432E4_PORTQ << 8) | GPIO_PIN_7)
328 
329 #define GPIOMSP432E4_PR0 ((GPIOMSP432E4_PORTR << 8) | GPIO_PIN_0)
330 #define GPIOMSP432E4_PR1 ((GPIOMSP432E4_PORTR << 8) | GPIO_PIN_1)
331 #define GPIOMSP432E4_PR2 ((GPIOMSP432E4_PORTR << 8) | GPIO_PIN_2)
332 #define GPIOMSP432E4_PR3 ((GPIOMSP432E4_PORTR << 8) | GPIO_PIN_3)
333 #define GPIOMSP432E4_PR4 ((GPIOMSP432E4_PORTR << 8) | GPIO_PIN_4)
334 #define GPIOMSP432E4_PR5 ((GPIOMSP432E4_PORTR << 8) | GPIO_PIN_5)
335 #define GPIOMSP432E4_PR6 ((GPIOMSP432E4_PORTR << 8) | GPIO_PIN_6)
336 #define GPIOMSP432E4_PR7 ((GPIOMSP432E4_PORTR << 8) | GPIO_PIN_7)
337 
338 #define GPIOMSP432E4_PS0 ((GPIOMSP432E4_PORTS << 8) | GPIO_PIN_0)
339 #define GPIOMSP432E4_PS1 ((GPIOMSP432E4_PORTS << 8) | GPIO_PIN_1)
340 #define GPIOMSP432E4_PS2 ((GPIOMSP432E4_PORTS << 8) | GPIO_PIN_2)
341 #define GPIOMSP432E4_PS3 ((GPIOMSP432E4_PORTS << 8) | GPIO_PIN_3)
342 #define GPIOMSP432E4_PS4 ((GPIOMSP432E4_PORTS << 8) | GPIO_PIN_4)
343 #define GPIOMSP432E4_PS5 ((GPIOMSP432E4_PORTS << 8) | GPIO_PIN_5)
344 #define GPIOMSP432E4_PS6 ((GPIOMSP432E4_PORTS << 8) | GPIO_PIN_6)
345 #define GPIOMSP432E4_PS7 ((GPIOMSP432E4_PORTS << 8) | GPIO_PIN_7)
346 
347 #define GPIOMSP432E4_PT0 ((GPIOMSP432E4_PORTT << 8) | GPIO_PIN_0)
348 #define GPIOMSP432E4_PT1 ((GPIOMSP432E4_PORTT << 8) | GPIO_PIN_1)
349 #define GPIOMSP432E4_PT2 ((GPIOMSP432E4_PORTT << 8) | GPIO_PIN_2)
350 #define GPIOMSP432E4_PT3 ((GPIOMSP432E4_PORTT << 8) | GPIO_PIN_3)
351 
352 /*
353  * GPIO_Pxx_xxxx defines (driverlib/pin_map.h) don't use the upper 12
354  * bits of the mask. We'll encode the port and pin ids in the top 8 bits
355  * and the GPIO_Pxx_xxxxx in the lower 24 bits of the following masks.
356  */
357 #define GPIOMSP432E4_pinConfigMask(port, pin, mapping) \
358  (((port) << 27) | ((pin) << 24) | ((mapping) & 0x00FFFFFF))
359 
360 /*
361  * Macros to decode the pinConfigMask from above.
362  */
363 #define GPIOMSP432E4_getPortFromPinConfig(config) (((config) >> 27) & 0x1F)
364 #define GPIOMSP432E4_getPinFromPinConfig(config) (1 << (((config) >> 24) & 0x7))
365 #define GPIOMSP432E4_getPinMapFromPinConfig(config) ((config) & 0xFFFFFF)
366 
375 uint32_t GPIOMSP432E4_getGpioBaseAddr(uint8_t port);
376 
385 uint_fast16_t GPIOMSP432E4_getPowerResourceId(uint8_t port);
386 
392 void GPIOMSP432E4_undoPinConfig(uint32_t pinConfig);
393 
394 #ifdef __cplusplus
395 }
396 #endif
397 
398 #endif /* ti_drivers_GPIOMSP432E4__include */
uint32_t GPIOMSP432E4_getGpioBaseAddr(uint8_t port)
Get the base address for a given port Id.
uint32_t intPriority
Definition: GPIOMSP432E4.h:154
uint32_t numberOfCallbacks
Definition: GPIOMSP432E4.h:138
uint_fast16_t GPIOMSP432E4_getPowerResourceId(uint8_t port)
Get the Power resource Id for a given port Id.
uint32_t numberOfPinConfigs
Definition: GPIOMSP432E4.h:135
GPIO device specific driver configuration structure.
Definition: GPIOMSP432E4.h:127
GPIO_CallbackFxn * callbacks
Definition: GPIOMSP432E4.h:132
uint32_t GPIO_PinConfig
GPIO pin configuration settings.
Definition: GPIO.h:327
void GPIOMSP432E4_undoPinConfig(uint32_t pinConfig)
Undo pin configuration.
GPIO_PinConfig * pinConfigs
Definition: GPIOMSP432E4.h:129
General Purpose I/O driver interface.
void(* GPIO_CallbackFxn)(uint_least8_t index)
GPIO callback function type.
Definition: GPIO.h:415
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