hw_eeprom.h
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1 //*****************************************************************************
2 //
3 // hw_eeprom.h - Macros used when accessing the EEPROM controller.
4 //
5 // Copyright (c) 2011-2017 Texas Instruments Incorporated. All rights reserved.
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35 //
36 //*****************************************************************************
37 
38 #ifndef __HW_EEPROM_H__
39 #define __HW_EEPROM_H__
40 
41 //*****************************************************************************
42 //
43 // The following are defines for the EEPROM register offsets.
44 //
45 //*****************************************************************************
46 #define EEPROM_EESIZE 0x400AF000 // EEPROM Size Information
47 #define EEPROM_EEBLOCK 0x400AF004 // EEPROM Current Block
48 #define EEPROM_EEOFFSET 0x400AF008 // EEPROM Current Offset
49 #define EEPROM_EERDWR 0x400AF010 // EEPROM Read-Write
50 #define EEPROM_EERDWRINC 0x400AF014 // EEPROM Read-Write with Increment
51 #define EEPROM_EEDONE 0x400AF018 // EEPROM Done Status
52 #define EEPROM_EESUPP 0x400AF01C // EEPROM Support Control and
53  // Status
54 #define EEPROM_EEUNLOCK 0x400AF020 // EEPROM Unlock
55 #define EEPROM_EEPROT 0x400AF030 // EEPROM Protection
56 #define EEPROM_EEPASS0 0x400AF034 // EEPROM Password
57 #define EEPROM_EEPASS1 0x400AF038 // EEPROM Password
58 #define EEPROM_EEPASS2 0x400AF03C // EEPROM Password
59 #define EEPROM_EEINT 0x400AF040 // EEPROM Interrupt
60 #define EEPROM_EEHIDE0 0x400AF050 // EEPROM Block Hide 0
61 #define EEPROM_EEHIDE 0x400AF050 // EEPROM Block Hide
62 #define EEPROM_EEHIDE1 0x400AF054 // EEPROM Block Hide 1
63 #define EEPROM_EEHIDE2 0x400AF058 // EEPROM Block Hide 2
64 #define EEPROM_EEDBGME 0x400AF080 // EEPROM Debug Mass Erase
65 #define EEPROM_PP 0x400AFFC0 // EEPROM Peripheral Properties
66 
67 //*****************************************************************************
68 //
69 // The following are defines for the bit fields in the EEPROM_EESIZE register.
70 //
71 //*****************************************************************************
72 #define EEPROM_EESIZE_WORDCNT_M 0x0000FFFF // Number of 32-Bit Words
73 #define EEPROM_EESIZE_BLKCNT_M 0x07FF0000 // Number of 16-Word Blocks
74 #define EEPROM_EESIZE_WORDCNT_S 0
75 #define EEPROM_EESIZE_BLKCNT_S 16
76 
77 //*****************************************************************************
78 //
79 // The following are defines for the bit fields in the EEPROM_EEBLOCK register.
80 //
81 //*****************************************************************************
82 #define EEPROM_EEBLOCK_BLOCK_M 0x0000FFFF // Current Block
83 #define EEPROM_EEBLOCK_BLOCK_S 0
84 
85 //*****************************************************************************
86 //
87 // The following are defines for the bit fields in the EEPROM_EEOFFSET
88 // register.
89 //
90 //*****************************************************************************
91 #define EEPROM_EEOFFSET_OFFSET_M \
92  0x0000000F // Current Address Offset
93 #define EEPROM_EEOFFSET_OFFSET_S \
94  0
95 
96 //*****************************************************************************
97 //
98 // The following are defines for the bit fields in the EEPROM_EERDWR register.
99 //
100 //*****************************************************************************
101 #define EEPROM_EERDWR_VALUE_M 0xFFFFFFFF // EEPROM Read or Write Data
102 #define EEPROM_EERDWR_VALUE_S 0
103 
104 //*****************************************************************************
105 //
106 // The following are defines for the bit fields in the EEPROM_EERDWRINC
107 // register.
108 //
109 //*****************************************************************************
110 #define EEPROM_EERDWRINC_VALUE_M \
111  0xFFFFFFFF // EEPROM Read or Write Data with
112  // Increment
113 #define EEPROM_EERDWRINC_VALUE_S \
114  0
115 
116 //*****************************************************************************
117 //
118 // The following are defines for the bit fields in the EEPROM_EEDONE register.
119 //
120 //*****************************************************************************
121 #define EEPROM_EEDONE_WORKING 0x00000001 // EEPROM Working
122 #define EEPROM_EEDONE_WKERASE 0x00000004 // Working on an Erase
123 #define EEPROM_EEDONE_WKCOPY 0x00000008 // Working on a Copy
124 #define EEPROM_EEDONE_NOPERM 0x00000010 // Write Without Permission
125 #define EEPROM_EEDONE_WRBUSY 0x00000020 // Write Busy
126 
127 //*****************************************************************************
128 //
129 // The following are defines for the bit fields in the EEPROM_EESUPP register.
130 //
131 //*****************************************************************************
132 #define EEPROM_EESUPP_ERETRY 0x00000004 // Erase Must Be Retried
133 #define EEPROM_EESUPP_PRETRY 0x00000008 // Programming Must Be Retried
134 
135 //*****************************************************************************
136 //
137 // The following are defines for the bit fields in the EEPROM_EEUNLOCK
138 // register.
139 //
140 //*****************************************************************************
141 #define EEPROM_EEUNLOCK_UNLOCK_M \
142  0xFFFFFFFF // EEPROM Unlock
143 
144 //*****************************************************************************
145 //
146 // The following are defines for the bit fields in the EEPROM_EEPROT register.
147 //
148 //*****************************************************************************
149 #define EEPROM_EEPROT_PROT_M 0x00000007 // Protection Control
150 #define EEPROM_EEPROT_PROT_RWNPW \
151  0x00000000 // This setting is the default. If
152  // there is no password, the block
153  // is not protected and is readable
154  // and writable
155 #define EEPROM_EEPROT_PROT_RWPW 0x00000001 // If there is a password, the
156  // block is readable or writable
157  // only when unlocked
158 #define EEPROM_EEPROT_PROT_RONPW \
159  0x00000002 // If there is no password, the
160  // block is readable, not writable
161 #define EEPROM_EEPROT_ACC 0x00000008 // Access Control
162 
163 //*****************************************************************************
164 //
165 // The following are defines for the bit fields in the EEPROM_EEPASS0 register.
166 //
167 //*****************************************************************************
168 #define EEPROM_EEPASS0_PASS_M 0xFFFFFFFF // Password
169 #define EEPROM_EEPASS0_PASS_S 0
170 
171 //*****************************************************************************
172 //
173 // The following are defines for the bit fields in the EEPROM_EEPASS1 register.
174 //
175 //*****************************************************************************
176 #define EEPROM_EEPASS1_PASS_M 0xFFFFFFFF // Password
177 #define EEPROM_EEPASS1_PASS_S 0
178 
179 //*****************************************************************************
180 //
181 // The following are defines for the bit fields in the EEPROM_EEPASS2 register.
182 //
183 //*****************************************************************************
184 #define EEPROM_EEPASS2_PASS_M 0xFFFFFFFF // Password
185 #define EEPROM_EEPASS2_PASS_S 0
186 
187 //*****************************************************************************
188 //
189 // The following are defines for the bit fields in the EEPROM_EEINT register.
190 //
191 //*****************************************************************************
192 #define EEPROM_EEINT_INT 0x00000001 // Interrupt Enable
193 
194 //*****************************************************************************
195 //
196 // The following are defines for the bit fields in the EEPROM_EEHIDE0 register.
197 //
198 //*****************************************************************************
199 #define EEPROM_EEHIDE0_HN_M 0xFFFFFFFE // Hide Block
200 
201 //*****************************************************************************
202 //
203 // The following are defines for the bit fields in the EEPROM_EEHIDE register.
204 //
205 //*****************************************************************************
206 #define EEPROM_EEHIDE_HN_M 0xFFFFFFFE // Hide Block
207 
208 //*****************************************************************************
209 //
210 // The following are defines for the bit fields in the EEPROM_EEHIDE1 register.
211 //
212 //*****************************************************************************
213 #define EEPROM_EEHIDE1_HN_M 0xFFFFFFFF // Hide Block
214 
215 //*****************************************************************************
216 //
217 // The following are defines for the bit fields in the EEPROM_EEHIDE2 register.
218 //
219 //*****************************************************************************
220 #define EEPROM_EEHIDE2_HN_M 0xFFFFFFFF // Hide Block
221 
222 //*****************************************************************************
223 //
224 // The following are defines for the bit fields in the EEPROM_EEDBGME register.
225 //
226 //*****************************************************************************
227 #define EEPROM_EEDBGME_ME 0x00000001 // Mass Erase
228 #define EEPROM_EEDBGME_KEY_M 0xFFFF0000 // Erase Key
229 #define EEPROM_EEDBGME_KEY_S 16
230 
231 //*****************************************************************************
232 //
233 // The following are defines for the bit fields in the EEPROM_PP register.
234 //
235 //*****************************************************************************
236 #define EEPROM_PP_SIZE_M 0x0000FFFF // EEPROM Size
237 #define EEPROM_PP_SIZE_64 0x00000000 // 64 bytes of EEPROM
238 #define EEPROM_PP_SIZE_128 0x00000001 // 128 bytes of EEPROM
239 #define EEPROM_PP_SIZE_256 0x00000003 // 256 bytes of EEPROM
240 #define EEPROM_PP_SIZE_512 0x00000007 // 512 bytes of EEPROM
241 #define EEPROM_PP_SIZE_1K 0x0000000F // 1 KB of EEPROM
242 #define EEPROM_PP_SIZE_2K 0x0000001F // 2 KB of EEPROM
243 #define EEPROM_PP_SIZE_3K 0x0000003F // 3 KB of EEPROM
244 #define EEPROM_PP_SIZE_4K 0x0000007F // 4 KB of EEPROM
245 #define EEPROM_PP_SIZE_5K 0x000000FF // 5 KB of EEPROM
246 #define EEPROM_PP_SIZE_6K 0x000001FF // 6 KB of EEPROM
247 #define EEPROM_PP_SIZE_S 0
248 
249 #endif // __HW_EEPROM_H__
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