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Go to the documentation of this file. 46 #define DES_O_KEY3_L 0x00000000 // DES Key 3 LSW for 192-Bit Key 47 #define DES_O_KEY3_H 0x00000004 // DES Key 3 MSW for 192-Bit Key 48 #define DES_O_KEY2_L 0x00000008 // DES Key 2 LSW for 128-Bit Key 49 #define DES_O_KEY2_H 0x0000000C // DES Key 2 MSW for 128-Bit Key 50 #define DES_O_KEY1_L 0x00000010 // DES Key 1 LSW for 64-Bit Key 51 #define DES_O_KEY1_H 0x00000014 // DES Key 1 MSW for 64-Bit Key 52 #define DES_O_IV_L 0x00000018 // DES Initialization Vector 53 #define DES_O_IV_H 0x0000001C // DES Initialization Vector 54 #define DES_O_CTRL 0x00000020 // DES Control 55 #define DES_O_LENGTH 0x00000024 // DES Cryptographic Data Length 56 #define DES_O_DATA_L 0x00000028 // DES LSW Data RW 57 #define DES_O_DATA_H 0x0000002C // DES MSW Data RW 58 #define DES_O_REVISION 0x00000030 // DES Revision Number 59 #define DES_O_SYSCONFIG 0x00000034 // DES System Configuration 60 #define DES_O_SYSSTATUS 0x00000038 // DES System Status 61 #define DES_O_IRQSTATUS 0x0000003C // DES Interrupt Status 62 #define DES_O_IRQENABLE 0x00000040 // DES Interrupt Enable 63 #define DES_O_DIRTYBITS 0x00000044 // DES Dirty Bits 64 #define DES_O_DMAIM 0xFFFF8030 // DES DMA Interrupt Mask 65 #define DES_O_DMARIS 0xFFFF8034 // DES DMA Raw Interrupt Status 66 #define DES_O_DMAMIS 0xFFFF8038 // DES DMA Masked Interrupt Status 67 #define DES_O_DMAIC 0xFFFF803C // DES DMA Interrupt Clear 74 #define DES_KEY3_L_KEY_M 0xFFFFFFFF // Key Data 75 #define DES_KEY3_L_KEY_S 0 82 #define DES_KEY3_H_KEY_M 0xFFFFFFFF // Key Data 83 #define DES_KEY3_H_KEY_S 0 90 #define DES_KEY2_L_KEY_M 0xFFFFFFFF // Key Data 91 #define DES_KEY2_L_KEY_S 0 98 #define DES_KEY2_H_KEY_M 0xFFFFFFFF // Key Data 99 #define DES_KEY2_H_KEY_S 0 106 #define DES_KEY1_L_KEY_M 0xFFFFFFFF // Key Data 107 #define DES_KEY1_L_KEY_S 0 114 #define DES_KEY1_H_KEY_M 0xFFFFFFFF // Key Data 115 #define DES_KEY1_H_KEY_S 0 122 #define DES_IV_L_M 0xFFFFFFFF // Initialization vector for CBC, 131 #define DES_IV_H_M 0xFFFFFFFF // Initialization vector for CBC, 140 #define DES_CTRL_CONTEXT 0x80000000 // If 1, this read-only status bit 145 #define DES_CTRL_MODE_M 0x00000030 // Select CBC, ECB or CFB mode0x0: 148 #define DES_CTRL_TDES 0x00000008 // Select DES or triple DES 150 #define DES_CTRL_DIRECTION 0x00000004 // Select encryption/decryption 153 #define DES_CTRL_INPUT_READY 0x00000002 // When 1, ready to encrypt/decrypt 155 #define DES_CTRL_OUTPUT_READY 0x00000001 // When 1, Data decrypted/encrypted 157 #define DES_CTRL_MODE_S 4 164 #define DES_LENGTH_M 0xFFFFFFFF // Cryptographic data length in 166 #define DES_LENGTH_S 0 173 #define DES_DATA_L_M 0xFFFFFFFF // Data for encryption/decryption, 175 #define DES_DATA_L_S 0 182 #define DES_DATA_H_M 0xFFFFFFFF // Data for encryption/decryption, 184 #define DES_DATA_H_S 0 191 #define DES_REVISION_M 0xFFFFFFFF // Revision number 192 #define DES_REVISION_S 0 200 #define DES_SYSCONFIG_DMA_REQ_CONTEXT_IN_EN \ 201 0x00000080 // DMA Request Context In Enable 202 #define DES_SYSCONFIG_DMA_REQ_DATA_OUT_EN \ 203 0x00000040 // DMA Request Data Out Enable 204 #define DES_SYSCONFIG_DMA_REQ_DATA_IN_EN \ 205 0x00000020 // DMA Request Data In Enable 206 #define DES_SYSCONFIG_SIDLE_M 0x0000000C // Sidle mode 207 #define DES_SYSCONFIG_SIDLE_FORCE \ 208 0x00000000 // Force-idle mode 209 #define DES_SYSCONFIG_SOFTRESET 0x00000002 // Soft reset 217 #define DES_SYSSTATUS_RESETDONE 0x00000001 // Reset Done 225 #define DES_IRQSTATUS_DATA_OUT 0x00000004 // This bit indicates data output 228 #define DES_IRQSTATUS_DATA_IN 0x00000002 // This bit indicates data input 231 #define DES_IRQSTATUS_CONTEX_IN 0x00000001 // This bit indicates context 241 #define DES_IRQENABLE_M_DATA_OUT \ 242 0x00000004 // If this bit is set to 1 the data 244 #define DES_IRQENABLE_M_DATA_IN 0x00000002 // If this bit is set to 1 the data 246 #define DES_IRQENABLE_M_CONTEX_IN \ 247 0x00000001 // If this bit is set to 1 the 256 #define DES_DIRTYBITS_S_DIRTY 0x00000002 // This bit is set to 1 by the 259 #define DES_DIRTYBITS_S_ACCESS 0x00000001 // This bit is set to 1 by the 268 #define DES_DMAIM_DOUT 0x00000004 // Data Out DMA Done Interrupt Mask 269 #define DES_DMAIM_DIN 0x00000002 // Data In DMA Done Interrupt Mask 270 #define DES_DMAIM_CIN 0x00000001 // Context In DMA Done Interrupt 278 #define DES_DMARIS_DOUT 0x00000004 // Data Out DMA Done Raw Interrupt 280 #define DES_DMARIS_DIN 0x00000002 // Data In DMA Done Raw Interrupt 282 #define DES_DMARIS_CIN 0x00000001 // Context In DMA Done Raw 290 #define DES_DMAMIS_DOUT 0x00000004 // Data Out DMA Done Masked 292 #define DES_DMAMIS_DIN 0x00000002 // Data In DMA Done Masked 294 #define DES_DMAMIS_CIN 0x00000001 // Context In DMA Done Raw 302 #define DES_DMAIC_DOUT 0x00000004 // Data Out DMA Done Interrupt 304 #define DES_DMAIC_DIN 0x00000002 // Data In DMA Done Interrupt Clear 305 #define DES_DMAIC_CIN 0x00000001 // Context In DMA Done Raw 308 #endif // __HW_DES_H__
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