hw_comp.h
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1 //*****************************************************************************
2 //
3 // hw_comp.h - Macros used when accessing the comparator hardware.
4 //
5 // Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved.
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36 //*****************************************************************************
37 
38 #ifndef __HW_COMP_H__
39 #define __HW_COMP_H__
40 
41 //*****************************************************************************
42 //
43 // The following are defines for the Comparator register offsets.
44 //
45 //*****************************************************************************
46 #define COMP_O_ACMIS 0x00000000 // Analog Comparator Masked
47  // Interrupt Status
48 #define COMP_O_ACRIS 0x00000004 // Analog Comparator Raw Interrupt
49  // Status
50 #define COMP_O_ACINTEN 0x00000008 // Analog Comparator Interrupt
51  // Enable
52 #define COMP_O_ACREFCTL 0x00000010 // Analog Comparator Reference
53  // Voltage Control
54 #define COMP_O_ACSTAT0 0x00000020 // Analog Comparator Status 0
55 #define COMP_O_ACCTL0 0x00000024 // Analog Comparator Control 0
56 #define COMP_O_ACSTAT1 0x00000040 // Analog Comparator Status 1
57 #define COMP_O_ACCTL1 0x00000044 // Analog Comparator Control 1
58 #define COMP_O_ACSTAT2 0x00000060 // Analog Comparator Status 2
59 #define COMP_O_ACCTL2 0x00000064 // Analog Comparator Control 2
60 #define COMP_O_PP 0x00000FC0 // Analog Comparator Peripheral
61  // Properties
62 
63 //*****************************************************************************
64 //
65 // The following are defines for the bit fields in the COMP_O_ACMIS register.
66 //
67 //*****************************************************************************
68 #define COMP_ACMIS_IN2 0x00000004 // Comparator 2 Masked Interrupt
69  // Status
70 #define COMP_ACMIS_IN1 0x00000002 // Comparator 1 Masked Interrupt
71  // Status
72 #define COMP_ACMIS_IN0 0x00000001 // Comparator 0 Masked Interrupt
73  // Status
74 
75 //*****************************************************************************
76 //
77 // The following are defines for the bit fields in the COMP_O_ACRIS register.
78 //
79 //*****************************************************************************
80 #define COMP_ACRIS_IN2 0x00000004 // Comparator 2 Interrupt Status
81 #define COMP_ACRIS_IN1 0x00000002 // Comparator 1 Interrupt Status
82 #define COMP_ACRIS_IN0 0x00000001 // Comparator 0 Interrupt Status
83 
84 //*****************************************************************************
85 //
86 // The following are defines for the bit fields in the COMP_O_ACINTEN register.
87 //
88 //*****************************************************************************
89 #define COMP_ACINTEN_IN2 0x00000004 // Comparator 2 Interrupt Enable
90 #define COMP_ACINTEN_IN1 0x00000002 // Comparator 1 Interrupt Enable
91 #define COMP_ACINTEN_IN0 0x00000001 // Comparator 0 Interrupt Enable
92 
93 //*****************************************************************************
94 //
95 // The following are defines for the bit fields in the COMP_O_ACREFCTL
96 // register.
97 //
98 //*****************************************************************************
99 #define COMP_ACREFCTL_EN 0x00000200 // Resistor Ladder Enable
100 #define COMP_ACREFCTL_RNG 0x00000100 // Resistor Ladder Range
101 #define COMP_ACREFCTL_VREF_M 0x0000000F // Resistor Ladder Voltage Ref
102 #define COMP_ACREFCTL_VREF_S 0
103 
104 //*****************************************************************************
105 //
106 // The following are defines for the bit fields in the COMP_O_ACSTAT0 register.
107 //
108 //*****************************************************************************
109 #define COMP_ACSTAT0_OVAL 0x00000002 // Comparator Output Value
110 
111 //*****************************************************************************
112 //
113 // The following are defines for the bit fields in the COMP_O_ACCTL0 register.
114 //
115 //*****************************************************************************
116 #define COMP_ACCTL0_TOEN 0x00000800 // Trigger Output Enable
117 #define COMP_ACCTL0_ASRCP_M 0x00000600 // Analog Source Positive
118 #define COMP_ACCTL0_ASRCP_PIN 0x00000000 // Pin value of Cn+
119 #define COMP_ACCTL0_ASRCP_PIN0 0x00000200 // Pin value of C0+
120 #define COMP_ACCTL0_ASRCP_REF 0x00000400 // Internal voltage reference
121 #define COMP_ACCTL0_TSLVAL 0x00000080 // Trigger Sense Level Value
122 #define COMP_ACCTL0_TSEN_M 0x00000060 // Trigger Sense
123 #define COMP_ACCTL0_TSEN_LEVEL 0x00000000 // Level sense, see TSLVAL
124 #define COMP_ACCTL0_TSEN_FALL 0x00000020 // Falling edge
125 #define COMP_ACCTL0_TSEN_RISE 0x00000040 // Rising edge
126 #define COMP_ACCTL0_TSEN_BOTH 0x00000060 // Either edge
127 #define COMP_ACCTL0_ISLVAL 0x00000010 // Interrupt Sense Level Value
128 #define COMP_ACCTL0_ISEN_M 0x0000000C // Interrupt Sense
129 #define COMP_ACCTL0_ISEN_LEVEL 0x00000000 // Level sense, see ISLVAL
130 #define COMP_ACCTL0_ISEN_FALL 0x00000004 // Falling edge
131 #define COMP_ACCTL0_ISEN_RISE 0x00000008 // Rising edge
132 #define COMP_ACCTL0_ISEN_BOTH 0x0000000C // Either edge
133 #define COMP_ACCTL0_CINV 0x00000002 // Comparator Output Invert
134 
135 //*****************************************************************************
136 //
137 // The following are defines for the bit fields in the COMP_O_ACSTAT1 register.
138 //
139 //*****************************************************************************
140 #define COMP_ACSTAT1_OVAL 0x00000002 // Comparator Output Value
141 
142 //*****************************************************************************
143 //
144 // The following are defines for the bit fields in the COMP_O_ACCTL1 register.
145 //
146 //*****************************************************************************
147 #define COMP_ACCTL1_TOEN 0x00000800 // Trigger Output Enable
148 #define COMP_ACCTL1_ASRCP_M 0x00000600 // Analog Source Positive
149 #define COMP_ACCTL1_ASRCP_PIN 0x00000000 // Pin value of Cn+
150 #define COMP_ACCTL1_ASRCP_PIN0 0x00000200 // Pin value of C0+
151 #define COMP_ACCTL1_ASRCP_REF 0x00000400 // Internal voltage reference
152 #define COMP_ACCTL1_TSLVAL 0x00000080 // Trigger Sense Level Value
153 #define COMP_ACCTL1_TSEN_M 0x00000060 // Trigger Sense
154 #define COMP_ACCTL1_TSEN_LEVEL 0x00000000 // Level sense, see TSLVAL
155 #define COMP_ACCTL1_TSEN_FALL 0x00000020 // Falling edge
156 #define COMP_ACCTL1_TSEN_RISE 0x00000040 // Rising edge
157 #define COMP_ACCTL1_TSEN_BOTH 0x00000060 // Either edge
158 #define COMP_ACCTL1_ISLVAL 0x00000010 // Interrupt Sense Level Value
159 #define COMP_ACCTL1_ISEN_M 0x0000000C // Interrupt Sense
160 #define COMP_ACCTL1_ISEN_LEVEL 0x00000000 // Level sense, see ISLVAL
161 #define COMP_ACCTL1_ISEN_FALL 0x00000004 // Falling edge
162 #define COMP_ACCTL1_ISEN_RISE 0x00000008 // Rising edge
163 #define COMP_ACCTL1_ISEN_BOTH 0x0000000C // Either edge
164 #define COMP_ACCTL1_CINV 0x00000002 // Comparator Output Invert
165 
166 //*****************************************************************************
167 //
168 // The following are defines for the bit fields in the COMP_O_ACSTAT2 register.
169 //
170 //*****************************************************************************
171 #define COMP_ACSTAT2_OVAL 0x00000002 // Comparator Output Value
172 
173 //*****************************************************************************
174 //
175 // The following are defines for the bit fields in the COMP_O_ACCTL2 register.
176 //
177 //*****************************************************************************
178 #define COMP_ACCTL2_TOEN 0x00000800 // Trigger Output Enable
179 #define COMP_ACCTL2_ASRCP_M 0x00000600 // Analog Source Positive
180 #define COMP_ACCTL2_ASRCP_PIN 0x00000000 // Pin value of Cn+
181 #define COMP_ACCTL2_ASRCP_PIN0 0x00000200 // Pin value of C0+
182 #define COMP_ACCTL2_ASRCP_REF 0x00000400 // Internal voltage reference
183 #define COMP_ACCTL2_TSLVAL 0x00000080 // Trigger Sense Level Value
184 #define COMP_ACCTL2_TSEN_M 0x00000060 // Trigger Sense
185 #define COMP_ACCTL2_TSEN_LEVEL 0x00000000 // Level sense, see TSLVAL
186 #define COMP_ACCTL2_TSEN_FALL 0x00000020 // Falling edge
187 #define COMP_ACCTL2_TSEN_RISE 0x00000040 // Rising edge
188 #define COMP_ACCTL2_TSEN_BOTH 0x00000060 // Either edge
189 #define COMP_ACCTL2_ISLVAL 0x00000010 // Interrupt Sense Level Value
190 #define COMP_ACCTL2_ISEN_M 0x0000000C // Interrupt Sense
191 #define COMP_ACCTL2_ISEN_LEVEL 0x00000000 // Level sense, see ISLVAL
192 #define COMP_ACCTL2_ISEN_FALL 0x00000004 // Falling edge
193 #define COMP_ACCTL2_ISEN_RISE 0x00000008 // Rising edge
194 #define COMP_ACCTL2_ISEN_BOTH 0x0000000C // Either edge
195 #define COMP_ACCTL2_CINV 0x00000002 // Comparator Output Invert
196 
197 //*****************************************************************************
198 //
199 // The following are defines for the bit fields in the COMP_O_PP register.
200 //
201 //*****************************************************************************
202 #define COMP_PP_C2O 0x00040000 // Comparator Output 2 Present
203 #define COMP_PP_C1O 0x00020000 // Comparator Output 1 Present
204 #define COMP_PP_C0O 0x00010000 // Comparator Output 0 Present
205 #define COMP_PP_CMP2 0x00000004 // Comparator 2 Present
206 #define COMP_PP_CMP1 0x00000002 // Comparator 1 Present
207 #define COMP_PP_CMP0 0x00000001 // Comparator 0 Present
208 
209 #endif // __HW_COMP_H__
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