epi.h
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1 //*****************************************************************************
2 //
3 // epi.h - Prototypes and macros for the EPI module.
4 //
5 // Copyright (c) 2008-2017 Texas Instruments Incorporated. All rights reserved.
6 // Software License Agreement
7 //
8 // Redistribution and use in source and binary forms, with or without
9 // modification, are permitted provided that the following conditions
10 // are met:
11 //
12 // Redistributions of source code must retain the above copyright
13 // notice, this list of conditions and the following disclaimer.
14 //
15 // Redistributions in binary form must reproduce the above copyright
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19 //
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22 // from this software without specific prior written permission.
23 //
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35 //
36 //*****************************************************************************
37 
38 #ifndef __DRIVERLIB_EPI_H__
39 #define __DRIVERLIB_EPI_H__
40 
41 #include <stdint.h>
42 #include <stdbool.h>
43 
44 //*****************************************************************************
45 //
46 // If building with a C++ compiler, make all of the definitions in this header
47 // have a C binding.
48 //
49 //*****************************************************************************
50 #ifdef __cplusplus
51 extern "C"
52 {
53 #endif
54 
55 //*****************************************************************************
56 //
57 // Values that can be passed to EPIModeSet()
58 //
59 //*****************************************************************************
60 #define EPI_MODE_GENERAL 0x00000010
61 #define EPI_MODE_SDRAM 0x00000011
62 #define EPI_MODE_HB8 0x00000012
63 #define EPI_MODE_HB16 0x00000013
64 #define EPI_MODE_DISABLE 0x00000000
65 
66 //*****************************************************************************
67 //
68 // Values that can be passed to EPIConfigSDRAMSet()
69 //
70 //*****************************************************************************
71 #define EPI_SDRAM_CORE_FREQ_0_15 \
72  0x00000000
73 #define EPI_SDRAM_CORE_FREQ_15_30 \
74  0x40000000
75 #define EPI_SDRAM_CORE_FREQ_30_50 \
76  0x80000000
77 #define EPI_SDRAM_CORE_FREQ_50_100 \
78  0xC0000000
79 #define EPI_SDRAM_LOW_POWER 0x00000200
80 #define EPI_SDRAM_FULL_POWER 0x00000000
81 #define EPI_SDRAM_SIZE_64MBIT 0x00000000
82 #define EPI_SDRAM_SIZE_128MBIT 0x00000001
83 #define EPI_SDRAM_SIZE_256MBIT 0x00000002
84 #define EPI_SDRAM_SIZE_512MBIT 0x00000003
85 
86 //*****************************************************************************
87 //
88 // Values that can be passed to EPIConfigGPModeSet()
89 //
90 //*****************************************************************************
91 #define EPI_GPMODE_CLKPIN 0x80000000
92 #define EPI_GPMODE_CLKGATE 0x40000000
93 #define EPI_GPMODE_FRAME50 0x04000000
94 #define EPI_GPMODE_WRITE2CYCLE 0x00080000
95 #define EPI_GPMODE_ASIZE_NONE 0x00000000
96 #define EPI_GPMODE_ASIZE_4 0x00000010
97 #define EPI_GPMODE_ASIZE_12 0x00000020
98 #define EPI_GPMODE_ASIZE_20 0x00000030
99 #define EPI_GPMODE_DSIZE_8 0x00000000
100 #define EPI_GPMODE_DSIZE_16 0x00000001
101 #define EPI_GPMODE_DSIZE_24 0x00000002
102 #define EPI_GPMODE_DSIZE_32 0x00000003
103 
104 //*****************************************************************************
105 //
106 // Values that can be passed to EPIConfigHB8ModeSet()
107 //
108 //*****************************************************************************
109 #define EPI_HB8_USE_TXEMPTY 0x00800000
110 #define EPI_HB8_USE_RXFULL 0x00400000
111 #define EPI_HB8_WRHIGH 0x00200000
112 #define EPI_HB8_RDHIGH 0x00100000
113 #define EPI_HB8_ALE_HIGH 0x00080000
114 #define EPI_HB8_ALE_LOW 0x00000000
115 #define EPI_HB8_WRWAIT_0 0x00000000
116 #define EPI_HB8_WRWAIT_1 0x00000040
117 #define EPI_HB8_WRWAIT_2 0x00000080
118 #define EPI_HB8_WRWAIT_3 0x000000C0
119 #define EPI_HB8_RDWAIT_0 0x00000000
120 #define EPI_HB8_RDWAIT_1 0x00000010
121 #define EPI_HB8_RDWAIT_2 0x00000020
122 #define EPI_HB8_RDWAIT_3 0x00000030
123 #define EPI_HB8_MODE_ADMUX 0x00000000
124 #define EPI_HB8_MODE_ADDEMUX 0x00000001
125 #define EPI_HB8_MODE_SRAM 0x00000002
126 #define EPI_HB8_MODE_FIFO 0x00000003
127 #define EPI_HB8_CSCFG_ALE 0x00000000
128 #define EPI_HB8_CSCFG_CS 0x00000200
129 #define EPI_HB8_CSCFG_DUAL_CS 0x00000400
130 #define EPI_HB8_CSCFG_ALE_DUAL_CS \
131  0x00000600
132 #define EPI_HB8_CSCFG_ALE_SINGLE_CS \
133  0x00001000
134 #define EPI_HB8_CSCFG_QUAD_CS 0x00001200
135 #define EPI_HB8_CSCFG_ALE_QUAD_CS \
136  0x00001400
137 #define EPI_HB8_CSBAUD 0x00000800
138 #define EPI_HB8_CLOCK_GATE 0x80000000
139 #define EPI_HB8_CLOCK_GATE_IDLE \
140  0x40000000
141 #define EPI_HB8_CLOCK_INVERT 0x20000000
142 #define EPI_HB8_IN_READY_EN 0x10000000
143 #define EPI_HB8_IN_READY_EN_INVERT \
144  0x18000000
145 #define EPI_HB8_CSCFG_MASK 0x00001600
146 
147 //*****************************************************************************
148 //
149 // Values that can be passed to EPIConfigHB16ModeSet()
150 //
151 //*****************************************************************************
152 #define EPI_HB16_USE_TXEMPTY 0x00800000
153 #define EPI_HB16_USE_RXFULL 0x00400000
154 #define EPI_HB16_WRHIGH 0x00200000
155 #define EPI_HB16_RDHIGH 0x00100000
156 #define EPI_HB16_WRWAIT_0 0x00000000
157 #define EPI_HB16_WRWAIT_1 0x00000040
158 #define EPI_HB16_WRWAIT_2 0x00000080
159 #define EPI_HB16_WRWAIT_3 0x000000C0
160 #define EPI_HB16_RDWAIT_0 0x00000000
161 #define EPI_HB16_RDWAIT_1 0x00000010
162 #define EPI_HB16_RDWAIT_2 0x00000020
163 #define EPI_HB16_RDWAIT_3 0x00000030
164 #define EPI_HB16_MODE_ADMUX 0x00000000
165 #define EPI_HB16_MODE_ADDEMUX 0x00000001
166 #define EPI_HB16_MODE_SRAM 0x00000002
167 #define EPI_HB16_MODE_FIFO 0x00000003
168 #define EPI_HB16_BSEL 0x00000004
169 #define EPI_HB16_CSCFG_ALE 0x00000000
170 #define EPI_HB16_CSCFG_CS 0x00000200
171 #define EPI_HB16_CSCFG_DUAL_CS 0x00000400
172 #define EPI_HB16_CSCFG_ALE_DUAL_CS \
173  0x00000600
174 #define EPI_HB16_CSCFG_ALE_SINGLE_CS \
175  0x00001000
176 #define EPI_HB16_CSCFG_QUAD_CS 0x00001200
177 #define EPI_HB16_CSCFG_ALE_QUAD_CS \
178  0x00001400
179 #define EPI_HB16_CLOCK_GATE 0x80000000
180 #define EPI_HB16_CLOCK_GATE_IDLE \
181  0x40000000
182 #define EPI_HB16_CLOCK_INVERT 0x20000000
183 #define EPI_HB16_IN_READY_EN 0x10000000
184 #define EPI_HB16_IN_READY_EN_INVERTED \
185  0x18000000
186 #define EPI_HB16_ALE_HIGH 0x00080000
187 #define EPI_HB16_ALE_LOW 0x00000000
188 #define EPI_HB16_BURST_TRAFFIC 0x00010000
189 #define EPI_HB16_CSBAUD 0x00000800
190 #define EPI_HB16_CSCFG_MASK 0x00001600
191 
192 //*****************************************************************************
193 //
194 // Values that can be passed to EPIConfigHB8TimingSet().
195 //
196 //*****************************************************************************
197 #define EPI_HB8_IN_READY_DELAY_1 \
198  0x01000000
199 #define EPI_HB8_IN_READY_DELAY_2 \
200  0x02000000
201 #define EPI_HB8_IN_READY_DELAY_3 \
202  0x03000000
203 #define EPI_HB8_CAP_WIDTH_1 0x00001000
204 #define EPI_HB8_CAP_WIDTH_2 0x00002000
205 #define EPI_HB8_WRWAIT_MINUS_DISABLE \
206  0x00000000
207 #define EPI_HB8_WRWAIT_MINUS_ENABLE \
208  0x00000010
209 #define EPI_HB8_RDWAIT_MINUS_DISABLE \
210  0x00000000
211 #define EPI_HB8_RDWAIT_MINUS_ENABLE \
212  0x00000001
213 
214 //*****************************************************************************
215 //
216 // Values that can be passed to EPIConfigHB16TimingSet().
217 //
218 //*****************************************************************************
219 #define EPI_HB16_IN_READY_DELAY_1 \
220  0x01000000
221 #define EPI_HB16_IN_READY_DELAY_2 \
222  0x02000000
223 #define EPI_HB16_IN_READY_DELAY_3 \
224  0x03000000
225 #define EPI_HB16_PSRAM_NO_LIMIT 0x00000000
226 #define EPI_HB16_PSRAM_128 0x00010000
227 #define EPI_HB16_PSRAM_256 0x00020000
228 #define EPI_HB16_PSRAM_512 0x00030000
229 #define EPI_HB16_PSRAM_1024 0x00040000
230 #define EPI_HB16_PSRAM_2048 0x00050000
231 #define EPI_HB16_PSRAM_4096 0x00060000
232 #define EPI_HB16_PSRAM_8192 0x00070000
233 #define EPI_HB16_CAP_WIDTH_1 0x00001000
234 #define EPI_HB16_CAP_WIDTH_2 0x00002000
235 #define EPI_HB16_WRWAIT_MINUS_DISABLE \
236  0x00000000
237 #define EPI_HB16_WRWAIT_MINUS_ENABLE \
238  0x00000008
239 #define EPI_HB16_RDWAIT_MINUS_DISABLE \
240  0x00000000
241 #define EPI_HB16_RDWAIT_MINUS_ENABLE \
242  0x00000001
243 
244 //*****************************************************************************
245 //
246 // Values that can be passed to EPIAddressMapSet().
247 //
248 //*****************************************************************************
249 #define EPI_ADDR_PER_SIZE_256B 0x00000000
250 #define EPI_ADDR_PER_SIZE_64KB 0x00000040
251 #define EPI_ADDR_PER_SIZE_16MB 0x00000080
252 #define EPI_ADDR_PER_SIZE_256MB 0x000000C0
253 #define EPI_ADDR_PER_BASE_NONE 0x00000000
254 #define EPI_ADDR_PER_BASE_A 0x00000010
255 #define EPI_ADDR_PER_BASE_C 0x00000020
256 #define EPI_ADDR_RAM_SIZE_256B 0x00000000
257 #define EPI_ADDR_RAM_SIZE_64KB 0x00000004
258 #define EPI_ADDR_RAM_SIZE_16MB 0x00000008
259 #define EPI_ADDR_RAM_SIZE_256MB 0x0000000C
260 #define EPI_ADDR_RAM_BASE_NONE 0x00000000
261 #define EPI_ADDR_RAM_BASE_6 0x00000001
262 #define EPI_ADDR_RAM_BASE_8 0x00000002
263 #define EPI_ADDR_QUAD_MODE 0x00000033
264 #define EPI_ADDR_CODE_SIZE_256B 0x00000000
265 #define EPI_ADDR_CODE_SIZE_64KB 0x00000400
266 #define EPI_ADDR_CODE_SIZE_16MB 0x00000800
267 #define EPI_ADDR_CODE_SIZE_256MB \
268  0x00000C00
269 #define EPI_ADDR_CODE_BASE_NONE 0x00000000
270 #define EPI_ADDR_CODE_BASE_1 0x00000100
271 
272 //*****************************************************************************
273 //
274 // Values that can be passed to EPINonBlockingReadConfigure()
275 //
276 //*****************************************************************************
277 #define EPI_NBCONFIG_SIZE_8 1
278 #define EPI_NBCONFIG_SIZE_16 2
279 #define EPI_NBCONFIG_SIZE_32 3
280 
281 //*****************************************************************************
282 //
283 // Values that can be passed to EPIFIFOConfig()
284 //
285 //*****************************************************************************
286 #define EPI_FIFO_CONFIG_WTFULLERR \
287  0x00020000
288 #define EPI_FIFO_CONFIG_RSTALLERR \
289  0x00010000
290 #define EPI_FIFO_CONFIG_TX_EMPTY \
291  0x00000000
292 #define EPI_FIFO_CONFIG_TX_1_4 0x00000020
293 #define EPI_FIFO_CONFIG_TX_1_2 0x00000030
294 #define EPI_FIFO_CONFIG_TX_3_4 0x00000040
295 #define EPI_FIFO_CONFIG_RX_1_8 0x00000001
296 #define EPI_FIFO_CONFIG_RX_1_4 0x00000002
297 #define EPI_FIFO_CONFIG_RX_1_2 0x00000003
298 #define EPI_FIFO_CONFIG_RX_3_4 0x00000004
299 #define EPI_FIFO_CONFIG_RX_7_8 0x00000005
300 #define EPI_FIFO_CONFIG_RX_FULL 0x00000006
301 
302 //*****************************************************************************
303 //
304 // Values that can be passed to EPIIntEnable(), EPIIntDisable(), or returned
305 // as flags from EPIIntStatus()
306 //
307 //*****************************************************************************
308 #define EPI_INT_DMA_TX_DONE 0x00000010
309 #define EPI_INT_DMA_RX_DONE 0x00000008
310 #define EPI_INT_TXREQ 0x00000004
311 #define EPI_INT_RXREQ 0x00000002
312 #define EPI_INT_ERR 0x00000001
313 
314 //*****************************************************************************
315 //
316 // Values that can be passed to EPIIntErrorClear(), or returned as flags from
317 // EPIIntErrorStatus()
318 //
319 //*****************************************************************************
320 #define EPI_INT_ERR_DMAWRIC 0x00000010
321 #define EPI_INT_ERR_DMARDIC 0x00000008
322 #define EPI_INT_ERR_WTFULL 0x00000004
323 #define EPI_INT_ERR_RSTALL 0x00000002
324 #define EPI_INT_ERR_TIMEOUT 0x00000001
325 
326 #ifdef rvmdk
327 //*****************************************************************************
328 //
329 // Keil case.
330 //
331 //*****************************************************************************
332 inline void
333 EPIWorkaroundWordWrite(uint32_t *pui32Addr, uint32_t ui32Value)
334 {
335  uint32_t ui32Scratch;
336 
337  __asm
338  {
339  //
340  // Add a NOP to ensure we don’t have a flash read immediately before
341  // the EPI read.
342  //
343  NOP
344 
345  //
346  // Perform the write we're actually interested in.
347  //
348  STR ui32Value, [pui32Addr]
349 
350  //
351  // Read from SRAM to ensure that we don't have an EPI write followed by
352  // a flash read.
353  //
354  LDR ui32Scratch, [__current_sp()]
355  }
356 }
357 
358 inline uint32_t
359 EPIWorkaroundWordRead(uint32_t *pui32Addr)
360 {
361  uint32_t ui32Value, ui32Scratch;
362 
363  __asm
364  {
365  //
366  // Add a NOP to ensure we don’t have a flash read immediately before
367  // the EPI read.
368  //
369  NOP
370 
371  //
372  // Perform the read we're actually interested in.
373  //
374  LDR ui32Value, [pui32Addr]
375 
376  //
377  // Read from SRAM to ensure that we don't have an EPI read followed by
378  // a flash read.
379  //
380  LDR ui32Scratch, [__current_sp()]
381  }
382 
383  return(ui32Value);
384 }
385 
386 inline void
387 EPIWorkaroundHWordWrite(uint16_t *pui16Addr, uint16_t ui16Value)
388 {
389  uint32_t ui32Scratch;
390 
391  __asm
392  {
393  //
394  // Add a NOP to ensure we don’t have a flash read immediately before
395  // the EPI read.
396  //
397  NOP
398 
399  //
400  // Perform the write we're actually interested in.
401  //
402  STRH ui16Value, [pui16Addr]
403 
404  //
405  // Read from SRAM to ensure that we don't have an EPI write followed by
406  // a flash read.
407  //
408  LDR ui32Scratch, [__current_sp()]
409  }
410 }
411 
412 inline uint16_t
413 EPIWorkaroundHWordRead(uint16_t *pui16Addr)
414 {
415  uint32_t ui32Scratch;
416  uint16_t ui16Value;
417 
418  __asm
419  {
420  //
421  // Add a NOP to ensure we don’t have a flash read immediately before
422  // the EPI read.
423  //
424  NOP
425 
426  //
427  // Perform the read we're actually interested in.
428  //
429  LDRH ui16Value, [pui16Addr]
430 
431  //
432  // Read from SRAM to ensure that we don't have an EPI read followed by
433  // a flash read.
434  //
435  LDR ui32Scratch, [__current_sp()]
436  }
437 
438  return(ui16Value);
439 }
440 
441 inline void
442 EPIWorkaroundByteWrite(uint8_t *pui8Addr, uint8_t ui8Value)
443 {
444  uint32_t ui32Scratch;
445 
446  __asm
447  {
448  //
449  // Add a NOP to ensure we don’t have a flash read immediately before
450  // the EPI read.
451  //
452  NOP
453 
454  //
455  // Perform the write we're actually interested in.
456  //
457  STRB ui8Value, [pui8Addr]
458 
459  //
460  // Read from SRAM to ensure that we don't have an EPI write followed by
461  // a flash read.
462  //
463  LDR ui32Scratch, [__current_sp()]
464  }
465 }
466 
467 inline uint8_t
468 EPIWorkaroundByteRead(uint8_t *pui8Addr)
469 {
470  uint32_t ui32Scratch;
471  uint8_t ui8Value;
472 
473  __asm
474  {
475  //
476  // Add a NOP to ensure we don’t have a flash read immediately before
477  // the EPI read.
478  //
479  NOP
480 
481  //
482  // Perform the read we're actually interested in.
483  //
484  LDRB ui8Value, [pui8Addr]
485 
486  //
487  // Read from SRAM to ensure that we don't have an EPI read followed by
488  // a flash read.
489  //
490  LDR ui32Scratch, [__current_sp()]
491  }
492 
493  return(ui8Value);
494 }
495 #endif
496 
497 #ifdef __TI_ARM__
498 //*****************************************************************************
499 //
500 // Code Composer Studio versions of these functions can be found in separate
501 // source file epi_workaround_ccs.s.
502 //
503 //*****************************************************************************
504 extern void EPIWorkaroundWordWrite(uint32_t *pui32Addr, uint32_t ui32Value);
505 extern uint32_t EPIWorkaroundWordRead(uint32_t *pui32Addr);
506 extern void EPIWorkaroundHWordWrite(uint16_t *pui16Addr, uint16_t ui16Value);
507 extern uint16_t EPIWorkaroundHWordRead(uint16_t *pui16Addr);
508 extern void EPIWorkaroundByteWrite(uint8_t *pui8Addr, uint8_t ui8Value);
509 extern uint8_t EPIWorkaroundByteRead(uint8_t *pui8Addr);
510 
511 #endif
512 
513 #if (defined __GNUC__) || (defined __ICCARM__) || (defined sourcerygxx) || \
514  (defined codered)
515 //*****************************************************************************
516 //
517 // GCC-based toolchain and IAR case.
518 //
519 //*****************************************************************************
520 inline void
521 EPIWorkaroundWordWrite(uint32_t *pui32Addr, uint32_t ui32Value)
522 {
523  volatile register uint32_t ui32Scratch;
524 
525  __asm volatile (
526  //
527  // Add a NOP to ensure we don’t have a flash read immediately before
528  // the EPI read.
529  //
530  " NOP\n"
531  " STR %[value],[%[addr]]\n"
532  " LDR %[scratch],[sp]\n"
533  : [scratch] "=r" (ui32Scratch)
534  : [addr] "r" (pui32Addr), [value] "r" (ui32Value)
535  );
536 
537  //
538  // Keep the compiler from generating a warning.
539  //
540  ui32Scratch = ui32Scratch;
541 }
542 
543 inline uint32_t
544 EPIWorkaroundWordRead(uint32_t *pui32Addr)
545 {
546  volatile register uint32_t ui32Data, ui32Scratch;
547 
548  //
549  // ui32Scratch is not used other than to add a padding read following the
550  // "real" read.
551  //
552 
553  __asm volatile(
554  //
555  // Add a NOP to ensure we don’t have a flash read immediately before
556  // the EPI read.
557  //
558  " NOP\n"
559  " LDR %[ret],[%[addr]]\n"
560  " LDR %[scratch],[sp]\n"
561  : [ret] "=r" (ui32Data),
562  [scratch] "=r" (ui32Scratch)
563  : [addr] "r" (pui32Addr)
564  );
565 
566 
567  //
568  // Keep the compiler from generating a warning.
569  //
570  ui32Scratch = ui32Scratch;
571 
572  return(ui32Data);
573 }
574 
575 inline void
576 EPIWorkaroundHWordWrite(uint16_t *pui16Addr, uint16_t ui16Value)
577 {
578  volatile register uint32_t ui32Scratch;
579 
580  __asm volatile (
581  //
582  // Add a NOP to ensure we don’t have a flash read immediately before
583  // the EPI read.
584  //
585  " NOP\n"
586  " STRH %[value],[%[addr]]\n"
587  " LDR %[scratch],[sp]\n"
588  : [scratch] "=r" (ui32Scratch)
589  : [addr] "r" (pui16Addr), [value] "r" (ui16Value)
590  );
591 
592 
593  //
594  // Keep the compiler from generating a warning.
595  //
596  ui32Scratch = ui32Scratch;
597 }
598 
599 inline uint16_t
600 EPIWorkaroundHWordRead(uint16_t *pui16Addr)
601 {
602  register uint16_t ui16Data;
603  register uint32_t ui32Scratch;
604 
605  //
606  // ui32Scratch is not used other than to add a padding read following the
607  // "real" read.
608  //
609 
610  __asm volatile(
611  //
612  // Add a NOP to ensure we don’t have a flash read immediately before
613  // the EPI read.
614  //
615  " NOP\n"
616  " LDRH %[ret],[%[addr]]\n"
617  " LDR %[scratch],[sp]\n"
618  : [ret] "=r" (ui16Data),
619  [scratch] "=r" (ui32Scratch)
620  : [addr] "r" (pui16Addr)
621  );
622 
623  //
624  // Keep the compiler from generating a warning.
625  //
626  ui32Scratch = ui32Scratch;
627 
628  return(ui16Data);
629 }
630 
631 inline void
632 EPIWorkaroundByteWrite(uint8_t *pui8Addr, uint8_t ui8Value)
633 {
634  volatile register uint32_t ui32Scratch;
635 
636  __asm volatile (
637  //
638  // Add a NOP to ensure we don’t have a flash read immediately before
639  // the EPI read.
640  //
641  " NOP\n"
642  " STRB %[value],[%[addr]]\n"
643  " LDR %[scratch],[sp]\n"
644  : [scratch] "=r" (ui32Scratch)
645  : [addr] "r" (pui8Addr), [value] "r" (ui8Value)
646  );
647 
648  //
649  // Keep the compiler from generating a warning.
650  //
651  ui32Scratch = ui32Scratch;
652 }
653 
654 inline uint8_t
655 EPIWorkaroundByteRead(uint8_t *pui8Addr)
656 {
657  register uint8_t ui8Data;
658  register uint32_t ui32Scratch;
659 
660  //
661  // ui32Scratch is not used other than to add a padding read following the
662  // "real" read.
663  //
664 
665  __asm volatile(
666  //
667  // Add a NOP to ensure we don’t have a flash read immediately before
668  // the EPI read.
669  //
670  " NOP\n"
671  " LDRB %[ret],[%[addr]]\n"
672  " LDR %[scratch],[sp]\n"
673  : [ret] "=r" (ui8Data),
674  [scratch] "=r" (ui32Scratch)
675  : [addr] "r" (pui8Addr)
676  );
677 
678  //
679  // Keep the compiler from generating a warning.
680  //
681  ui32Scratch = ui32Scratch;
682 
683  return(ui8Data);
684 }
685 #endif
686 
687 //*****************************************************************************
688 //
689 // API Function prototypes
690 //
691 //*****************************************************************************
692 extern void EPIModeSet(uint32_t ui32Base, uint32_t ui32Mode);
693 extern void EPIDividerSet(uint32_t ui32Base, uint32_t ui32Divider);
694 extern void EPIDividerCSSet(uint32_t ui32Base, uint32_t ui32CS,
695  uint32_t ui32Divider);
696 extern void EPIDMATxCount(uint32_t ui32Base, uint32_t ui32Count);
697 extern void EPIConfigGPModeSet(uint32_t ui32Base, uint32_t ui32Config,
698  uint32_t ui32FrameCount, uint32_t ui32MaxWait);
699 extern void EPIConfigHB8Set(uint32_t ui32Base, uint32_t ui32Config,
700  uint32_t ui32MaxWait);
701 extern void EPIConfigHB16Set(uint32_t ui32Base, uint32_t ui32Config,
702  uint32_t ui32MaxWait);
703 extern void EPIConfigHB8CSSet(uint32_t ui32Base, uint32_t ui32CS,
704  uint32_t ui32Config);
705 extern void EPIConfigHB16CSSet(uint32_t ui32Base, uint32_t ui32CS,
706  uint32_t ui32Config);
707 extern void EPIConfigHB8TimingSet(uint32_t ui32Base, uint32_t ui32CS,
708  uint32_t ui32Config);
709 extern void EPIConfigHB16TimingSet(uint32_t ui32Base, uint32_t ui32CS,
710  uint32_t ui32Config);
711 extern void EPIPSRAMConfigRegSet(uint32_t ui32Base, uint32_t ui32CS,
712  uint32_t ui32CR);
713 extern void EPIPSRAMConfigRegRead(uint32_t ui32Base, uint32_t ui32CS);
714 extern bool EPIPSRAMConfigRegGetNonBlocking(uint32_t ui32Base,
715  uint32_t ui32CS,
716  uint32_t *pui32CR);
717 extern uint32_t EPIPSRAMConfigRegGet(uint32_t ui32Base, uint32_t ui32CS);
718 extern void EPIConfigSDRAMSet(uint32_t ui32Base, uint32_t ui32Config,
719  uint32_t ui32Refresh);
720 extern void EPIAddressMapSet(uint32_t ui32Base, uint32_t ui32Map);
721 extern void EPINonBlockingReadConfigure(uint32_t ui32Base,
722  uint32_t ui32Channel,
723  uint32_t ui32DataSize,
724  uint32_t ui32Address);
725 extern void EPINonBlockingReadStart(uint32_t ui32Base,
726  uint32_t ui32Channel,
727  uint32_t ui32Count);
728 extern void EPINonBlockingReadStop(uint32_t ui32Base,
729  uint32_t ui32Channel);
730 extern uint32_t EPINonBlockingReadCount(uint32_t ui32Base,
731  uint32_t ui32Channel);
732 extern uint32_t EPINonBlockingReadAvail(uint32_t ui32Base);
733 extern uint32_t EPINonBlockingReadGet32(uint32_t ui32Base,
734  uint32_t ui32Count,
735  uint32_t *pui32Buf);
736 extern uint32_t EPINonBlockingReadGet16(uint32_t ui32Base,
737  uint32_t ui32Count,
738  uint16_t *pui16Buf);
739 extern uint32_t EPINonBlockingReadGet8(uint32_t ui32Base,
740  uint32_t ui32Count,
741  uint8_t *pui8Buf);
742 extern void EPIFIFOConfig(uint32_t ui32Base, uint32_t ui32Config);
743 extern uint32_t EPIWriteFIFOCountGet(uint32_t ui32Base);
744 extern void EPIIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags);
745 extern void EPIIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags);
746 extern uint32_t EPIIntStatus(uint32_t ui32Base, bool bMasked);
747 extern uint32_t EPIIntErrorStatus(uint32_t ui32Base);
748 extern void EPIIntErrorClear(uint32_t ui32Base, uint32_t ui32ErrFlags);
749 extern void EPIIntRegister(uint32_t ui32Base, void (*pfnHandler)(void));
750 extern void EPIIntUnregister(uint32_t ui32Base);
751 
752 //*****************************************************************************
753 //
754 // Mark the end of the C bindings section for C++ compilers.
755 //
756 //*****************************************************************************
757 #ifdef __cplusplus
758 }
759 #endif
760 
761 #endif // __DRIVERLIB_EPI_H__
uint32_t EPINonBlockingReadGet8(uint32_t ui32Base, uint32_t ui32Count, uint8_t *pui8Buf)
Definition: epi.c:1694
void EPINonBlockingReadStart(uint32_t ui32Base, uint32_t ui32Channel, uint32_t ui32Count)
Definition: epi.c:1444
void EPIDMATxCount(uint32_t ui32Base, uint32_t ui32Count)
Definition: epi.c:380
void EPIConfigHB8Set(uint32_t ui32Base, uint32_t ui32Config, uint32_t ui32MaxWait)
Definition: epi.c:549
void EPIWorkaroundByteWrite(uint8_t *pui8Addr, uint8_t ui8Value)
void EPIModeSet(uint32_t ui32Base, uint32_t ui32Mode)
Definition: epi.c:249
void EPIConfigHB8TimingSet(uint32_t ui32Base, uint32_t ui32CS, uint32_t ui32Config)
Definition: epi.c:914
void EPINonBlockingReadConfigure(uint32_t ui32Base, uint32_t ui32Channel, uint32_t ui32DataSize, uint32_t ui32Address)
Definition: epi.c:1392
void EPIConfigHB16TimingSet(uint32_t ui32Base, uint32_t ui32CS, uint32_t ui32Config)
Definition: epi.c:985
uint32_t EPINonBlockingReadGet16(uint32_t ui32Base, uint32_t ui32Count, uint16_t *pui16Buf)
Definition: epi.c:1639
void EPIWorkaroundWordWrite(uint32_t *pui32Addr, uint32_t ui32Value)
uint32_t EPINonBlockingReadCount(uint32_t ui32Base, uint32_t ui32Channel)
Definition: epi.c:1516
void EPIConfigHB16Set(uint32_t ui32Base, uint32_t ui32Config, uint32_t ui32MaxWait)
Definition: epi.c:680
void EPIPSRAMConfigRegSet(uint32_t ui32Base, uint32_t ui32CS, uint32_t ui32CR)
Definition: epi.c:1020
uint32_t EPIWorkaroundWordRead(uint32_t *pui32Addr)
void EPIWorkaroundHWordWrite(uint16_t *pui16Addr, uint16_t ui16Value)
uint32_t EPIPSRAMConfigRegGet(uint32_t ui32Base, uint32_t ui32CS)
Definition: epi.c:1194
void EPIIntErrorClear(uint32_t ui32Base, uint32_t ui32ErrFlags)
Definition: epi.c:1974
uint32_t EPINonBlockingReadAvail(uint32_t ui32Base)
Definition: epi.c:1552
void EPINonBlockingReadStop(uint32_t ui32Base, uint32_t ui32Channel)
Definition: epi.c:1481
void EPIConfigGPModeSet(uint32_t ui32Base, uint32_t ui32Config, uint32_t ui32FrameCount, uint32_t ui32MaxWait)
Definition: epi.c:1271
void EPIFIFOConfig(uint32_t ui32Base, uint32_t ui32Config)
Definition: epi.c:1762
uint32_t EPIIntErrorStatus(uint32_t ui32Base)
Definition: epi.c:1937
void EPIDividerCSSet(uint32_t ui32Base, uint32_t ui32CS, uint32_t ui32Divider)
Definition: epi.c:332
bool EPIPSRAMConfigRegGetNonBlocking(uint32_t ui32Base, uint32_t ui32CS, uint32_t *pui32CR)
Definition: epi.c:1128
void EPIIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags)
Definition: epi.c:1824
void EPIConfigSDRAMSet(uint32_t ui32Base, uint32_t ui32Config, uint32_t ui32Refresh)
Definition: epi.c:433
void EPIConfigHB8CSSet(uint32_t ui32Base, uint32_t ui32CS, uint32_t ui32Config)
Definition: epi.c:754
uint32_t EPINonBlockingReadGet32(uint32_t ui32Base, uint32_t ui32Count, uint32_t *pui32Buf)
Definition: epi.c:1584
uint16_t EPIWorkaroundHWordRead(uint16_t *pui16Addr)
void EPIAddressMapSet(uint32_t ui32Base, uint32_t ui32Map)
Definition: epi.c:1347
void EPIIntUnregister(uint32_t ui32Base)
Definition: epi.c:2079
void EPIIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags)
Definition: epi.c:1859
uint8_t EPIWorkaroundByteRead(uint8_t *pui8Addr)
void EPIDividerSet(uint32_t ui32Base, uint32_t ui32Divider)
Definition: epi.c:295
uint32_t EPIWriteFIFOCountGet(uint32_t ui32Base)
Definition: epi.c:1790
void EPIIntRegister(uint32_t ui32Base, void(*pfnHandler)(void))
Definition: epi.c:2035
uint32_t EPIIntStatus(uint32_t ui32Base, bool bMasked)
Definition: epi.c:1895
void EPIConfigHB16CSSet(uint32_t ui32Base, uint32_t ui32CS, uint32_t ui32Config)
Definition: epi.c:837
void EPIPSRAMConfigRegRead(uint32_t ui32Base, uint32_t ui32CS)
Definition: epi.c:1075
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