Data Fields
SPIMSP432DMA_HWAttrsV1 Struct Reference

SPIMSP432DMA Hardware attributes These fields, with the exception of intPriority, are used by driverlib APIs and therefore must be populated by driverlib macro definitions. For MSP432 driverlib these definitions are found in: More...

#include <SPIMSP432DMA.h>

Data Fields

uint32_t baseAddr
 
uint16_t bitOrder
 
uint8_t clockSource
 
uint8_t defaultTxBufValue
 
uint8_t dmaIntNum
 
uint32_t intPriority
 
uint32_t rxDMAChannelIndex
 
uint32_t txDMAChannelIndex
 
uint16_t simoPin
 
uint16_t somiPin
 
uint16_t clkPin
 
uint16_t stePin
 
uint16_t pinMode
 
uint16_t minDmaTransferSize
 

Detailed Description

SPIMSP432DMA Hardware attributes These fields, with the exception of intPriority, are used by driverlib APIs and therefore must be populated by driverlib macro definitions. For MSP432 driverlib these definitions are found in:

intPriority is the SPI peripheral's interrupt priority, as defined by the underlying OS. It is passed unmodified to the underlying OS's interrupt handler creation code, so you need to refer to the OS documentation for usage. For example, for SYS/BIOS applications, refer to the ti.sysbios.family.arm.m3.Hwi documentation for SYS/BIOS usage of interrupt priorities. If the driver uses the ti.dpl interface instead of making OS calls directly, then the HwiP port handles the interrupt priority in an OS specific way. In the case of the SYS/BIOS port, intPriority is passed unmodified to Hwi_create().

A sample structure is shown below:

const SPIMSP432DMA_HWAttrsV1 spiMSP432DMAHWAttrs[] = {
{
.baseAddr = EUSCI_B0_BASE,
.clockSource = EUSCI_B_SPI_CLOCKSOURCE_SMCLK,
.bitOrder = EUSCI_B_SPI_MSB_FIRST,
.defaultTxBufValue = 0,
.dmaIntNum = INT_DMA_INT1,
.intPriority = (~0),
.rxDMAChannelIndex = DMA_CH1_EUSCIB0RX0,
.txDMAChannelIndex = DMA_CH0_EUSCIB0TX0,
.clkPin = SPIMSP432DMA_P1_5_UCB0CLK,
.simoPin = SPIMSP432DMA_P1_6_UCB0SIMO,
.somiPin = SPIMSP432DMA_P1_7_UCB0SOMI,
.stePin = SPIMSP432DMA_P1_4_UCB0STE,
.pinMode = EUSCI_SPI_3PIN,
},
{
.baseAddr = EUSCI_B2_BASE,
.clockSource = EUSCI_B_SPI_CLOCKSOURCE_SMCLK,
.bitOrder = EUSCI_B_SPI_MSB_FIRST,
.defaultTxBufValue = 0,
.dmaIntNum = INT_DMA_INT2,
.intPriority = (~0),
.rxDMAChannelIndex = DMA_CH5_EUSCIB2RX0,
.txDMAChannelIndex = DMA_CH4_EUSCIB2TX0,
.clkPin = SPIMSP432DMA_P3_5_UCB2CLK,
.simoPin = SPIMSP432DMA_P3_6_UCB2SIMO,
.somiPin = SPIMSP432DMA_P3_7_UCB2SOMI,
.stePin = SPIMSP432DMA_P3_4_UCB2STE,
.pinMode = EUSCI_SPI_3PIN,
}
};

Field Documentation

§ baseAddr

uint32_t SPIMSP432DMA_HWAttrsV1::baseAddr

EUSCI_B_SPI Peripheral's base address

§ bitOrder

uint16_t SPIMSP432DMA_HWAttrsV1::bitOrder

EUSCI_B_SPI Bit order

§ clockSource

uint8_t SPIMSP432DMA_HWAttrsV1::clockSource

EUSCI_B_SPI Clock source

§ defaultTxBufValue

uint8_t SPIMSP432DMA_HWAttrsV1::defaultTxBufValue

Default TX value if txBuf == NULL

§ dmaIntNum

uint8_t SPIMSP432DMA_HWAttrsV1::dmaIntNum

DMA interrupt number

§ intPriority

uint32_t SPIMSP432DMA_HWAttrsV1::intPriority

DMA interrupt priority

§ rxDMAChannelIndex

uint32_t SPIMSP432DMA_HWAttrsV1::rxDMAChannelIndex

DMA rxDMAChannel for Rx data

§ txDMAChannelIndex

uint32_t SPIMSP432DMA_HWAttrsV1::txDMAChannelIndex

DMA txDMAChannel for Tx data

§ simoPin

uint16_t SPIMSP432DMA_HWAttrsV1::simoPin

Port/pin for SIMO (MOSI)

§ somiPin

uint16_t SPIMSP432DMA_HWAttrsV1::somiPin

Port/pin for SOMI (MISO)

§ clkPin

uint16_t SPIMSP432DMA_HWAttrsV1::clkPin

Port/pin for SPI CLK

§ stePin

uint16_t SPIMSP432DMA_HWAttrsV1::stePin

Port/pin for STE

§ pinMode

uint16_t SPIMSP432DMA_HWAttrsV1::pinMode

3-pin or 4-pin mode

§ minDmaTransferSize

uint16_t SPIMSP432DMA_HWAttrsV1::minDmaTransferSize

Minimum amount of data for DMA transfer


The documentation for this struct was generated from the following file:
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