#include <stdint.h>
#include <stdbool.h>
#include <ti/devices/msp432p4xx/inc/msp.h>
Go to the source code of this file.
Data Structures | |
struct | SysCtl_A_FlashTLV_Info |
struct | SysCtl_A_CSCalTLV_Info |
Macros | |
#define | SYSCTL_A_HARD_RESET 1 |
#define | SYSCTL_A_SOFT_RESET 0 |
#define | SYSCTL_A_PERIPH_LCD SYSCTL_A_PERIHALT_CTL_HALT_LCD |
#define | SYSCTL_A_PERIPH_DMA SYSCTL_A_PERIHALT_CTL_HALT_DMA |
#define | SYSCTL_A_PERIPH_WDT SYSCTL_A_PERIHALT_CTL_HALT_WDT |
#define | SYSCTL_A_PERIPH_ADC SYSCTL_A_PERIHALT_CTL_HALT_ADC |
#define | SYSCTL_A_PERIPH_EUSCIB3 SYSCTL_A_PERIHALT_CTL_HALT_EUB3 |
#define | SYSCTL_A_PERIPH_EUSCIB2 SYSCTL_A_PERIHALT_CTL_HALT_EUB2 |
#define | SYSCTL_A_PERIPH_EUSCIB1 SYSCTL_A_PERIHALT_CTL_HALT_EUB1 |
#define | SYSCTL_A_PERIPH_EUSCIB0 SYSCTL_A_PERIHALT_CTL_HALT_EUB0 |
#define | SYSCTL_A_PERIPH_EUSCIA3 SYSCTL_A_PERIHALT_CTL_HALT_EUA3 |
#define | SYSCTL_A_PERIPH_EUSCIA2 SYSCTL_A_PERIHALT_CTL_HALT_EUA2 |
#define | SYSCTL_A_PERIPH_EUSCIA1 SYSCTL_A_PERIHALT_CTL_HALT_EUA1 |
#define | SYSCTL_A_PERIPH_EUSCIA0 SYSCTL_A_PERIHALT_CTL_HALT_EUA0 |
#define | SYSCTL_A_PERIPH_TIMER32_0_MODULE SYSCTL_A_PERIHALT_CTL_HALT_T32_0 |
#define | SYSCTL_A_PERIPH_TIMER16_3 SYSCTL_A_PERIHALT_CTL_HALT_T16_3 |
#define | SYSCTL_A_PERIPH_TIMER16_2 SYSCTL_A_PERIHALT_CTL_HALT_T16_2 |
#define | SYSCTL_A_PERIPH_TIMER16_1 SYSCTL_A_PERIHALT_CTL_HALT_T16_1 |
#define | SYSCTL_A_PERIPH_TIMER16_0 SYSCTL_A_PERIHALT_CTL_HALT_T16_0 |
#define | SYSCTL_A_NMIPIN_SRC SYSCTL_A_NMI_CTLSTAT_PIN_SRC |
#define | SYSCTL_A_PCM_SRC SYSCTL_A_NMI_CTLSTAT_PCM_SRC |
#define | SYSCTL_A_PSS_SRC SYSCTL_A_NMI_CTLSTAT_PSS_SRC |
#define | SYSCTL_A_CS_SRC SYSCTL_A_NMI_CTLSTAT_CS_SRC |
#define | SYSCTL_A_REBOOT_KEY 0x6900 |
#define | SYSCTL_A_1_2V_REF (uint32_t)&TLV->ADC14_REF1P2V_TS30C - (uint32_t)TLV_BASE |
#define | SYSCTL_A_1_45V_REF (uint32_t)&TLV->ADC14_REF1P45V_TS30C - (uint32_t)TLV_BASE |
#define | SYSCTL_A_2_5V_REF (uint32_t)&TLV->ADC14_REF2P5V_TS30C - (uint32_t)TLV_BASE |
#define | SYSCTL_A_85_DEGREES_C 4 |
#define | SYSCTL_A_30_DEGREES_C 0 |
#define | SYSCTL_A_BANKMASK 0x80000000 |
#define | SRAMCTL_CTL0_BANK 0x10000000 |
#define | SRAMCTL_CTL1_BANK 0x20000000 |
#define | SRAMCTL_CTL2_BANK 0x30000000 |
#define | SRAMCTL_CTL3_BANK 0x40000000 |
#define | TLV_START 0x00201004 |
#define | TLV_TAG_RESERVED1 1 |
#define | TLV_TAG_RESERVED2 2 |
#define | TLV_TAG_CS 3 |
#define | TLV_TAG_FLASHCTL 4 |
#define | TLV_TAG_ADC14 5 |
#define | TLV_TAG_RESERVED6 6 |
#define | TLV_TAG_RESERVED7 7 |
#define | TLV_TAG_REF 8 |
#define | TLV_TAG_RESERVED9 9 |
#define | TLV_TAG_RESERVED10 10 |
#define | TLV_TAG_DEVINFO 11 |
#define | TLV_TAG_DIEREC 12 |
#define | TLV_TAG_RANDNUM 13 |
#define | TLV_TAG_RESERVED14 14 |
#define | TLV_TAG_BSL 15 |
#define | TLV_TAGEND 0x0BD0E11D |
Functions | |
uint_least32_t | SysCtl_A_getSRAMSize (void) |
uint_least32_t | SysCtl_A_getFlashSize (void) |
uint_least32_t | SysCtl_A_getInfoFlashSize (void) |
void | SysCtl_A_rebootDevice (void) |
void | SysCtl_A_getTLVInfo (uint_fast8_t tag, uint_fast8_t instance, uint_fast8_t *length, uint32_t **data_address) |
bool | SysCtl_A_enableSRAM (uint32_t addr) |
bool | SysCtl_A_disableSRAM (uint32_t addr) |
bool | SysCtl_A_enableSRAMRetention (uint32_t startAddr, uint32_t endAddr) |
bool | SysCtl_A_disableSRAMRetention (uint32_t startAddr, uint32_t endAddr) |
void | SysCtl_A_enablePeripheralAtCPUHalt (uint_fast16_t devices) |
void | SysCtl_A_disablePeripheralAtCPUHalt (uint_fast16_t devices) |
void | SysCtl_A_setWDTTimeoutResetType (uint_fast8_t resetType) |
void | SysCtl_A_setWDTPasswordViolationResetType (uint_fast8_t resetType) |
void | SysCtl_A_disableNMISource (uint_fast8_t flags) |
void | SysCtl_A_enableNMISource (uint_fast8_t flags) |
uint_fast8_t | SysCtl_A_getNMISourceStatus (void) |
void | SysCtl_A_enableGlitchFilter (void) |
void | SysCtl_A_disableGlitchFilter (void) |
uint_fast16_t | SysCtl_A_getTempCalibrationConstant (uint32_t refVoltage, uint32_t temperature) |