54 #include <ti/devices/msp432p4xx/inc/msp.h>
62 #define MPU_CONFIG_PRIV_DEFAULT MPU_CTRL_PRIVDEFENA_Msk
63 #define MPU_CONFIG_HARDFLT_NMI MPU_CTRL_HFNMIENA_Msk
64 #define MPU_CONFIG_NONE 0
71 #define MPU_RGN_SIZE_32B (4 << 1)
72 #define MPU_RGN_SIZE_64B (5 << 1)
73 #define MPU_RGN_SIZE_128B (6 << 1)
74 #define MPU_RGN_SIZE_256B (7 << 1)
75 #define MPU_RGN_SIZE_512B (8 << 1)
77 #define MPU_RGN_SIZE_1K (9 << 1)
78 #define MPU_RGN_SIZE_2K (10 << 1)
79 #define MPU_RGN_SIZE_4K (11 << 1)
80 #define MPU_RGN_SIZE_8K (12 << 1)
81 #define MPU_RGN_SIZE_16K (13 << 1)
82 #define MPU_RGN_SIZE_32K (14 << 1)
83 #define MPU_RGN_SIZE_64K (15 << 1)
84 #define MPU_RGN_SIZE_128K (16 << 1)
85 #define MPU_RGN_SIZE_256K (17 << 1)
86 #define MPU_RGN_SIZE_512K (18 << 1)
88 #define MPU_RGN_SIZE_1M (19 << 1)
89 #define MPU_RGN_SIZE_2M (20 << 1)
90 #define MPU_RGN_SIZE_4M (21 << 1)
91 #define MPU_RGN_SIZE_8M (22 << 1)
92 #define MPU_RGN_SIZE_16M (23 << 1)
93 #define MPU_RGN_SIZE_32M (24 << 1)
94 #define MPU_RGN_SIZE_64M (25 << 1)
95 #define MPU_RGN_SIZE_128M (26 << 1)
96 #define MPU_RGN_SIZE_256M (27 << 1)
97 #define MPU_RGN_SIZE_512M (28 << 1)
99 #define MPU_RGN_SIZE_1G (29 << 1)
100 #define MPU_RGN_SIZE_2G (30 << 1)
101 #define MPU_RGN_SIZE_4G (31 << 1)
108 #define MPU_RGN_PERM_EXEC 0x00000000
109 #define MPU_RGN_PERM_NOEXEC 0x10000000
110 #define MPU_RGN_PERM_PRV_NO_USR_NO 0x00000000
111 #define MPU_RGN_PERM_PRV_RW_USR_NO 0x01000000
112 #define MPU_RGN_PERM_PRV_RW_USR_RO 0x02000000
113 #define MPU_RGN_PERM_PRV_RW_USR_RW 0x03000000
114 #define MPU_RGN_PERM_PRV_RO_USR_NO 0x05000000
115 #define MPU_RGN_PERM_PRV_RO_USR_RO 0x06000000
122 #define MPU_SUB_RGN_DISABLE_0 0x00000100
123 #define MPU_SUB_RGN_DISABLE_1 0x00000200
124 #define MPU_SUB_RGN_DISABLE_2 0x00000400
125 #define MPU_SUB_RGN_DISABLE_3 0x00000800
126 #define MPU_SUB_RGN_DISABLE_4 0x00001000
127 #define MPU_SUB_RGN_DISABLE_5 0x00002000
128 #define MPU_SUB_RGN_DISABLE_6 0x00004000
129 #define MPU_SUB_RGN_DISABLE_7 0x00008000
136 #define MPU_RGN_ENABLE 1
137 #define MPU_RGN_DISABLE 0
139 #define NVIC_MPU_TYPE_DREGION_S 8
352 extern void MPU_setRegion(uint32_t region, uint32_t addr, uint32_t flags);
374 extern void MPU_getRegion(uint32_t region, uint32_t *addr, uint32_t *pflags);
uint32_t MPU_getRegionCount(void)
Definition: mpu.c:59
void MPU_enableRegion(uint32_t region)
Definition: mpu.c:68
void MPU_enableInterrupt(void)
Definition: mpu.c:173
void MPU_registerInterrupt(void(*intHandler)(void))
Definition: mpu.c:151
void MPU_getRegion(uint32_t region, uint32_t *addr, uint32_t *pflags)
Definition: mpu.c:126
void MPU_unregisterInterrupt(void)
Definition: mpu.c:165
void MPU_disableModule(void)
Definition: mpu.c:50
void MPU_enableModule(uint32_t mpuConfig)
Definition: mpu.c:36
void MPU_disableInterrupt(void)
Definition: mpu.c:183
void MPU_setRegion(uint32_t region, uint32_t addr, uint32_t flags)
Definition: mpu.c:104
void MPU_disableRegion(uint32_t region)
Definition: mpu.c:86