85 #ifndef ti_drivers_uart_UARTMSP432__include 86 #define ti_drivers_uart_UARTMSP432__include 95 #include <ti/devices/DeviceFamily.h> 97 #include <ti/drivers/dpl/ClockP.h> 98 #include <ti/drivers/dpl/HwiP.h> 99 #include <ti/drivers/dpl/SemaphoreP.h> 104 #include <ti/devices/msp432p4xx/inc/msp.h> 106 #define UARTMSP432_P1_2_UCA0RXD 0x00000112 107 #define UARTMSP432_P1_3_UCA0TXD 0x00000113 110 #define UARTMSP432_P2_0_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x20) 111 #define UARTMSP432_P2_0_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x20) 112 #define UARTMSP432_P2_0_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x20) 113 #define UARTMSP432_P2_0_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x20) 114 #define UARTMSP432_P2_0_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x20) 115 #define UARTMSP432_P2_0_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x20) 118 #define UARTMSP432_P2_1_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x21) 119 #define UARTMSP432_P2_1_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x21) 120 #define UARTMSP432_P2_1_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x21) 121 #define UARTMSP432_P2_1_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x21) 122 #define UARTMSP432_P2_1_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x21) 123 #define UARTMSP432_P2_1_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x21) 126 #define UARTMSP432_P2_2_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x22) 127 #define UARTMSP432_P2_2_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x22) 128 #define UARTMSP432_P2_2_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x22) 129 #define UARTMSP432_P2_2_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x22) 130 #define UARTMSP432_P2_2_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x22) 131 #define UARTMSP432_P2_2_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x22) 134 #define UARTMSP432_P2_3_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x23) 135 #define UARTMSP432_P2_3_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x23) 136 #define UARTMSP432_P2_3_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x23) 137 #define UARTMSP432_P2_3_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x23) 138 #define UARTMSP432_P2_3_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x23) 139 #define UARTMSP432_P2_3_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x23) 142 #define UARTMSP432_P2_4_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x24) 143 #define UARTMSP432_P2_4_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x24) 144 #define UARTMSP432_P2_4_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x24) 145 #define UARTMSP432_P2_4_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x24) 146 #define UARTMSP432_P2_4_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x24) 147 #define UARTMSP432_P2_4_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x24) 150 #define UARTMSP432_P2_5_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x25) 151 #define UARTMSP432_P2_5_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x25) 152 #define UARTMSP432_P2_5_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x25) 153 #define UARTMSP432_P2_5_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x25) 154 #define UARTMSP432_P2_5_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x25) 155 #define UARTMSP432_P2_5_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x25) 158 #define UARTMSP432_P2_6_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x26) 159 #define UARTMSP432_P2_6_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x26) 160 #define UARTMSP432_P2_6_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x26) 161 #define UARTMSP432_P2_6_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x26) 162 #define UARTMSP432_P2_6_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x26) 163 #define UARTMSP432_P2_6_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x26) 166 #define UARTMSP432_P2_7_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x27) 167 #define UARTMSP432_P2_7_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x27) 168 #define UARTMSP432_P2_7_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x27) 169 #define UARTMSP432_P2_7_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x27) 170 #define UARTMSP432_P2_7_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x27) 171 #define UARTMSP432_P2_7_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x27) 174 #define UARTMSP432_P3_0_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x30) 175 #define UARTMSP432_P3_0_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x30) 176 #define UARTMSP432_P3_0_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x30) 177 #define UARTMSP432_P3_0_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x30) 178 #define UARTMSP432_P3_0_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x30) 179 #define UARTMSP432_P3_0_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x30) 182 #define UARTMSP432_P3_1_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x31) 183 #define UARTMSP432_P3_1_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x31) 184 #define UARTMSP432_P3_1_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x31) 185 #define UARTMSP432_P3_1_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x31) 186 #define UARTMSP432_P3_1_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x31) 187 #define UARTMSP432_P3_1_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x31) 190 #define UARTMSP432_P3_2_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x32) 191 #define UARTMSP432_P3_2_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x32) 192 #define UARTMSP432_P3_2_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x32) 193 #define UARTMSP432_P3_2_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x32) 194 #define UARTMSP432_P3_2_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x32) 195 #define UARTMSP432_P3_2_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x32) 198 #define UARTMSP432_P3_3_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x33) 199 #define UARTMSP432_P3_3_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x33) 200 #define UARTMSP432_P3_3_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x33) 201 #define UARTMSP432_P3_3_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x33) 202 #define UARTMSP432_P3_3_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x33) 203 #define UARTMSP432_P3_3_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x33) 206 #define UARTMSP432_P3_4_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x34) 207 #define UARTMSP432_P3_4_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x34) 208 #define UARTMSP432_P3_4_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x34) 209 #define UARTMSP432_P3_4_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x34) 210 #define UARTMSP432_P3_4_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x34) 211 #define UARTMSP432_P3_4_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x34) 214 #define UARTMSP432_P3_5_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x35) 215 #define UARTMSP432_P3_5_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x35) 216 #define UARTMSP432_P3_5_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x35) 217 #define UARTMSP432_P3_5_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x35) 218 #define UARTMSP432_P3_5_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x35) 219 #define UARTMSP432_P3_5_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x35) 222 #define UARTMSP432_P3_6_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x36) 223 #define UARTMSP432_P3_6_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x36) 224 #define UARTMSP432_P3_6_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x36) 225 #define UARTMSP432_P3_6_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x36) 226 #define UARTMSP432_P3_6_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x36) 227 #define UARTMSP432_P3_6_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x36) 230 #define UARTMSP432_P3_7_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x37) 231 #define UARTMSP432_P3_7_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x37) 232 #define UARTMSP432_P3_7_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x37) 233 #define UARTMSP432_P3_7_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x37) 234 #define UARTMSP432_P3_7_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x37) 235 #define UARTMSP432_P3_7_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x37) 238 #define UARTMSP432_P7_0_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x70) 239 #define UARTMSP432_P7_0_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x70) 240 #define UARTMSP432_P7_0_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x70) 241 #define UARTMSP432_P7_0_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x70) 242 #define UARTMSP432_P7_0_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x70) 243 #define UARTMSP432_P7_0_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x70) 246 #define UARTMSP432_P7_1_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x71) 247 #define UARTMSP432_P7_1_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x71) 248 #define UARTMSP432_P7_1_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x71) 249 #define UARTMSP432_P7_1_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x71) 250 #define UARTMSP432_P7_1_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x71) 251 #define UARTMSP432_P7_1_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x71) 254 #define UARTMSP432_P7_2_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x72) 255 #define UARTMSP432_P7_2_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x72) 256 #define UARTMSP432_P7_2_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x72) 257 #define UARTMSP432_P7_2_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x72) 258 #define UARTMSP432_P7_2_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x72) 259 #define UARTMSP432_P7_2_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x72) 262 #define UARTMSP432_P7_3_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x73) 263 #define UARTMSP432_P7_3_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x73) 264 #define UARTMSP432_P7_3_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x73) 265 #define UARTMSP432_P7_3_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x73) 266 #define UARTMSP432_P7_3_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x73) 267 #define UARTMSP432_P7_3_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x73) 270 #define UARTMSP432_P7_4_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x74) 271 #define UARTMSP432_P7_4_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x74) 272 #define UARTMSP432_P7_4_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x74) 273 #define UARTMSP432_P7_4_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x74) 274 #define UARTMSP432_P7_4_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x74) 275 #define UARTMSP432_P7_4_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x74) 278 #define UARTMSP432_P7_5_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x75) 279 #define UARTMSP432_P7_5_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x75) 280 #define UARTMSP432_P7_5_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x75) 281 #define UARTMSP432_P7_5_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x75) 282 #define UARTMSP432_P7_5_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x75) 283 #define UARTMSP432_P7_5_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x75) 286 #define UARTMSP432_P7_6_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x76) 287 #define UARTMSP432_P7_6_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x76) 288 #define UARTMSP432_P7_6_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x76) 289 #define UARTMSP432_P7_6_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x76) 290 #define UARTMSP432_P7_6_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x76) 291 #define UARTMSP432_P7_6_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x76) 294 #define UARTMSP432_P7_7_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x77) 295 #define UARTMSP432_P7_7_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x77) 296 #define UARTMSP432_P7_7_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x77) 297 #define UARTMSP432_P7_7_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x77) 298 #define UARTMSP432_P7_7_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x77) 299 #define UARTMSP432_P7_7_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x77) 301 #define UARTMSP432_P9_6_UCA3RXD 0x00000196 302 #define UARTMSP432_P9_7_UCA3TXD 0x00000197 530 bool inReadCallback:1;
531 volatile bool readCallbackPending:1;
unsigned int baseAddr
Definition: UARTMSP432.h:469
UARTMSP432 Baudrate configuration.
Definition: UARTMSP432.h:405
uint32_t outputBaudrate
Definition: UARTMSP432.h:406
uint32_t baudRate
Definition: UARTMSP432.h:536
RingBuf_Object ringBuffer
Definition: UARTMSP432.h:542
enum UART_Echo_ UART_Echo
UART echo settings.
SemaphoreP_Handle writeSem
Definition: UARTMSP432.h:556
unsigned int writeEmptyClkTimeout
Definition: UARTMSP432.h:559
UART_LEN dataLength
Definition: UARTMSP432.h:539
uint8_t clockSource
Definition: UARTMSP432.h:475
unsigned char * ringBufPtr
Definition: UARTMSP432.h:483
struct UARTMSP432_BaudrateConfig UARTMSP432_BaudrateConfig
UARTMSP432 Baudrate configuration.
uint32_t inputClockFreq
Definition: UARTMSP432.h:407
uint16_t prescalar
Definition: UARTMSP432.h:409
enum UART_PAR_ UART_PAR
UART parity type settings.
const unsigned char * writeBuf
Definition: UARTMSP432.h:553
enum UART_LEN_ UART_LEN
UART data length settings.
enum UART_Mode_ UART_Mode
UART mode settings.
Power notify object structure.
Definition: Power.h:121
struct UARTMSP432_FxnSet UARTMSP432_FxnSet
Complement set of read functions to be used by the UART ISR and UARTMSP432_read(). Internal use only.
uint32_t bitOrder
Definition: UARTMSP432.h:477
uint16_t txPin
Definition: UARTMSP432.h:488
ClockP_Handle timeoutClk
Definition: UARTMSP432.h:535
UART_PAR parityType
Definition: UARTMSP432.h:538
UART Global configuration.
Definition: UART.h:680
uint8_t numBaudrateEntries
Definition: UARTMSP432.h:479
void(* UARTMSP432_ErrorCallback)(UART_Handle handle, uint32_t error)
The definition of an optional callback function used by the UART driver to notify the application whe...
Definition: UARTMSP432.h:347
size_t writeSize
Definition: UARTMSP432.h:554
struct UARTMSP432_Object * UARTMSP432_Handle
size_t ringBufSize
Definition: UARTMSP432.h:485
uint16_t rxPin
Definition: UARTMSP432.h:487
Power_NotifyObj perfChangeNotify
Definition: UARTMSP432.h:561
size_t readCount
Definition: UARTMSP432.h:547
Complement set of read functions to be used by the UART ISR and UARTMSP432_read(). Internal use only.
Definition: UARTMSP432.h:370
UART_Callback writeCallback
Definition: UARTMSP432.h:558
The definition of a UART function table that contains the required set of functions to control a spec...
Definition: UART.h:637
HwiP_Handle hwiHandle
Definition: UARTMSP432.h:534
UARTMSP432 Hardware attributes.
Definition: UARTMSP432.h:467
const UART_FxnTable UARTMSP432_fxnTable
uint8_t oversampling
Definition: UARTMSP432.h:412
unsigned int readTimeout
Definition: UARTMSP432.h:549
size_t readSize
Definition: UARTMSP432.h:546
int(* readTaskFxn)(UART_Handle handle)
Definition: UARTMSP432.h:372
enum UART_STOP_ UART_STOP
UART stop bit settings.
enum UART_ReturnMode_ UART_ReturnMode
UART return mode settings.
unsigned int intPriority
Definition: UARTMSP432.h:473
SemaphoreP_Handle readSem
Definition: UARTMSP432.h:548
uint32_t perfConstraintMask
Definition: UARTMSP432.h:562
UART_STOP stopBits
Definition: UARTMSP432.h:537
uint8_t hwRegUCBRFx
Definition: UARTMSP432.h:410
UARTMSP432_FxnSet readFxns
Definition: UARTMSP432.h:544
UART_Callback readCallback
Definition: UARTMSP432.h:550
UARTMSP432 Object.
Definition: UARTMSP432.h:498
unsigned char * readBuf
Definition: UARTMSP432.h:545
bool(* readIsrFxn)(UART_Handle handle)
Definition: UARTMSP432.h:371
UARTMSP432_ErrorCallback errorFxn
Definition: UARTMSP432.h:490
struct UARTMSP432_HWAttrsV1 UARTMSP432_HWAttrsV1
UARTMSP432 Hardware attributes.
struct UARTMSP432_Object UARTMSP432_Object
UARTMSP432 Object.
unsigned int intNum
Definition: UARTMSP432.h:471
uint8_t hwRegUCBRSx
Definition: UARTMSP432.h:411
void(* UART_Callback)(UART_Handle handle, void *buf, size_t count)
The definition of a callback function used by the UART driver when used in UART_MODE_CALLBACK The cal...
Definition: UART.h:423
unsigned int writeTimeout
Definition: UARTMSP432.h:557
UARTMSP432_BaudrateConfig const * baudrateLUT
Definition: UARTMSP432.h:481
enum UART_DataMode_ UART_DataMode
UART data mode settings.
size_t writeCount
Definition: UARTMSP432.h:555