111 #ifndef ti_drivers_uart_UARTMSP432__include 112 #define ti_drivers_uart_UARTMSP432__include 121 #include <ti/devices/DeviceFamily.h> 123 #include <ti/drivers/dpl/ClockP.h> 124 #include <ti/drivers/dpl/HwiP.h> 125 #include <ti/drivers/dpl/SemaphoreP.h> 130 #include <ti/devices/msp432p4xx/inc/msp.h> 132 #define UARTMSP432_P1_2_UCA0RXD 0x00000112 133 #define UARTMSP432_P1_3_UCA0TXD 0x00000113 136 #define UARTMSP432_P2_0_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x20) 137 #define UARTMSP432_P2_0_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x20) 138 #define UARTMSP432_P2_0_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x20) 139 #define UARTMSP432_P2_0_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x20) 140 #define UARTMSP432_P2_0_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x20) 141 #define UARTMSP432_P2_0_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x20) 144 #define UARTMSP432_P2_1_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x21) 145 #define UARTMSP432_P2_1_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x21) 146 #define UARTMSP432_P2_1_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x21) 147 #define UARTMSP432_P2_1_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x21) 148 #define UARTMSP432_P2_1_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x21) 149 #define UARTMSP432_P2_1_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x21) 152 #define UARTMSP432_P2_2_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x22) 153 #define UARTMSP432_P2_2_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x22) 154 #define UARTMSP432_P2_2_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x22) 155 #define UARTMSP432_P2_2_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x22) 156 #define UARTMSP432_P2_2_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x22) 157 #define UARTMSP432_P2_2_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x22) 160 #define UARTMSP432_P2_3_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x23) 161 #define UARTMSP432_P2_3_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x23) 162 #define UARTMSP432_P2_3_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x23) 163 #define UARTMSP432_P2_3_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x23) 164 #define UARTMSP432_P2_3_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x23) 165 #define UARTMSP432_P2_3_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x23) 168 #define UARTMSP432_P2_4_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x24) 169 #define UARTMSP432_P2_4_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x24) 170 #define UARTMSP432_P2_4_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x24) 171 #define UARTMSP432_P2_4_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x24) 172 #define UARTMSP432_P2_4_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x24) 173 #define UARTMSP432_P2_4_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x24) 176 #define UARTMSP432_P2_5_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x25) 177 #define UARTMSP432_P2_5_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x25) 178 #define UARTMSP432_P2_5_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x25) 179 #define UARTMSP432_P2_5_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x25) 180 #define UARTMSP432_P2_5_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x25) 181 #define UARTMSP432_P2_5_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x25) 184 #define UARTMSP432_P2_6_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x26) 185 #define UARTMSP432_P2_6_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x26) 186 #define UARTMSP432_P2_6_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x26) 187 #define UARTMSP432_P2_6_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x26) 188 #define UARTMSP432_P2_6_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x26) 189 #define UARTMSP432_P2_6_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x26) 192 #define UARTMSP432_P2_7_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x27) 193 #define UARTMSP432_P2_7_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x27) 194 #define UARTMSP432_P2_7_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x27) 195 #define UARTMSP432_P2_7_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x27) 196 #define UARTMSP432_P2_7_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x27) 197 #define UARTMSP432_P2_7_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x27) 200 #define UARTMSP432_P3_0_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x30) 201 #define UARTMSP432_P3_0_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x30) 202 #define UARTMSP432_P3_0_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x30) 203 #define UARTMSP432_P3_0_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x30) 204 #define UARTMSP432_P3_0_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x30) 205 #define UARTMSP432_P3_0_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x30) 208 #define UARTMSP432_P3_1_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x31) 209 #define UARTMSP432_P3_1_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x31) 210 #define UARTMSP432_P3_1_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x31) 211 #define UARTMSP432_P3_1_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x31) 212 #define UARTMSP432_P3_1_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x31) 213 #define UARTMSP432_P3_1_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x31) 216 #define UARTMSP432_P3_2_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x32) 217 #define UARTMSP432_P3_2_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x32) 218 #define UARTMSP432_P3_2_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x32) 219 #define UARTMSP432_P3_2_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x32) 220 #define UARTMSP432_P3_2_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x32) 221 #define UARTMSP432_P3_2_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x32) 224 #define UARTMSP432_P3_3_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x33) 225 #define UARTMSP432_P3_3_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x33) 226 #define UARTMSP432_P3_3_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x33) 227 #define UARTMSP432_P3_3_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x33) 228 #define UARTMSP432_P3_3_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x33) 229 #define UARTMSP432_P3_3_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x33) 232 #define UARTMSP432_P3_4_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x34) 233 #define UARTMSP432_P3_4_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x34) 234 #define UARTMSP432_P3_4_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x34) 235 #define UARTMSP432_P3_4_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x34) 236 #define UARTMSP432_P3_4_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x34) 237 #define UARTMSP432_P3_4_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x34) 240 #define UARTMSP432_P3_5_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x35) 241 #define UARTMSP432_P3_5_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x35) 242 #define UARTMSP432_P3_5_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x35) 243 #define UARTMSP432_P3_5_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x35) 244 #define UARTMSP432_P3_5_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x35) 245 #define UARTMSP432_P3_5_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x35) 248 #define UARTMSP432_P3_6_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x36) 249 #define UARTMSP432_P3_6_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x36) 250 #define UARTMSP432_P3_6_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x36) 251 #define UARTMSP432_P3_6_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x36) 252 #define UARTMSP432_P3_6_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x36) 253 #define UARTMSP432_P3_6_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x36) 256 #define UARTMSP432_P3_7_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x37) 257 #define UARTMSP432_P3_7_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x37) 258 #define UARTMSP432_P3_7_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x37) 259 #define UARTMSP432_P3_7_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x37) 260 #define UARTMSP432_P3_7_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x37) 261 #define UARTMSP432_P3_7_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x37) 264 #define UARTMSP432_P7_0_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x70) 265 #define UARTMSP432_P7_0_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x70) 266 #define UARTMSP432_P7_0_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x70) 267 #define UARTMSP432_P7_0_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x70) 268 #define UARTMSP432_P7_0_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x70) 269 #define UARTMSP432_P7_0_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x70) 272 #define UARTMSP432_P7_1_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x71) 273 #define UARTMSP432_P7_1_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x71) 274 #define UARTMSP432_P7_1_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x71) 275 #define UARTMSP432_P7_1_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x71) 276 #define UARTMSP432_P7_1_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x71) 277 #define UARTMSP432_P7_1_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x71) 280 #define UARTMSP432_P7_2_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x72) 281 #define UARTMSP432_P7_2_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x72) 282 #define UARTMSP432_P7_2_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x72) 283 #define UARTMSP432_P7_2_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x72) 284 #define UARTMSP432_P7_2_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x72) 285 #define UARTMSP432_P7_2_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x72) 288 #define UARTMSP432_P7_3_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x73) 289 #define UARTMSP432_P7_3_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x73) 290 #define UARTMSP432_P7_3_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x73) 291 #define UARTMSP432_P7_3_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x73) 292 #define UARTMSP432_P7_3_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x73) 293 #define UARTMSP432_P7_3_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x73) 296 #define UARTMSP432_P7_4_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x74) 297 #define UARTMSP432_P7_4_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x74) 298 #define UARTMSP432_P7_4_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x74) 299 #define UARTMSP432_P7_4_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x74) 300 #define UARTMSP432_P7_4_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x74) 301 #define UARTMSP432_P7_4_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x74) 304 #define UARTMSP432_P7_5_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x75) 305 #define UARTMSP432_P7_5_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x75) 306 #define UARTMSP432_P7_5_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x75) 307 #define UARTMSP432_P7_5_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x75) 308 #define UARTMSP432_P7_5_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x75) 309 #define UARTMSP432_P7_5_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x75) 312 #define UARTMSP432_P7_6_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x76) 313 #define UARTMSP432_P7_6_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x76) 314 #define UARTMSP432_P7_6_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x76) 315 #define UARTMSP432_P7_6_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x76) 316 #define UARTMSP432_P7_6_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x76) 317 #define UARTMSP432_P7_6_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x76) 320 #define UARTMSP432_P7_7_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x77) 321 #define UARTMSP432_P7_7_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x77) 322 #define UARTMSP432_P7_7_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x77) 323 #define UARTMSP432_P7_7_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x77) 324 #define UARTMSP432_P7_7_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x77) 325 #define UARTMSP432_P7_7_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x77) 327 #define UARTMSP432_P9_6_UCA3RXD 0x00000196 328 #define UARTMSP432_P9_7_UCA3TXD 0x00000197 unsigned int baseAddr
Definition: UARTMSP432.h:479
UARTMSP432 Baudrate configuration.
Definition: UARTMSP432.h:417
uint32_t outputBaudrate
Definition: UARTMSP432.h:418
uint32_t baudRate
Definition: UARTMSP432.h:540
RingBuf_Object ringBuffer
Definition: UARTMSP432.h:545
enum UART_Echo_ UART_Echo
UART echo settings.
SemaphoreP_Handle writeSem
Definition: UARTMSP432.h:559
unsigned int writeEmptyClkTimeout
Definition: UARTMSP432.h:562
uint8_t clockSource
Definition: UARTMSP432.h:485
unsigned char * ringBufPtr
Definition: UARTMSP432.h:493
struct UARTMSP432_BaudrateConfig UARTMSP432_BaudrateConfig
UARTMSP432 Baudrate configuration.
uint32_t inputClockFreq
Definition: UARTMSP432.h:419
uint16_t prescalar
Definition: UARTMSP432.h:421
enum UART_PAR_ UART_PAR
UART parity type settings.
const unsigned char * writeBuf
Definition: UARTMSP432.h:556
enum UART_Mode_ UART_Mode
UART mode settings.
Power notify object structure.
Definition: Power.h:113
struct UARTMSP432_FxnSet UARTMSP432_FxnSet
Complement set of read functions to be used by the UART ISR and UARTMSP432_read(). Internal use only.
uint32_t bitOrder
Definition: UARTMSP432.h:487
uint16_t txPin
Definition: UARTMSP432.h:498
ClockP_Handle timeoutClk
Definition: UARTMSP432.h:539
UART_PAR parityType
Definition: UARTMSP432.h:542
UART Global configuration.
Definition: UART.h:695
uint8_t numBaudrateEntries
Definition: UARTMSP432.h:489
size_t writeSize
Definition: UARTMSP432.h:557
struct UARTMSP432_Object * UARTMSP432_Handle
size_t ringBufSize
Definition: UARTMSP432.h:495
uint16_t rxPin
Definition: UARTMSP432.h:497
Power_NotifyObj perfChangeNotify
Definition: UARTMSP432.h:564
size_t readCount
Definition: UARTMSP432.h:550
Complement set of read functions to be used by the UART ISR and UARTMSP432_read(). Internal use only.
Definition: UARTMSP432.h:382
UART_Callback writeCallback
Definition: UARTMSP432.h:561
The definition of a UART function table that contains the required set of functions to control a spec...
Definition: UART.h:652
HwiP_Handle hwiHandle
Definition: UARTMSP432.h:538
UARTMSP432 Hardware attributes.
Definition: UARTMSP432.h:477
const UART_FxnTable UARTMSP432_fxnTable
uint8_t oversampling
Definition: UARTMSP432.h:424
unsigned int readTimeout
Definition: UARTMSP432.h:552
size_t readSize
Definition: UARTMSP432.h:549
int(* readTaskFxn)(UART_Handle handle)
Definition: UARTMSP432.h:384
enum UART_STOP_ UART_STOP
UART stop bit settings.
enum UART_ReturnMode_ UART_ReturnMode
UART return mode settings.
unsigned int intPriority
Definition: UARTMSP432.h:483
SemaphoreP_Handle readSem
Definition: UARTMSP432.h:551
uint32_t perfConstraintMask
Definition: UARTMSP432.h:565
UART_STOP stopBits
Definition: UARTMSP432.h:541
uint8_t hwRegUCBRFx
Definition: UARTMSP432.h:422
UARTMSP432_FxnSet readFxns
Definition: UARTMSP432.h:547
UART_Callback readCallback
Definition: UARTMSP432.h:553
UARTMSP432 Object.
Definition: UARTMSP432.h:506
unsigned char * readBuf
Definition: UARTMSP432.h:548
bool(* readIsrFxn)(UART_Handle handle)
Definition: UARTMSP432.h:383
struct UARTMSP432_HWAttrsV1 UARTMSP432_HWAttrsV1
UARTMSP432 Hardware attributes.
struct UARTMSP432_Object UARTMSP432_Object
UARTMSP432 Object.
unsigned int intNum
Definition: UARTMSP432.h:481
uint8_t hwRegUCBRSx
Definition: UARTMSP432.h:423
void(* UART_Callback)(UART_Handle handle, void *buf, size_t count)
The definition of a callback function used by the UART driver when used in UART_MODE_CALLBACK The cal...
Definition: UART.h:438
unsigned int writeTimeout
Definition: UARTMSP432.h:560
UARTMSP432_BaudrateConfig const * baudrateLUT
Definition: UARTMSP432.h:491
enum UART_DataMode_ UART_DataMode
UART data mode settings.
size_t writeCount
Definition: UARTMSP432.h:558