Hardware Architecture

The CC23xx Family

Arm Cortex-M0+ (Device Core)

The device core (CM0+) is designed to run the wireless protocol stack from the radio layer up to the user application. By only using one core for the solution, the CC23xx family is optimized for both cost and power.

Flash, RAM, and Peripherals

Depending on the model, devices in the CC23xx family contain between 256 kB-512 kB of in-system programmable flash memory and 28 kB-64 kB of SRAM. See the table below for a breakdown each device. The CC23xx also hosts a full range of peripherals including UART, I2C, AES, RNG, temperature and battery monitors, timers, and 1 SSI.

Note

Within the SDK and related software tools, the CC2340R2 refers to the CC2340R2(1) device and the CC2340R5 refers to the CC2340R5(2) device. The precise device names are used in the following table.

Table 6. Flash and SRAM size for CC23xx or CC27xx devices

	CC2340R21	CC2340R22	CC2340R5	CC2340R5-Q1	CC2340R53
Flash	256 kB	256 kB	512 kB	512 kB	512 kB
SRAM	28 kB	36 kB	36 kB	36 kB	64 kB

The CC27xx Family

Arm Cortex-M33 (Device Core)

The Cortex-M33 (CM33) core within the CC27xx is responsible for both interfacing to the radio hardware and implementing the PHY layer of the protocol stack with BLE5-Stack. It translates instructions into bits that are sent over the air using the radio in an optimized manner for BLE performance and power-consumption.

Hardware Security Module

The Hardware Security Module (HSM) is used to create an isolated environment for cryptographic, key management, secure counters, and random number generation operations. The HSM supports energy-efficient operations for the following functions: Key Agreement Schemes, Signature Processing, Message Authentication Codes, Block Cipher Modes of Operation, Hash Algorithms, and Random Number Generation.

The HSM has its own RAM that is not accessable to the rest of the system but the HSM does have the capability to access the system memory directly. The SimpleLink Low Power F3 SDK includes the necessary firmware and drivers for all the HSM operations and functions.

Trusted Firmware-M

The CC27xx supports Trusted Firmware-M (TF-M) for Armv8-M that implements the Secure Processing Environment (SPE) for the CM33 that enables PSA (Platform Security Architecture) Certification. TF-M consists of:

• Secure Boot to authenticate Non-Secure Processing Environment (NPSE)

  and Secure Processing Environment (SPE) firmware image integrity.

• TF-M Core for controlling the isolation, communication and execution within SPE and with NSPE.

• Crypto, Internal Trusted Storage (ITS), Protected Storage (PS), and Firmware Update and Attestation Secure Services.

This enables the device to have secure connections with cloud services and protect sensitive data, keys, and certificates.

Peripherals and Devices With or Without CAN

The CC27xx also hosts a full range of peripherals across hardware variants including:

• 2x UART modules that uses universal asynchronous TX/RX functions with flexible baud-rate generation up to 3 MBPS and an IRDA SIR operation mode

• 2x SPI controllers and peripherals up to 12MHz with configurable phase and polarity

• 1x I2C to communicate with devices at 100KHz and 400KHz as a controller and/or a target

• 1x I2S for digital audio and pulse-density modulation microphones

• 1x VCE post-processing accellerator for fast and effecient Channel Sounding execution

• 1x Temperature and battery monitors

• 23 GPIOs, four with high-drive capability and ten with analog capabilities

• 1x 32-bit timer and 3x 16-bit timers

• 1x System timer

• 1x Watchdog timer

• 1x Real-time Clock

• 1x Low-power comparator

• 1x 12-bit ADC

• 1x Buck DC-DC converter

• The CAN-FD module supports both CAN (1Mbps) and CAN-FD (controllable 5Mbps with 64B/frame)

Table 5 below shows the notable device differences.

Table 7. Devices With/Without CAN and +20dBm Power Amplifier, Flash and SRAM Size

Device	CAN-FD	Flash (kB)	SRAM (kB)	+20dBm PA
CC2745P10-Q1	Yes	1024	162	Yes
CC2745R10-Q1	Yes	1024	162	No
CC2745R7-Q1	Yes	768	128	No
CC2744R7-Q1	No	768	128	No

Flash and RAM

As shown in Table 5 above, the CC27xxx10-Q1 contains 1024 kB of in-system programmable flash memory and 162 kB of SRAM, whereas the CC27xxx10-Q1 has 768 kB flash memory and 128 kB of SRAM. The flash is split into erasable pages of 8 kB. The CC27xx also contains 8 kB of cache SRAM that can be utilized to extend RAM capacity or can function as a normal cache to increase application performance.

Figure 45. SimpleLink™ CC27xx Block Diagram

Programming Internal Flash With the ROM Bootloader

The CC23xx or CC27xx internal flash memory can be programmed using the bootloader located in device ROM. Both UART and SPI protocols are supported. See the CC23xx SimpleLink Wireless MCU Technical Reference Manual for more details on the programming protocol and requirements.

Note

Because the ROM bootloader uses predefined DIO pins for internal flash programming, allocate these pins in the board layout. The CC23xx SimpleLink Wireless MCU Technical Reference Manual has more details on the pins allocated to the bootloader based on the chip package type.

Startup Sequence

For a complete description of the CC23xx or CC27xx reset sequence, see the CC23xx SimpleLink Wireless MCU Technical Reference Manual.

Resets

Note

Reset on the CC23xx or CC27xx may only be done by using hard resets. A hard reset turns off and on the device, resetting all the registers and memory. On the other hand, a soft reset restarts the microcontroller without losing RAM content.

From the software, this reset can be accomplished using Power_reset() function call from the Power Manager driver (Power.h). For more information, please review TI Drivers API Reference section.

// Import Power Driver definitions.
#include <ti/drivers/Power.h>

// Resets the system and causes it to reboot.
Power_reset();

In CCS, select Board Reset (automatic) from the reset menu:

Figure 46. Board Reset