Instance: SYSTICK
Component: SYSTICK
Base address: 0xE000E010
Register Name |
Type |
Register Width (Bits) |
Register Reset |
Address Offset |
Physical Address |
32 |
0x0000 0000 |
0x0000 0000 |
0xE000 E010 |
||
32 |
0x0000 0000 |
0x0000 0004 |
0xE000 E014 |
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32 |
0x0000 0000 |
0x0000 0008 |
0xE000 E018 |
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32 |
0x0000 0000 |
0x0000 000C |
0xE000 E01C |
Address Offset | 0x0000 0000 | ||
Physical Address | 0xE000 E010 | Instance | 0xE000 E010 |
Description | SysTick Control and Status Register Use the SysTick Control and Status Register to enable the SysTick features. |
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Type |
Bits | Field Name | Description | Type | Reset | ||
31:17 | RESERVED17 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b000 0000 0000 0000 | ||
16 | COUNTFLAG | Returns 1 if timer counted to 0 since last time this was read. Clears on read by application or debugger. | RO | 0 | ||
15:3 | RESERVED3 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b0 0000 0000 0000 | ||
2 | CLKSOURCE | SysTick clock source. Always reads as one if STCALIB reports NOREF. 0x0:Systick driven by external reference clock. 0x1:Systick driven by processor clock |
RO | 0 | ||
1 | TICKINT | 0x0:Counting down to zero does not pend the systick handler. software can use countflag to determine if the systick handler has ever counted to zero. 0x1:Counting down to zero pends the systick handler. |
RW | 0 | ||
0 | ENABLE | Enable SysTick counter 0x0:Counter disabled 0x1:Counter operates in a multi-shot way. that is, counter loads with the reload value and then begins counting down. on reaching 0, it sets the countflag to 1 and optionally pends the systick handler, based on tickint. it then loads the reload value again, and begins counting. |
RW | 0 |
Address Offset | 0x0000 0004 | ||
Physical Address | 0xE000 E014 | Instance | 0xE000 E014 |
Description | SysTick Reload Value Register Use the SysTick Reload Value Register to specify the start value to load into the current value register when the counter reaches 0. It can be any value between 0 and 0x00FFFFFF. A start value of 0 is possible, but has no effect because the SysTick interrupt and COUNTFLAG are activated when counting from 1 to 0. The reset value of this register is UNKNOWN. |
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Type |
Bits | Field Name | Description | Type | Reset | ||
31:24 | RESERVED24 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0x00 | ||
23:0 | RELOAD | Value to load into the SysTick Current Value Register when the counter reaches 0. | RW | 0x00 0000 |
Address Offset | 0x0000 0008 | ||
Physical Address | 0xE000 E018 | Instance | 0xE000 E018 |
Description | SysTick Current Value Register Use the SysTick Current Value Register to find the current value in the register. The reset value of this register is UNKNOWN. |
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Type |
Bits | Field Name | Description | Type | Reset | ||
31:24 | RESERVED24 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0x00 | ||
23:0 | CURRENT | Reads return the current value of the SysTick counter. This register is write-clear. Writing to it with any value clears the register to 0. Clearing this register also clears the COUNTFLAG bit of the SysTick Control and Status Register. | RW | 0x00 0000 |
Address Offset | 0x0000 000C | ||
Physical Address | 0xE000 E01C | Instance | 0xE000 E01C |
Description | SysTick Calibration Value Register Use the SysTick Calibration Value Register to enable software to scale to any required speed using divide and multiply. |
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Type |
Bits | Field Name | Description | Type | Reset | ||
31 | NOREF | If reads as 1, the Reference clock is not provided - the CLKSOURCE bit of the SysTick Control and Status register will be forced to 1 and cannot be cleared to 0. | RO | 0 | ||
30 | SKEW | If reads as 1, the calibration value for 10ms is inexact (due to clock frequency). | RO | 0 | ||
29:24 | RESERVED24 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
23:0 | TENMS | An optional Reload value to be used for 10ms (100Hz) timing, subject to system clock skew errors. If the value reads as 0, the calibration value is not known. | RO | 0x00 0000 |
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